361 lines
9.4 KiB
C
361 lines
9.4 KiB
C
/* $Id: at91twi.c,v 1.4 2009/03/14 21:04:05 dsl Exp $ */
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/* $NetBSD: at91twi.c,v 1.4 2009/03/14 21:04:05 dsl Exp $ */
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/*-
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* Copyright (c) 2007 Embedtronics Oy. All rights reserved.
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*
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* Based on arch/macppc/dev/ki2c.c,
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* Copyright (c) 2001 Tsubai Masanari. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: at91twi.c,v 1.4 2009/03/14 21:04:05 dsl Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <sys/lock.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91reg.h>
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#include <dev/i2c/i2cvar.h>
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#include <arm/at91/at91twivar.h>
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#include <arm/at91/at91twireg.h>
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int at91twi_match(device_t, cfdata_t, void *);
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void at91twi_attach(device_t, device_t, void *);
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inline u_int at91twi_readreg(struct at91twi_softc *, int);
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inline void at91twi_writereg(struct at91twi_softc *, int, u_int);
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int at91twi_intr(void *);
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int at91twi_poll(struct at91twi_softc *, int, int);
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int at91twi_start(struct at91twi_softc *, int, void *, int, int);
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int at91twi_read(struct at91twi_softc *, int, void *, int, int);
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int at91twi_write(struct at91twi_softc *, int, void *, int, int);
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/* I2C glue */
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static int at91twi_i2c_acquire_bus(void *, int);
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static void at91twi_i2c_release_bus(void *, int);
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static int at91twi_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
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void *, size_t, int);
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CFATTACH_DECL_NEW(at91twi, sizeof(struct at91twi_softc),
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at91twi_match, at91twi_attach, NULL, NULL);
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int
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at91twi_match(device_t parent, cfdata_t match, void *aux)
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{
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if (strcmp(match->cf_name, "at91twi") == 0)
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return 2;
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return 0;
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}
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void
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at91twi_attach(device_t parent, device_t self, void *aux)
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{
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struct at91twi_softc *sc = device_private(self);
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struct at91bus_attach_args *sa = aux;
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struct i2cbus_attach_args iba;
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unsigned ckdiv, cxdiv;
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// gather attach data:
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sc->sc_dev = self;
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sc->sc_iot = sa->sa_iot;
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sc->sc_pid = sa->sa_pid;
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if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh))
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panic("%s: Cannot map registers", self->dv_xname);
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printf(": I2C controller\n");
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/* initialize I2C controller */
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at91_peripheral_clock(sc->sc_pid, 1);
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at91twi_writereg(sc, TWI_CR, TWI_CR_SWRST);
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delay(1000);
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#if 1
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// target to 100 kHz
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for (ckdiv = 0; ckdiv < 8; ckdiv++) {
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if ((cxdiv = (AT91_MSTCLK / (1U << ckdiv)) / (2 * 50000U)) < 256) {
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goto found_ckdiv;
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}
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}
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panic("%s: Cannot calculate clock divider!", __FUNCTION__);
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found_ckdiv:
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#else
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ckdiv = 5; cxdiv = 0xFF;
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#endif
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at91twi_writereg(sc, TWI_CWGR, (ckdiv << 16) | (cxdiv << 8) | cxdiv);
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at91twi_writereg(sc, TWI_CR, TWI_CR_MSEN);
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//#ifdef AT91TWI_DEBUG
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printf("%s: ckdiv=%d cxdiv=%d CWGR=0x%08X SR=0x%08X\n", self->dv_xname, ckdiv, cxdiv, at91twi_readreg(sc, TWI_CWGR), at91twi_readreg(sc, TWI_SR));
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//#endif
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/* initialize rest */
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mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
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sc->sc_ih = at91_intr_establish(sc->sc_pid, IPL_SERIAL, INTR_HIGH_LEVEL,
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at91twi_intr, sc);
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/* fill in the i2c tag */
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sc->sc_i2c.ic_cookie = sc;
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sc->sc_i2c.ic_acquire_bus = at91twi_i2c_acquire_bus;
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sc->sc_i2c.ic_release_bus = at91twi_i2c_release_bus;
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sc->sc_i2c.ic_send_start = NULL;
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sc->sc_i2c.ic_send_stop = NULL;
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sc->sc_i2c.ic_initiate_xfer = NULL;
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sc->sc_i2c.ic_read_byte = NULL;
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sc->sc_i2c.ic_write_byte = NULL;
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sc->sc_i2c.ic_exec = at91twi_i2c_exec;
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iba.iba_tag = &sc->sc_i2c;
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(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
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}
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u_int
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at91twi_readreg(struct at91twi_softc *sc, int reg)
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{
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return bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg);
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}
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void
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at91twi_writereg(struct at91twi_softc *sc, int reg, u_int val)
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{
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
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}
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int
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at91twi_intr(void *arg)
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{
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struct at91twi_softc *sc = arg;
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u_int sr, isr, imr;
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sr = at91twi_readreg(sc, TWI_SR);
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imr = at91twi_readreg(sc, TWI_IMR);
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isr = sr & imr;
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if (!isr) {
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#ifdef AT91TWI_DEBUG
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// printf("%s(%s): interrupts are disabled (sr=%08X imr=%08X)\n", __FUNCTION__, device_xname(sc->sc_dev), sr, imr);
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#endif
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return 0;
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}
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if (isr & TWI_SR_TXCOMP) {
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// transmission has completed!
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if (sr & (TWI_SR_NACK | TWI_SR_UNRE | TWI_SR_OVRE)) {
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// failed!
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#ifdef AT91TWI_DEBUG
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printf("%s(%s): FAILED (sr=%08X)\n", __FUNCTION__,
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device_xname(sc->sc_dev), sr);
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#endif
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sc->sc_flags |= I2C_ERROR;
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} else {
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#ifdef AT91TWI_DEBUG
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printf("%s(%s): SUCCESS (sr=%08X)\n", __FUNCTION__,
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device_xname(sc->sc_dev), sr);
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#endif
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}
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if (sc->sc_flags & I2C_READING && sr & TWI_SR_RXRDY) {
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*sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
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sc->sc_resid--;
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}
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sc->sc_flags &= ~I2C_BUSY;
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at91twi_writereg(sc, TWI_IDR, -1);
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goto out;
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}
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if (isr & TWI_SR_TXRDY) {
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if (--sc->sc_resid > 0)
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at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
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}
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if (isr & TWI_SR_RXRDY) {
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// data has been received
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*sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
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sc->sc_resid--;
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}
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if (isr & (TWI_SR_TXRDY | TWI_SR_RXRDY) && sc->sc_resid <= 0) {
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// all bytes have been transmitted, send stop condition
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at91twi_writereg(sc, TWI_IDR, TWI_SR_RXRDY | TWI_SR_TXRDY);
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at91twi_writereg(sc, TWI_CR, TWI_CR_STOP);
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}
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out:
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return 1;
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}
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int
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at91twi_poll(struct at91twi_softc *sc, int timo, int flags)
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{
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timo = 1000000U;
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while (sc->sc_flags & I2C_BUSY) {
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if (timo < 0) {
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printf("i2c_poll: timeout\n");
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return -1;
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}
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if (flags & I2C_F_POLL) {
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at91_intr_poll(sc->sc_ih, 1);
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delay(1);
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timo--;
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} else {
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delay(100); // @@@ sleep!?
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timo -= 100;
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}
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}
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return 0;
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}
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int
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at91twi_start(struct at91twi_softc *sc, int addr, void *data, int len,
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int flags)
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{
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int rd = (sc->sc_flags & I2C_READING);
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int timo, s;
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KASSERT((addr & 1) == 0);
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sc->sc_data = data;
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sc->sc_resid = len;
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sc->sc_flags |= I2C_BUSY;
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timo = 1000 + len * 200;
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s = splserial();
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// if writing, queue first byte immediately
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if (!rd)
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at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
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// if there's just one byte to transmit, we must set STOP-bit too
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if (sc->sc_resid == 1) {
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at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP);
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at91twi_writereg(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
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} else {
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at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP
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| (rd ? TWI_SR_RXRDY : TWI_SR_TXRDY));
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at91twi_writereg(sc, TWI_CR, TWI_CR_START);
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}
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splx(s);
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if (at91twi_poll(sc, timo, flags))
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return -1;
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if (sc->sc_flags & I2C_ERROR) {
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printf("I2C_ERROR\n");
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return -1;
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}
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return 0;
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}
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int
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at91twi_read(struct at91twi_softc *sc, int addr, void *data, int len, int flags)
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{
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sc->sc_flags = I2C_READING;
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#ifdef AT91TWI_DEBUG
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printf("at91twi_read: %02x %d\n", addr, len);
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#endif
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return at91twi_start(sc, addr, data, len, flags);
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}
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int
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at91twi_write(struct at91twi_softc *sc, int addr, void *data, int len, int flags)
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{
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sc->sc_flags = 0;
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#ifdef AT91TWI_DEBUG
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printf("at91twi_write: %02x %d\n", addr, len);
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#endif
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return at91twi_start(sc, addr, data, len, flags);
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}
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static int
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at91twi_i2c_acquire_bus(void *cookie, int flags)
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{
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struct at91twi_softc *sc = cookie;
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if (flags & I2C_F_POLL)
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return 0;
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mutex_enter(&sc->sc_buslock);
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return 0;
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}
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static void
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at91twi_i2c_release_bus(void *cookie, int flags)
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{
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struct at91twi_softc *sc = cookie;
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if (flags & I2C_F_POLL)
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return;
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mutex_exit(&sc->sc_buslock);
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}
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int
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at91twi_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
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size_t cmdlen, void *vbuf, size_t buflen, int flags)
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{
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struct at91twi_softc *sc = cookie;
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if (I2C_OP_READ_P(op))
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{
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u_int iadr = 0;
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if (vcmd) {
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const uint8_t *cmd = (const uint8_t *)vcmd;
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if (cmdlen > 3) {
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// we're in trouble..
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return -1;
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}
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iadr = cmd[0];
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if (cmdlen > 1) {
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iadr <<= 8;
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iadr |= cmd[1];
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}
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if (cmdlen > 2) {
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iadr <<= 8;
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iadr |= cmd[2];
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}
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}
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at91twi_writereg(sc, TWI_MMR, (addr << 16) | TWI_MMR_MREAD | (cmdlen << 8));
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if (cmdlen > 0) {
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#ifdef AT91TWI_DEBUG
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printf("at91twi_read: %02x iadr=%08X mmr=%08X\n",
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addr, iadr, at91twi_readreg(sc, TWI_MMR));
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#endif
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at91twi_writereg(sc, TWI_IADR, iadr);
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}
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if (at91twi_read(sc, addr, vbuf, buflen, flags) != 0)
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return -1;
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} else if (vcmd) {
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at91twi_writereg(sc, TWI_MMR, addr << 16);
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if (at91twi_write(sc, addr, __UNCONST(vcmd), cmdlen, flags) !=0)
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return -1;
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}
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return 0;
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}
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