1322 lines
31 KiB
C
1322 lines
31 KiB
C
/* $NetBSD: fpe.c,v 1.2 1996/03/18 19:58:09 mark Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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* Copyright (c) 1995 Neil Carson.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the RiscBSD kernel team.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* fpe.c
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*
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* Floating Point Emulator
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*
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* Currently calculations are only performed to single precision
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*
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* Created : 11/02/95
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*/
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/* FPE Compile options
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*
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* FPE_SPEEDUPS - use assembly speedups in place of C routines
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* FPE_NODEBUG - don't compile in the debugging code
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* FPE_PROF - compile in FPE profiling code
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* FPE_INLINE - define this as inline to inline some functions
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*/
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#define FPE_SPEEDUPS
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#define FPE_NODEBUG
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/*#define FPE_PROF*/
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#define FPE_INLINE __inline
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/syslog.h>
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#include <machine/cpu.h>
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#include <machine/cpus.h>
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#include <machine/katelib.h>
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#include <machine/frame.h>
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#include <machine/undefined.h>
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#include <machine/fp.h>
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typedef struct {
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int opcode;
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int precision;
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int rounding;
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int fpregm;
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int fpregn;
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int fpregd;
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int regd;
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} fp_op_data_t;
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/* Types and stuctures used to hold floating point numbers */
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typedef struct {
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u_int32_t exponent;
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u_int32_t mantissa_hi;
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u_int32_t mantissa_lo;
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} fpe_reg_t;
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typedef struct {
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u_int mantissa:23;
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u_int exponent:8;
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u_int sign:1;
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} fpe_sprec_t;
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typedef struct {
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u_int mantissa_hi:20;
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u_int exponent:11;
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u_int sign:1;
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u_int32_t mantissa_lo;
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} fpe_dprec_t;
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typedef struct {
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u_int32_t exponent;
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u_int32_t mantissa_hi;
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u_int32_t mantissa_lo;
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} fpe_eprec_t;
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typedef struct {
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u_int32_t word1;
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u_int32_t word2;
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u_int32_t word3;
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} fpe_pprec_t;
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typedef struct {
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u_int32_t exponent;
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u_int64_t mantissa;
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} fpe_qreg_t;
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/* FPE status and control registers */
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u_int fpe_status = 0x02000000;
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u_int fpe_control = 0x00000000;
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#define FPE_STATUS_MASK 0x001f1f1f
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#define FPE_CONTROL_MASK 0x9cffffff
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/* Array containing the emulated registers */
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fpe_reg_t fpe_registers[16] = {
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{ 0, 0, 0 }, /* f0 */
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{ 0, 0, 0 }, /* f1 */
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{ 0, 0, 0 }, /* f2 */
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{ 0, 0, 0 }, /* f3 */
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{ 0, 0, 0 }, /* f4 */
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{ 0, 0, 0 }, /* f5 */
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{ 0, 0, 0 }, /* f6 */
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{ 0, 0, 0 }, /* f7 */
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{ 0x0000, 0x00000000, 0x00000000 }, /* 0.0 */
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{ 0x3fff, 0x80000000, 0x00000000 }, /* 1.0 */
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{ 0x4000, 0x80000000, 0x00000000 }, /* 2.0 */
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{ 0x4000, 0xc0000000, 0x00000000 }, /* 3.0 */
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{ 0x4001, 0x80000000, 0x00000000 }, /* 4.0 */
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{ 0x4001, 0xa0000000, 0x00000000 }, /* 5.0 */
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{ 0x3ffe, 0x80000000, 0x00000000 }, /* 0.5 */
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{ 0x4002, 0xa0000000, 0x00000000 }, /* 10.0 */
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};
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fpe_reg_t *fpregs;
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/* Prototypes for instruction emulation functions */
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typedef int (*fpe_handler_t) __P((unsigned int, trapframe_t *));
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typedef int (*fpe_dop_handler_t) __P((fp_op_data_t *, trapframe_t *));
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int fpe_mvf __P((fp_op_data_t *, trapframe_t *));
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int fpe_mnf __P((fp_op_data_t *, trapframe_t *));
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int fpe_adf __P((fp_op_data_t *, trapframe_t *));
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int fpe_muf __P((fp_op_data_t *, trapframe_t *));
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int fpe_suf __P((fp_op_data_t *, trapframe_t *));
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int fpe_dvf __P((fp_op_data_t *, trapframe_t *));
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int fpe_muf __P((fp_op_data_t *, trapframe_t *));
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int fpe_rdf __P((fp_op_data_t *, trapframe_t *));
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int fpe_rsf __P((fp_op_data_t *, trapframe_t *));
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int fpe_abs __P((fp_op_data_t *, trapframe_t *));
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/* Table of handler functions for register to registers operations */
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fpe_dop_handler_t fpe_dops[32] = {
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fpe_adf, /* 00000 ADF Add */
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fpe_mvf, /* 00001 MVF Move */
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fpe_muf, /* 00010 MUL Multiply */
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fpe_mnf, /* 00011 MNF Move negated */
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fpe_suf, /* 00100 SUF Subtract */
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fpe_abs, /* 00101 ABS Absolute value */
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fpe_rsf, /* 00110 RSF Reverse subtract */
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NULL, /* 00111 RND Round to integer */
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fpe_dvf, /* 01000 DVF Divide */
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NULL, /* 01001 SQT Square root */
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fpe_rdf, /* 01010 RDF Reverse divide */
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NULL, /* 01011 LOG Logarithm to base 10 */
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NULL, /* 01100 POW Power */
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NULL, /* 01101 LGN Logarithm to base e */
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NULL, /* 01110 RPW Reverse power */
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NULL, /* 01111 EXP Exponent */
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NULL, /* 10000 RMF Remainder */
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NULL, /* 10001 SIN Sine */
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fpe_muf, /* 10010 FML Fast multiply */
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NULL, /* 10011 COS Cosine */
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fpe_dvf, /* 10100 FDV Fast divide */
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NULL, /* 10101 TAN Tangent */
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fpe_rdf, /* 10110 FRD Fast reverse divide */
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NULL, /* 10111 ASN Arc sine */
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NULL, /* 11000 ROL Rolar angle */
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NULL, /* 11001 ACS Arc cosine */
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NULL, /* 11010 undefined */
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NULL, /* 11011 ATN Arc tangent */
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NULL, /* 11100 undefined */
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NULL, /* 11101 undefined */
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NULL, /* 11110 undefined */
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NULL, /* 11111 undefined */
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};
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/* Prototypes for instruction emulation functions */
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int fpe_flt __P((fp_op_data_t *, trapframe_t *));
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int fpe_fix __P((fp_op_data_t *, trapframe_t *));
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int fpe_wfs __P((fp_op_data_t *, trapframe_t *));
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int fpe_rfs __P((fp_op_data_t *, trapframe_t *));
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int fpe_wfc __P((fp_op_data_t *, trapframe_t *));
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int fpe_rfc __P((fp_op_data_t *, trapframe_t *));
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int fpe_cmf __P((fp_op_data_t *, trapframe_t *));
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int fpe_cnf __P((fp_op_data_t *, trapframe_t *));
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/* Table of handler functions for fp register transfer operations */
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fpe_dop_handler_t fpe_regtrans[16] = {
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fpe_flt, /* 0000 FLT Integer to FP */
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fpe_fix, /* 0001 FIX FP to Integer */
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fpe_wfs, /* 0010 Write FP status */
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fpe_rfs, /* 0011 Read FP status */
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fpe_wfc, /* 0100 Write FP control */
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fpe_rfc, /* 0101 Read FP control */
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NULL, /* 0110 undefined */
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NULL, /* 0111 undefined */
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NULL, /* 1000 undefined */
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fpe_cmf, /* 1001 Compare FP */
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NULL, /* 1010 undefined */
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fpe_cnf, /* 1011 Compare negated FP */
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NULL, /* 1100 undefined */
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fpe_cmf, /* 1101 Compare FP with exception */
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NULL, /* 1110 undefined */
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fpe_cnf, /* 1111 Compare negated FP with exception */
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};
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/* Prototypes for instruction emulation functions */
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int fpe_ldfstf __P((unsigned int address, trapframe_t *));
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FPE_INLINE int stofpe __P((u_int32_t */*address*/, fpe_reg_t */*fpreg*/));
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int dtofpe __P((u_int32_t *, fpe_reg_t *));
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int etofpe __P((u_int32_t *, fpe_reg_t *));
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int ptofpe __P((u_int32_t *, fpe_reg_t *));
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FPE_INLINE int fpetos __P((u_int32_t *, fpe_reg_t *));
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int fpetod __P((u_int32_t *, fpe_reg_t *));
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int fpetoe __P((u_int32_t *, fpe_reg_t *));
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int fpetop __P((u_int32_t *, fpe_reg_t *));
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int fpe_dump(void);
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int coproc1_handler __P((unsigned int, unsigned int, trapframe_t *));
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int coproc2_handler __P((unsigned int, unsigned int, trapframe_t *));
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/* Prototypes for assembly functions */
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u_int32_t nc_fp_add __P((u_int32_t, u_int32_t));
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u_int32_t nc_fp_sub __P((u_int32_t, u_int32_t));
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u_int32_t nc_fp_mul __P((u_int32_t, u_int32_t));
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u_int32_t nc_fp_div __P((u_int32_t, u_int32_t));
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u_int32_t nc_fp_fix __P((u_int32_t));
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u_int32_t nc_fp_cmp __P((u_int32_t, u_int32_t));
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#define FPP_ADD 0
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#define FPP_SUB 1
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#define FPP_MUL 2
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#define FPP_DIV 3
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#define FPP_CMF 4
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#define FPP_CNF 5
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#define FPP_FIX 6
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#define FPP_FLT 7
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#define FPP_ABS 8
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#define FPP_MOV 9
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#define FPP_MVN 10
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#define FPP_RDV 11
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#define FPP_RSB 12
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#define FPP_STRS 13
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#define FPP_STRD 14
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#define FPP_STRE 15
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#define FPP_STRP 16
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#define FPP_LDRS 17
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#define FPP_LDRD 18
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#define FPP_LDRE 19
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#define FPP_LDRP 20
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#define FPP_MAX 21
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#ifdef FPE_PROF
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u_int fp_profile[FPP_MAX];
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#define FPP_INC(x) ++fp_profile[x]
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#else
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#define FPP_INC(x)
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#endif
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/*
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* If FPE is defined then we are being built into the kernel.
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* If not then we are being built as a standalone loadable module.
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*/
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#ifdef FPE
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#define PRINTF(x) ;
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#define FPE_DUMP() ;
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#else
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#define PRINTF(x) (*printf_store)(x)
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#define FPE_DUMP() fpe_dump()
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void (*printf_store)();
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void (*install_coproc_store)();
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#ifdef NOTEXT
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void
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fpe_printf(char *a, ...)
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{
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}
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#endif
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/* Standalone initialisation point */
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int
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init_fpe(printf_handler, coproc_handler)
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void (*printf_handler)();
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void (*coproc_handler)();
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{
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int loop;
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printf_store = printf_handler;
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install_coproc_store = coproc_handler;
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#ifdef NOTEXT
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printf_store = fpe_printf;
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#endif
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(*install_coproc_store)(FP_COPROC, coproc1_handler);
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(*install_coproc_store)(FP_COPROC2, coproc2_handler);
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#ifdef FPE_PROF
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for (loop = 0; loop < FPP_MAX; ++loop)
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fp_profile[loop] = 0;
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#endif
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PRINTF(("FPE installed\n"));
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return(0);
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}
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#endif
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/*
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* Main entry point after an undefined instruction.
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* The instruction has been identified as a co-proc 2 instruction.
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* We get the address of the instruction, the instruction itself and
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* and pointer to the trap frame.
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* Currently we do support this (LFM/SFM) so its gallows time
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*/
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int
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coproc2_handler(address, instruction, frame)
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unsigned int address;
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unsigned int instruction;
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trapframe_t *frame;
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{
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log(LOG_ERR, "Coprocessor 2 FP instruction 0x%08x not supported yet.", instruction);
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return(1);
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}
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void
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init_fpe_state(p)
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struct proc *p;
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{
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struct fp_state *fpstate;
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int loop;
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fpstate = &p->p_addr->u_pcb.pcb_fpstate;
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fpstate->fp_flags |= 1;
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for (loop = 8; loop < 16; ++loop)
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fpstate->fp_registers[loop] = *((fp_reg_t *)&fpe_registers[loop]);
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}
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int
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initialise_fpe(cpu)
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cpu_t *cpu;
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{
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cpu->fpu_class = FPU_CLASS_FPE;
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cpu->fpu_type = FPU_TYPE_SP_FPE;
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strcpy(cpu->fpu_model, "Single precision floating point emulator");
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install_coproc_handler(FP_COPROC, coproc1_handler);
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install_coproc_handler(FP_COPROC2, coproc2_handler);
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init_fpe_state(curproc);
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return(0);
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}
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/*
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* Main entry point after an undefined instruction.
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* The instruction has been identified as a co-proc 1 instruction.
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* We get the address of the instruction, the instruction itself and
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* and pointer to the trap frame.
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*/
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int
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coproc1_handler(address, instruction, frame)
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unsigned int address;
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unsigned int instruction;
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trapframe_t *frame;
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{
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struct fp_state *fpstate;
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PRINTF(("FPE instruction 0x%08x -> 0x%08x\n",
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address, instruction));
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/* Get the fp registers pointer */
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fpstate = &curproc->p_addr->u_pcb.pcb_fpstate;
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fpstate->fp_flags |= 2; /* so statclock can tell if we are spending time in the fpe */
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if (fpstate->fp_flags & 1)
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fpregs = (fpe_reg_t *) &fpstate->fp_registers;
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else
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fpregs = fpe_registers;
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/* Test for a FP data transfer operation */
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if ((instruction & (1 << 25)) == 0) {
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int err;
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PRINTF(("FP data transfer\n"));
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err = fpe_ldfstf(instruction, frame);
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FPE_DUMP();
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fpstate->fp_flags &= ~2;
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return(err);
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}
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/* Test for a FP data operation */
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else if ((instruction & (1 << 4)) == 0) {
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fp_op_data_t op_data;
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op_data.opcode = (instruction >> 19) & 0x1e;
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if (instruction & 0x00008000)
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op_data.opcode |= 0x01;
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op_data.precision = ((instruction & (1<<19)) ? 2 : 0)
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| ((instruction & (1<<7)) ? 1 : 0);
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op_data.rounding = (instruction >> 5) & 3;
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op_data.fpregm = (instruction) & 15;
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op_data.fpregn = (instruction >> 16) & 7;
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op_data.fpregd = (instruction >> 12) & 7;
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PRINTF(("FP data op = %d\n", op_data.opcode));
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if (fpe_dops[op_data.opcode]) {
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int err;
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err = (*fpe_dops[op_data.opcode])(&op_data, frame);
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#ifndef FPE_NODEBUG
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if (err == 0)
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FPE_DUMP();
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#endif
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fpstate->fp_flags &= ~2;
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return(err);
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}
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else {
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fpstate->fp_flags &= ~2;
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return(1);
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}
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}
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/* Test for a FP register transfer operation */
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else {
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fp_op_data_t op_data;
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op_data.opcode = (instruction >> 20) & 0x0f;
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op_data.precision = ((instruction & (1<<19)) ? 2 : 0)
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| ((instruction & (1<<7)) ? 1 : 0);
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op_data.rounding = (instruction >> 5) & 3;
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op_data.fpregm = (instruction) & 15;
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op_data.fpregn = (instruction >> 16) & 7;
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op_data.regd = (instruction >> 12) & 15;
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PRINTF(("FP reg trans = %d\n", op_data.opcode));
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if (fpe_regtrans[op_data.opcode]) {
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int err;
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|
|
PRINTF(("FP reg trans op = %d\n", op_data.opcode));
|
|
err = (*fpe_regtrans[op_data.opcode])(&op_data, frame);
|
|
#ifndef FPE_NODEBUG
|
|
if (err == 0 && (op_data.opcode == 0 || op_data.opcode == 2
|
|
|| op_data.opcode == 4))
|
|
FPE_DUMP();
|
|
#endif
|
|
fpstate->fp_flags &= ~2;
|
|
return(err);
|
|
}
|
|
else {
|
|
fpstate->fp_flags &= ~2;
|
|
return(1);
|
|
}
|
|
}
|
|
|
|
/* Well if it gets here then it was not a decodable FP instruction */
|
|
|
|
fpstate->fp_flags &= ~2;
|
|
return(1);
|
|
}
|
|
|
|
|
|
/* Precision convertion routines */
|
|
|
|
FPE_INLINE int
|
|
stofpe(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
fpe_sprec_t real;
|
|
u_int32_t *words = (u_int32_t *)ℜ
|
|
|
|
if ((address[0] & ~(1<<31)) == 0) {
|
|
PRINTF(("single=0\n"));
|
|
|
|
fpreg->mantissa_hi = 0;
|
|
fpreg->mantissa_lo = 0;
|
|
fpreg->exponent = address[0] & (1<<31);
|
|
return(0);
|
|
}
|
|
|
|
words[0] = address[0];
|
|
PRINTF(("word=%08x\n", address[0]));
|
|
|
|
PRINTF(("sign = %d exponent=%08x mantissa=%08x\n", real.sign,
|
|
real.exponent, real.mantissa));
|
|
fpreg->mantissa_hi = real.mantissa << 8;
|
|
fpreg->mantissa_lo = 0;
|
|
fpreg->exponent = ((int)real.exponent - 0x80) + 0x4000;
|
|
fpreg->exponent |= (real.sign << 31);
|
|
return(0);
|
|
}
|
|
|
|
|
|
int
|
|
dtofpe(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
fpe_dprec_t real;
|
|
|
|
if ((address[0] & ~(1<<31)) == 0 && address[1] == 0) {
|
|
PRINTF(("double=0\n"));
|
|
|
|
fpreg->mantissa_hi = 0;
|
|
fpreg->mantissa_lo = 0;
|
|
fpreg->exponent = address[0] & (1<<31);
|
|
return(0);
|
|
}
|
|
|
|
real = *(fpe_dprec_t *)address;
|
|
PRINTF(("sign = %d exponent=%08x mantissa=%08x %08x\n", real.sign,
|
|
real.exponent, real.mantissa_lo, real.mantissa_hi));
|
|
fpreg->mantissa_hi = real.mantissa_hi << 11;
|
|
fpreg->mantissa_hi |= real.mantissa_lo >> 21;
|
|
fpreg->mantissa_lo = real.mantissa_lo << 11;
|
|
fpreg->exponent = (real.exponent - 0x400) + 0x4000;
|
|
fpreg->exponent |= (real.sign << 31);
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
#ifndef FPE_SPEEDUPS
|
|
int
|
|
etofpe(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
bcopy((char *)address, (char *)fpreg, 12);
|
|
return(0);
|
|
}
|
|
#endif
|
|
|
|
|
|
int
|
|
ptofpe(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
fpe_pprec_t real;
|
|
|
|
real = *(fpe_pprec_t *)address;
|
|
return(1);
|
|
}
|
|
|
|
|
|
FPE_INLINE int
|
|
fpetos(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
fpe_sprec_t real;
|
|
int exp;
|
|
|
|
if (fpreg->mantissa_hi == 0 && fpreg->mantissa_lo == 0
|
|
&& (fpreg->exponent & ~(1<<31)) == 0) {
|
|
PRINTF(("single=0\n"));
|
|
|
|
address[0] = fpreg->exponent & (1<<31);
|
|
return(0);
|
|
}
|
|
|
|
real.sign = (fpreg->exponent >> 31) & 1;
|
|
real.mantissa = (fpreg->mantissa_hi >> 8);
|
|
exp = ((int)(fpreg->exponent & 0x7fff) - 0x4000) + 0x80;
|
|
|
|
if (exp < 0 || exp > 0xff) {
|
|
PRINTF(("ermm exponent out of range !\n"));
|
|
exp = 0x80;
|
|
}
|
|
|
|
real.exponent = exp;
|
|
|
|
PRINTF(("single=%08x\n", *((unsigned int *)&real)));
|
|
|
|
*(fpe_sprec_t *)address = real;
|
|
if (real.sign == 1 && real.mantissa == 0 && real.exponent == 0)
|
|
printf("single result = %08x", *address);
|
|
return(0);
|
|
}
|
|
|
|
|
|
int
|
|
fpetod(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
fpe_dprec_t real;
|
|
u_int32_t *words = (u_int32_t *)ℜ
|
|
int exp;
|
|
|
|
if (fpreg->mantissa_lo == 0 && (fpreg->exponent & ~(1<<31)) == 0) {
|
|
PRINTF(("double=0\n"));
|
|
|
|
address[0] = fpreg->exponent & (1<<31);
|
|
address[1] = 0;
|
|
return(0);
|
|
}
|
|
|
|
real.sign = (fpreg->exponent >> 31) & 1;
|
|
real.mantissa_hi = (fpreg->mantissa_hi >> 11);
|
|
real.mantissa_lo = (fpreg->mantissa_hi << 21) | (fpreg->mantissa_lo >> 11);
|
|
exp = ((int)(fpreg->exponent & 0x7fff) - 0x4000) + 0x400;
|
|
|
|
if (exp < 0 || exp > 0x7ff) {
|
|
PRINTF(("ermm exponent out of range !\n"));
|
|
exp = 0x400;
|
|
}
|
|
|
|
real.exponent = exp;
|
|
|
|
PRINTF(("double=%08x%08x\n", words[0], words[1]));
|
|
|
|
address[0] = words[0];
|
|
address[1] = words[1];
|
|
return(0);
|
|
}
|
|
|
|
#ifndef FPE_SPEEDUPS
|
|
int
|
|
fpetoe(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
bcopy((char *)fpreg, (char *)address, 12);
|
|
return(0);
|
|
}
|
|
#endif
|
|
|
|
|
|
int
|
|
fpetop(address, fpreg)
|
|
u_int32_t *address;
|
|
fpe_reg_t *fpreg;
|
|
{
|
|
return(1);
|
|
}
|
|
|
|
|
|
/* Unary fp data operations */
|
|
|
|
/*
|
|
* int fpe_mvf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* MVF - Move FP register to FP register
|
|
*/
|
|
|
|
int
|
|
fpe_mvf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
FPP_INC(FPP_MOV);
|
|
PRINTF(("MVF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
fpregs[op->fpregd] = fpregs[op->fpregm];
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_mnf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* MNF - Move FP register to FP register negated
|
|
*/
|
|
|
|
int
|
|
fpe_mnf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[8];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_MVN);
|
|
PRINTF(("MNF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_sub(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_abs(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* ABS - Absolute value of a FP register
|
|
*/
|
|
|
|
int
|
|
fpe_abs(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[8];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_ABS);
|
|
PRINTF(("ABS prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real2);
|
|
fpetos(&single_b, (fpe_reg_t *) &real1);
|
|
single_result = nc_fp_cmp(single_a, single_b);
|
|
if (single_result & 0x80000000) {
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_sub(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
} else {
|
|
fpregs[op->fpregd] = fpregs[op->fpregm];
|
|
}
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/* Binary fp data operations */
|
|
|
|
/*
|
|
* int fpe_adf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* ADF - Floating point add
|
|
*/
|
|
|
|
int
|
|
fpe_adf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_ADD);
|
|
PRINTF(("ADF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_add(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_suf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* SUF - Floating point subtract
|
|
*/
|
|
|
|
int
|
|
fpe_suf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_SUB);
|
|
PRINTF(("SUF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_sub(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_muf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* MUF - Floating point multiply
|
|
*/
|
|
|
|
int
|
|
fpe_muf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_MUL);
|
|
PRINTF(("MUF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_mul(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_dvf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* DVF - Floating point divide
|
|
*/
|
|
|
|
int fpe_dvf(fp_op_data_t *op, trapframe_t *frame)
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_DIV);
|
|
PRINTF(("DVF prec=%d rnd=%d fd=%d fn=%d fm=%d\n", op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_div(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_rdf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* RDF - Floating point reverse divide
|
|
*/
|
|
|
|
int
|
|
fpe_rdf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_RDV);
|
|
PRINTF(("RDF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_div(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_rsf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* RSF - Floating point reverse subtract
|
|
*/
|
|
|
|
int
|
|
fpe_rsf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t result;
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_RSB);
|
|
PRINTF(("RSF prec=%d rnd=%d fd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->fpregd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_sub(single_a, single_b);
|
|
stofpe(&single_result, (fpe_reg_t *) &result);
|
|
fpregs[op->fpregd] = *(fpe_reg_t *) &result;
|
|
return(0);
|
|
}
|
|
|
|
|
|
/* FPE Register transfer instructions */
|
|
|
|
/*
|
|
* int fpe_flt(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* FLT - Integer register to float register
|
|
*/
|
|
|
|
int
|
|
fpe_flt(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
int regd;
|
|
fpe_reg_t real;
|
|
int *regs = &frame->tf_r0;
|
|
|
|
FPP_INC(FPP_FLT);
|
|
PRINTF(("FLT prec=%d rnd=%d rd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->regd, op->fpregn, op->fpregm));
|
|
|
|
regd = regs[op->regd];
|
|
|
|
if (regd > 0)
|
|
real.mantissa_lo = regd;
|
|
else
|
|
real.mantissa_lo = -regd;
|
|
real.mantissa_hi = 0;
|
|
|
|
if (regd == 0)
|
|
real.exponent = 0;
|
|
else {
|
|
real.exponent = 16383 + 63;
|
|
|
|
while ((real.mantissa_hi & (1 << 31)) == 0) {
|
|
--real.exponent;
|
|
real.mantissa_hi = real.mantissa_hi << 1;
|
|
if (real.mantissa_lo & (1 << 31))
|
|
real.mantissa_hi |= 1;
|
|
real.mantissa_lo = real.mantissa_lo << 1;
|
|
}
|
|
}
|
|
|
|
if (regd < 0)
|
|
real.exponent |= (1 <<31);
|
|
|
|
fpregs[op->fpregn] = real;
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_fix(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* FIX - Float register to integer register
|
|
*/
|
|
|
|
int
|
|
fpe_fix(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t src = *(fpe_qreg_t *) &fpregs[op->fpregm];
|
|
u_int32_t single_argument;
|
|
unsigned int *regs = &frame->tf_r0;
|
|
|
|
FPP_INC(FPP_FIX);
|
|
PRINTF(("FIX prec=%d rnd=%d rd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->regd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_argument, (fpe_reg_t *) &src);
|
|
|
|
/*
|
|
* Call the assembler (32-bit) code for now
|
|
*/
|
|
regs[op->regd] = nc_fp_fix(single_argument);
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_wfs(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* WFS - Write FP status register
|
|
*/
|
|
|
|
int fpe_wfs(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
unsigned int *regs = &frame->tf_r0;
|
|
|
|
PRINTF(("WFS rd=%d\n", op->regd));
|
|
|
|
fpe_status = (fpe_status & ~FPE_STATUS_MASK)
|
|
| (regs[op->regd] & FPE_STATUS_MASK);
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_rfs(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* RFS - Read FP status register
|
|
*/
|
|
|
|
int
|
|
fpe_rfs(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
unsigned int *regs = &frame->tf_r0;
|
|
|
|
PRINTF(("RFS rd=%d\n", op->regd));
|
|
|
|
regs[op->regd] = fpe_status;
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_wfc(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* WFC - Write FP control register
|
|
*/
|
|
|
|
int
|
|
fpe_wfc(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
unsigned int *regs = &frame->tf_r0;
|
|
|
|
PRINTF(("WFC rd=%d\n", op->regd));
|
|
|
|
fpe_control = (fpe_control & ~FPE_CONTROL_MASK)
|
|
| (regs[op->regd] & FPE_CONTROL_MASK);
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_rfc(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* RFC - Read FP control register
|
|
*/
|
|
|
|
int
|
|
fpe_rfc(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
unsigned int *regs = &frame->tf_r0;
|
|
|
|
PRINTF(("RFC rd=%d\n", op->regd));
|
|
|
|
regs[op->regd] = fpe_control;
|
|
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_cmf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* CMF - FP compare
|
|
*/
|
|
|
|
int
|
|
fpe_cmf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_CMF);
|
|
PRINTF(("CMF prec=%d rnd=%d rd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->regd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_result = nc_fp_cmp(single_a, single_b);
|
|
frame->tf_spsr = (frame->tf_spsr & ~0xf0000000) | (single_result & 0xf0000000);
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_cnf(fp_op_data_t *op, trapframe_t *frame)
|
|
*
|
|
* CNF - FP compare negated
|
|
*/
|
|
|
|
int
|
|
fpe_cnf(op, frame)
|
|
fp_op_data_t *op;
|
|
trapframe_t *frame;
|
|
{
|
|
fpe_qreg_t real0 = *(fpe_qreg_t *)&fpregs[8];
|
|
fpe_qreg_t real1 = *(fpe_qreg_t *)&fpregs[op->fpregn];
|
|
fpe_qreg_t real2 = *(fpe_qreg_t *)&fpregs[op->fpregm];
|
|
u_int32_t single_a, single_b, single_result;
|
|
|
|
FPP_INC(FPP_CNF);
|
|
PRINTF(("CNF prec=%d rnd=%d rd=%d fn=%d fm=%d\n",
|
|
op->precision, op->rounding, op->regd, op->fpregn, op->fpregm));
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real0);
|
|
fpetos(&single_b, (fpe_reg_t *) &real2);
|
|
single_b = nc_fp_sub(single_a, single_b);
|
|
|
|
fpetos(&single_a, (fpe_reg_t *) &real1);
|
|
single_result = nc_fp_cmp(single_a, single_b);
|
|
frame->tf_spsr = (frame->tf_spsr & ~0xf0000000) | (single_result & 0xf0000000);
|
|
return(0);
|
|
}
|
|
|
|
|
|
/*
|
|
* int fpe_ldfstf(unsigned in instruction, trapframe_t *frame)
|
|
*
|
|
* LDF/STF - Load / store FP registers to / from memory
|
|
*/
|
|
|
|
|
|
int
|
|
fpe_ldfstf(instruction, frame)
|
|
unsigned int instruction;
|
|
trapframe_t *frame;
|
|
{
|
|
unsigned int *regs = &frame->tf_r0;
|
|
int offset;
|
|
int fpreg;
|
|
int reg;
|
|
u_int32_t address;
|
|
int precision;
|
|
int error = 0;
|
|
|
|
offset = (instruction & 0xff) << 2;
|
|
|
|
fpreg = (instruction >> 12) & 0x07;
|
|
reg = (instruction >> 16) & 0x0f;
|
|
precision = ((instruction & (1<<22)) ? 2 : 0)
|
|
| ((instruction & (1<<15)) ? 1 : 0);
|
|
|
|
if (!(instruction & (1<<23)))
|
|
offset = -offset;
|
|
|
|
if (reg == 15)
|
|
printf("WARNING: LDF/STF using r15\n");
|
|
|
|
address = regs[reg];
|
|
|
|
if ((instruction & (1<<24)))
|
|
address += offset;
|
|
|
|
if (!(instruction & (1 << 20))) {
|
|
PRINTF(("STF rd=%d fd=%d prec=%d offset=%d address = %08x\n",
|
|
reg, fpreg, precision, offset, address));
|
|
|
|
switch(precision) {
|
|
case 0 :
|
|
FPP_INC(FPP_STRS);
|
|
error = fpetos((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 1 :
|
|
FPP_INC(FPP_STRD);
|
|
error = fpetod((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 2 :
|
|
FPP_INC(FPP_STRE);
|
|
error = fpetoe((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 3 :
|
|
FPP_INC(FPP_STRP);
|
|
error = fpetop((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
}
|
|
} else {
|
|
PRINTF(("LDF rd=%d fd=%d prec=%d offset=%d address = %08x\n",
|
|
reg, fpreg, precision, offset, address));
|
|
|
|
switch(precision) {
|
|
case 0 :
|
|
FPP_INC(FPP_LDRS);
|
|
error = stofpe((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 1 :
|
|
FPP_INC(FPP_LDRD);
|
|
error = dtofpe((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 2 :
|
|
FPP_INC(FPP_LDRE);
|
|
error = etofpe((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
case 3 :
|
|
FPP_INC(FPP_LDRP);
|
|
error = ptofpe((u_int32_t *)address, &fpregs[fpreg]);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!(instruction & (1<<24)))
|
|
address += offset;
|
|
|
|
if ((instruction & (1<<21)))
|
|
regs[reg] = address;
|
|
|
|
return(error);
|
|
}
|
|
|
|
|
|
/* Debugging functions */
|
|
|
|
int
|
|
fpe_dump()
|
|
{
|
|
int loop;
|
|
|
|
for (loop = 0; loop < 8; loop+=2) {
|
|
PRINTF(("f%2d : %08x %08x %08x f%2d : %08x %08x %08x\n",
|
|
loop, fpregs[loop].mantissa_hi,
|
|
fpregs[loop].mantissa_lo, fpregs[loop].exponent,
|
|
loop+1, fpregs[loop+1].mantissa_hi,
|
|
fpregs[loop+1].mantissa_lo, fpregs[loop+1].exponent));
|
|
}
|
|
PRINTF(("\x1b[0mFPSR=%08x FPCR=%08x\n", fpe_status, fpe_control));
|
|
return(0);
|
|
}
|
|
|
|
|
|
#ifdef FPE_PROF
|
|
void
|
|
fpe_dump_prof()
|
|
{
|
|
printf("adf : %6d\n", fp_profile[FPP_ADD]);
|
|
printf("suf : %6d\n", fp_profile[FPP_SUB]);
|
|
printf("muf : %6d\n", fp_profile[FPP_MUL]);
|
|
printf("dvf : %6d\n", fp_profile[FPP_DIV]);
|
|
printf("cmf : %6d\n", fp_profile[FPP_CMF]);
|
|
printf("cnf : %6d\n", fp_profile[FPP_CNF]);
|
|
printf("fix : %6d\n", fp_profile[FPP_FIX]);
|
|
printf("flt : %6d\n", fp_profile[FPP_FLT]);
|
|
printf("abs : %6d\n", fp_profile[FPP_ABS]);
|
|
printf("mvf : %6d\n", fp_profile[FPP_MOV]);
|
|
printf("mnf : %6d\n", fp_profile[FPP_MVN]);
|
|
printf("rdf : %6d\n", fp_profile[FPP_RDV]);
|
|
printf("rsf : %6d\n", fp_profile[FPP_RSB]);
|
|
printf("strs: %6d\n", fp_profile[FPP_STRS]);
|
|
printf("strd: %6d\n", fp_profile[FPP_STRD]);
|
|
printf("stre: %6d\n", fp_profile[FPP_STRE]);
|
|
printf("strp: %6d\n", fp_profile[FPP_STRP]);
|
|
printf("ldrs: %6d\n", fp_profile[FPP_LDRS]);
|
|
printf("ldrd: %6d\n", fp_profile[FPP_LDRD]);
|
|
printf("ldre: %6d\n", fp_profile[FPP_LDRE]);
|
|
printf("ldrp: %6d\n", fp_profile[FPP_LDRP]);
|
|
}
|
|
#else
|
|
void
|
|
fpe_dump_prof()
|
|
{
|
|
printf("kernel not compiled with FPE profiling\n");
|
|
}
|
|
#endif
|
|
|
|
/* End of fpe.c */
|