1291 lines
34 KiB
ArmAsm
1291 lines
34 KiB
ArmAsm
/* $NetBSD: locore.s,v 1.39 1996/06/17 15:40:52 gwr Exp $ */
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/*
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* Copyright (c) 1994, 1995 Gordon W. Ross
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* Copyright (c) 1993 Adam Glass
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1980, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: locore.s 1.66 92/12/22$
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* @(#)locore.s 8.6 (Berkeley) 5/27/94
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*/
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#include "assym.h"
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#include <machine/trap.h>
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| Remember this is a fun project. (Thanks, Adam. I try! 8^)
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| This is for kvm_mkdb, and should be the address of the beginning
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| of the kernel text segment (not necessarily the same as kernbase).
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.text
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.globl _kernel_text
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_kernel_text:
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| This is the entry point, as well as the end of the temporary stack
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| used during process switch (one 8K page ending at start)
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.globl tmpstk
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tmpstk:
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.globl start
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start:
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| First we need to set it up so we can access the sun MMU, and be otherwise
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| undisturbed. Until otherwise noted, all code must be position independent
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| as the boot loader put us low in memory, but we are linked high.
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movw #PSL_HIGHIPL, sr | no interrupts
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moveq #FC_CONTROL, d0 | make movs access "control"
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movc d0, sfc | space where the sun3 designers
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movc d0, dfc | put all the "useful" stuff
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| Set context zero and stay there until pmap_bootstrap.
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moveq #0, d0
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movsb d0, CONTEXT_REG
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| In order to "move" the kernel to high memory, we are going to copy the
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| first 4 Mb of pmegs such that we will be mapped at the linked address.
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| This is all done by copying in the segment map (top-level MMU table).
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| We will unscramble which PMEGs we actually need later.
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movl #(SEGMAP_BASE+0), a0 | src
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movl #(SEGMAP_BASE+KERNBASE), a1 | dst
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movl #(0x400000/NBSG), d0 | count
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L_per_pmeg:
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movsb a0@, d1 | copy segmap entry
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movsb d1, a1@
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addl #NBSG, a0 | increment pointers
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addl #NBSG, a1
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subql #1, d0 | decrement count
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bgt L_per_pmeg
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| Kernel is now double mapped at zero and KERNBASE.
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| Force a long jump to the relocated code (high VA).
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movl #IC_CLEAR, d0 | Flush the I-cache
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movc d0, cacr
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jmp L_high_code:l | long jump
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L_high_code:
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| We are now running in the correctly relocated kernel, so
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| we are no longer restricted to position-independent code.
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| Do bootstrap stuff needed before main() gets called.
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| Our boot loader leaves a copy of the kernel's exec header
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| just before the start of the kernel text segment, so the
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| kernel can sanity-check the DDB symbols at [end...esym].
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| Pass the struct exec at tmpstk-32 to sun3_bootstrap().
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lea tmpstk-32, sp
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jsr _sun3_bootstrap
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| Now that sun3_bootstrap is done using the PROM setcxsegmap
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| we can safely set the sfc/dfc to something != FC_CONTROL
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moveq #FC_USERD, d0 | make movs access "user data"
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movc d0, sfc | space for copyin/copyout
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movc d0, dfc
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| Setup process zero user/kernel stacks.
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movl _proc0paddr,a1 | get proc0 pcb addr
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lea a1@(USPACE-4),sp | set SSP to last word
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movl #USRSTACK-4,a2
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movl a2,usp | init user SP
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| Note curpcb was already set in sun3_bootstrap.
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| Will do fpu initialization during autoconfig (see fpu.c)
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| The interrupt vector table and stack are now ready.
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movw #PSL_LOWIPL,sr | lower SPL
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/*
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* Final preparation for calling main.
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*
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* Create a fake exception frame that returns to user mode,
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* and save its address in p->p_md.md_regs for cpu_fork().
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* The new frames for process 1 and 2 will be adjusted by
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* cpu_set_kpc() to arrange for a call to a kernel function
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* before the new process does its rte out to user mode.
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*/
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clrw sp@- | vector offset/frame type
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clrl sp@- | PC - filled in by "execve"
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movw #PSL_USER,sp@- | in user mode
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clrl sp@- | stack adjust count and padding
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lea sp@(-64),sp | construct space for D0-D7/A0-A7
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lea _proc0,a0 | proc0 in a0
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movl sp,a0@(P_MDREGS) | save frame for proc0
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movl usp,a1
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movl a1,sp@(FR_SP) | save user stack pointer in frame
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jbsr _main | main()
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trap #15 | should not get here
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| This is used by cpu_fork() to return to user mode.
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| It is called with SP pointing to a struct trapframe.
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.globl _proc_do_uret
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_proc_do_uret:
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movl sp@(FR_SP),a0 | grab and load
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movl a0,usp | user SP
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moveml sp@+,#0x7FFF | load most registers (all but SSP)
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addql #8,sp | pop SSP and stack adjust count
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rte
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/*
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* proc_trampoline:
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* This is used by cpu_set_kpc() to "push" a function call onto the
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* kernel stack of some process, very much like a signal delivery.
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* When we get here, the stack has:
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*
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* SP+8: switchframe from before cpu_set_kpc
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* SP+4: void *proc;
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* SP: u_long func;
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*
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* On entry, the switchframe pushed by cpu_set_kpc has already been
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* popped off the stack, so all this needs to do is pop the function
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* pointer into a register, call it, then pop the arg, and finally
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* return using the switchframe that remains on the stack.
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*/
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.globl _proc_trampoline
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_proc_trampoline:
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movl sp@+,a0 | function pointer
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jbsr a0@ | (*func)(procp)
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addql #4,sp | toss the arg
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rts | as cpu_switch would do
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| That is all the assembly startup code we need on the sun3!
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| The rest of this is like the hp300/locore.s where possible.
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/*
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* Trap/interrupt vector routines
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*/
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.globl _buserr, _addrerr, _illinst, _zerodiv, _chkinst
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.globl _trapvinst, _privinst, _trace, _badtrap, _fmterr
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.globl _trap0, _trap1, _trap2, _trap12, _trap15
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.globl _coperr, _fpfline, _fpunsupp
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.globl _trap, _nofault, _longjmp
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_buserr:
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tstl _nofault | device probe?
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jeq _addrerr | no, handle as usual
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movl _nofault,sp@- | yes,
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jbsr _longjmp | longjmp(nofault)
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_addrerr:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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lea sp@(FR_HW),a1 | grab base of HW berr frame
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moveq #0,d0
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movw a1@(10),d0 | grab SSW for fault processing
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btst #12,d0 | RB set?
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jeq LbeX0 | no, test RC
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bset #14,d0 | yes, must set FB
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movw d0,a1@(10) | for hardware too
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LbeX0:
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btst #13,d0 | RC set?
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jeq LbeX1 | no, skip
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bset #15,d0 | yes, must set FC
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movw d0,a1@(10) | for hardware too
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LbeX1:
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btst #8,d0 | data fault?
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jeq Lbe0 | no, check for hard cases
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movl a1@(16),d1 | fault address is as given in frame
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jra Lbe10 | thats it
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Lbe0:
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btst #4,a1@(6) | long (type B) stack frame?
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jne Lbe4 | yes, go handle
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movl a1@(2),d1 | no, can use save PC
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btst #14,d0 | FB set?
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jeq Lbe3 | no, try FC
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addql #4,d1 | yes, adjust address
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jra Lbe10 | done
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Lbe3:
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btst #15,d0 | FC set?
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jeq Lbe10 | no, done
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addql #2,d1 | yes, adjust address
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jra Lbe10 | done
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Lbe4:
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movl a1@(36),d1 | long format, use stage B address
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btst #15,d0 | FC set?
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jeq Lbe10 | no, all done
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subql #2,d1 | yes, adjust address
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Lbe10:
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movl d1,sp@- | push fault VA
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movl d0,sp@- | and padded SSW
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movw a1@(6),d0 | get frame format/vector offset
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andw #0x0FFF,d0 | clear out frame format
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cmpw #12,d0 | address error vector?
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jeq Lisaerr | yes, go to it
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/*
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* the sun3 specific code
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*
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* our mission: figure out whether what we are looking at is
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* bus error in the UNIX sense, or
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* a memory error i.e a page fault
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*
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* [this code replaces similarly mmu specific code in the hp300 code]
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*/
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sun3_mmu_specific:
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clrl d0 | make sure top bits are cleard too
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movl d1, sp@- | save d1
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movc sfc, d1 | save sfc to d1
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moveq #FC_CONTROL, d0 | sfc = FC_CONTROL
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movc d0, sfc
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movsb BUSERR_REG, d0 | get value of bus error register
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movc d1, sfc | restore sfc
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movl sp@+, d1 | restore d1
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andb #BUSERR_MMU, d0 | is this an MMU fault?
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jeq Lisberr | non-MMU bus error
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/* End of sun3 specific code. */
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Lismerr:
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movl #T_MMUFLT,sp@- | show that we are an MMU fault
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jra Ltrapnstkadj | and deal with it
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Lisaerr:
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movl #T_ADDRERR,sp@- | mark address error
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jra Ltrapnstkadj | and deal with it
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Lisberr:
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movl #T_BUSERR,sp@- | mark bus error
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Ltrapnstkadj:
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jbsr _trap | handle the error
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lea sp@(12),sp | pop value args
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movl sp@(FR_SP),a0 | restore user SP
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movl a0,usp | from save area
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movw sp@(FR_ADJ),d0 | need to adjust stack?
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jne Lstkadj | yes, go to it
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moveml sp@+,#0x7FFF | no, restore most user regs
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addql #8,sp | toss SSP and stkadj
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jra rei | all done
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Lstkadj:
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lea sp@(FR_HW),a1 | pointer to HW frame
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addql #8,a1 | source pointer
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movl a1,a0 | source
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addw d0,a0 | + hole size = dest pointer
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movl a1@-,a0@- | copy
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movl a1@-,a0@- | 8 bytes
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movl a0,sp@(FR_SP) | new SSP
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moveml sp@+,#0x7FFF | restore user registers
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movl sp@,sp | and our SP
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jra rei | all done
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/*
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* FP exceptions.
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*/
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_fpfline:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save registers
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moveq #T_FPEMULI,d0 | denote as FP emulation trap
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jra fault | do it
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_fpunsupp:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save registers
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moveq #T_FPEMULD,d0 | denote as FP emulation trap
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jra fault | do it
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/*
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* Handles all other FP coprocessor exceptions.
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* Note that since some FP exceptions generate mid-instruction frames
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* and may cause signal delivery, we need to test for stack adjustment
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* after the trap call.
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*/
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.globl _fpfault
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_fpfault:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | and save
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movl a0,sp@(FR_SP) | the user stack pointer
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clrl sp@- | no VA arg
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movl _curpcb,a0 | current pcb
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lea a0@(PCB_FPCTX),a0 | address of FP savearea
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fsave a0@ | save state
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tstb a0@ | null state frame?
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jeq Lfptnull | yes, safe
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clrw d0 | no, need to tweak BIU
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movb a0@(1),d0 | get frame size
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bset #3,a0@(0,d0:w) | set exc_pend bit of BIU
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Lfptnull:
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fmovem fpsr,sp@- | push fpsr as code argument
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frestore a0@ | restore state
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movl #T_FPERR,sp@- | push type arg
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jra Ltrapnstkadj | call trap and deal with stack cleanup
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/*
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* Coprocessor and format errors can generate mid-instruction stack
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* frames and cause signal delivery hence we need to check for potential
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* stack adjustment.
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*/
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_coperr:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@-
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movl usp,a0 | get and save
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movl a0,sp@(FR_SP) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl #T_COPERR,sp@- | push trap type
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jra Ltrapnstkadj | call trap and deal with stack adjustments
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_fmterr:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@-
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movl usp,a0 | get and save
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movl a0,sp@(FR_SP) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl #T_FMTERR,sp@- | push trap type
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jra Ltrapnstkadj | call trap and deal with stack adjustments
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/*
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* Other exceptions only cause four and six word stack frame and require
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* no post-trap stack adjustment.
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*/
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_illinst:
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clrl sp@-
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moveml #0xFFFF,sp@-
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moveq #T_ILLINST,d0
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jra fault
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_zerodiv:
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clrl sp@-
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moveml #0xFFFF,sp@-
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moveq #T_ZERODIV,d0
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jra fault
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_chkinst:
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clrl sp@-
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moveml #0xFFFF,sp@-
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moveq #T_CHKINST,d0
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jra fault
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_trapvinst:
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clrl sp@-
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moveml #0xFFFF,sp@-
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moveq #T_TRAPVINST,d0
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jra fault
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_privinst:
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clrl sp@-
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moveml #0xFFFF,sp@-
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moveq #T_PRIVINST,d0
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jra fault
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.globl fault
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fault:
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movl usp,a0 | get and save
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movl a0,sp@(FR_SP) | the user stack pointer
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clrl sp@- | no VA arg
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clrl sp@- | or code arg
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movl d0,sp@- | push trap type
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jbsr _trap | handle trap
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lea sp@(12),sp | pop value args
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movl sp@(FR_SP),a0 | restore
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movl a0,usp | user SP
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moveml sp@+,#0x7FFF | restore most user regs
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addql #8,sp | pop SP and stack adjust
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jra rei | all done
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.globl _straytrap
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_badtrap:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save std frame regs
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jbsr _straytrap | report
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moveml sp@+,#0xFFFF | restore regs
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addql #4, sp | stack adjust count
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jra rei | all done
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/*
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* Trap 0 is for system calls
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*/
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.globl _syscall
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_trap0:
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clrl sp@- | stack adjust count
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moveml #0xFFFF,sp@- | save user registers
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movl usp,a0 | save the user SP
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movl a0,sp@(FR_SP) | in the savearea
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movl d0,sp@- | push syscall number
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jbsr _syscall | handle it
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addql #4,sp | pop syscall arg
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movl sp@(FR_SP),a0 | grab and restore
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movl a0,usp | user SP
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moveml sp@+,#0x7FFF | restore most registers
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addql #8,sp | pop SP and stack adjust
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jra rei | all done
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/*
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* Trap 1 is either:
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* sigreturn (native NetBSD executable)
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* breakpoint (HPUX executable)
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*/
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_trap1:
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#if 0 /* COMPAT_HPUX */
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/* If process is HPUX, this is a user breakpoint. */
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jne trap15 | breakpoint
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#endif
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/* fall into sigreturn */
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/*
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* The sigreturn() syscall comes here. It requires special handling
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* because we must open a hole in the stack to fill in the (possibly much
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* larger) original stack frame.
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*/
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sigreturn:
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lea sp@(-84),sp | leave enough space for largest frame
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movl sp@(84),sp@ | move up current 8 byte frame
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movl sp@(88),sp@(4)
|
|
movl #84,sp@- | default: adjust by 84 bytes
|
|
moveml #0xFFFF,sp@- | save user registers
|
|
movl usp,a0 | save the user SP
|
|
movl a0,sp@(FR_SP) | in the savearea
|
|
movl #SYS_sigreturn,sp@- | push syscall number
|
|
jbsr _syscall | handle it
|
|
addql #4,sp | pop syscall#
|
|
movl sp@(FR_SP),a0 | grab and restore
|
|
movl a0,usp | user SP
|
|
lea sp@(FR_HW),a1 | pointer to HW frame
|
|
movw sp@(FR_ADJ),d0 | do we need to adjust the stack?
|
|
jeq Lsigr1 | no, just continue
|
|
moveq #92,d1 | total size
|
|
subw d0,d1 | - hole size = frame size
|
|
lea a1@(92),a0 | destination
|
|
addw d1,a1 | source
|
|
lsrw #1,d1 | convert to word count
|
|
subqw #1,d1 | minus 1 for dbf
|
|
Lsigrlp:
|
|
movw a1@-,a0@- | copy a word
|
|
dbf d1,Lsigrlp | continue
|
|
movl a0,a1 | new HW frame base
|
|
Lsigr1:
|
|
movl a1,sp@(FR_SP) | new SP value
|
|
moveml sp@+,#0x7FFF | restore user registers
|
|
movl sp@,sp | and our SP
|
|
jra rei | all done
|
|
|
|
/*
|
|
* Trap 2 is one of:
|
|
* NetBSD: not used (ignore)
|
|
* SunOS: Some obscure FPU operation
|
|
* HPUX: sigreturn
|
|
*/
|
|
_trap2:
|
|
#if 0 /* COMPAT_HPUX */
|
|
/* XXX: If HPUX, this is a user breakpoint. */
|
|
jne sigreturn
|
|
#endif
|
|
/* fall into trace (NetBSD or SunOS) */
|
|
|
|
/*
|
|
* Trace (single-step) trap. Kernel-mode is special.
|
|
* User mode traps are simply passed on to trap().
|
|
*/
|
|
_trace:
|
|
clrl sp@- | stack adjust count
|
|
moveml #0xFFFF,sp@-
|
|
moveq #T_TRACE,d0
|
|
movw sp@(FR_HW),d1 | get PSW
|
|
andw #PSL_S,d1 | from system mode?
|
|
jne kbrkpt | yes, kernel breakpoint
|
|
jra fault | no, user-mode fault
|
|
|
|
/*
|
|
* Trap 15 is used for:
|
|
* - GDB breakpoints (in user programs)
|
|
* - KGDB breakpoints (in the kernel)
|
|
* - trace traps for SUN binaries (not fully supported yet)
|
|
* User mode traps are passed simply passed to trap()
|
|
*/
|
|
_trap15:
|
|
clrl sp@- | stack adjust count
|
|
moveml #0xFFFF,sp@-
|
|
moveq #T_TRAP15,d0
|
|
movw sp@(FR_HW),d1 | get PSW
|
|
andw #PSL_S,d1 | from system mode?
|
|
jne kbrkpt | yes, kernel breakpoint
|
|
jra fault | no, user-mode fault
|
|
|
|
kbrkpt: | Kernel-mode breakpoint or trace trap. (d0=trap_type)
|
|
| Save the system sp rather than the user sp.
|
|
movw #PSL_HIGHIPL,sr | lock out interrupts
|
|
lea sp@(FR_SIZE),a6 | Save stack pointer
|
|
movl a6,sp@(FR_SP) | from before trap
|
|
|
|
| If we are not on tmpstk switch to it.
|
|
| (so debugger can change the stack pointer)
|
|
movl a6,d1
|
|
cmpl #tmpstk,d1
|
|
jls Lbrkpt2 | already on tmpstk
|
|
| Copy frame to the temporary stack
|
|
movl sp,a0 | a0=src
|
|
lea tmpstk-96,a1 | a1=dst
|
|
movl a1,sp | sp=new frame
|
|
moveq #FR_SIZE,d1
|
|
Lbrkpt1:
|
|
movl a0@+,a1@+
|
|
subql #4,d1
|
|
bgt Lbrkpt1
|
|
|
|
Lbrkpt2:
|
|
| Call the trap handler for the kernel debugger.
|
|
| Do not call trap() to do it, so that we can
|
|
| set breakpoints in trap() if we want. We know
|
|
| the trap type is either T_TRACE or T_BREAKPOINT.
|
|
| If we have both DDB and KGDB, let KGDB see it first,
|
|
| because KGDB will just return 0 if not connected.
|
|
| Save args in d2, a2
|
|
movl d0,d2 | trap type
|
|
movl sp,a2 | frame ptr
|
|
#ifdef KGDB
|
|
| Let KGDB handle it (if connected)
|
|
movl a2,sp@- | push frame ptr
|
|
movl d2,sp@- | push trap type
|
|
jbsr _kgdb_trap | handle the trap
|
|
addql #8,sp | pop args
|
|
cmpl #0,d0 | did kgdb handle it
|
|
jne Lbrkpt3 | yes, done
|
|
#endif
|
|
#ifdef DDB
|
|
| Let DDB handle it.
|
|
movl a2,sp@- | push frame ptr
|
|
movl d2,sp@- | push trap type
|
|
jbsr _kdb_trap | handle the trap
|
|
addql #8,sp | pop args
|
|
cmpl #0,d0 | did ddb handle it
|
|
jne Lbrkpt3 | yes, done
|
|
#endif
|
|
| Drop into the PROM temporarily...
|
|
movl a2,sp@- | push frame ptr
|
|
movl d2,sp@- | push trap type
|
|
jbsr _nodb_trap | handle the trap
|
|
addql #8,sp | pop args
|
|
Lbrkpt3:
|
|
| The stack pointer may have been modified, or
|
|
| data below it modified (by kgdb push call),
|
|
| so push the hardware frame at the current sp
|
|
| before restoring registers and returning.
|
|
|
|
movl sp@(FR_SP),a0 | modified sp
|
|
lea sp@(FR_SIZE),a1 | end of our frame
|
|
movl a1@-,a0@- | copy 2 longs with
|
|
movl a1@-,a0@- | ... predecrement
|
|
movl a0,sp@(FR_SP) | sp = h/w frame
|
|
moveml sp@+,#0x7FFF | restore all but sp
|
|
movl sp@,sp | ... and sp
|
|
rte | all done
|
|
|
|
/*
|
|
* Trap 12 is the entry point for the cachectl "syscall"
|
|
* cachectl(command, addr, length)
|
|
* command in d0, addr in a1, length in d1
|
|
*/
|
|
.globl _cachectl
|
|
_trap12:
|
|
movl d1,sp@- | push length
|
|
movl a1,sp@- | push addr
|
|
movl d0,sp@- | push command
|
|
jbsr _cachectl | do it
|
|
lea sp@(12),sp | pop args
|
|
jra rei | all done
|
|
|
|
/*
|
|
* Interrupt handlers. Most are auto-vectored,
|
|
* and hard-wired the same way on all sun3 models.
|
|
*/
|
|
|
|
#define INTERRUPT_SAVEREG \
|
|
moveml #0xC0C0,sp@-
|
|
|
|
#define INTERRUPT_RESTORE \
|
|
moveml sp@+,#0x0303
|
|
|
|
.align 4
|
|
/*
|
|
* This is the common auto-vector interrupt handler,
|
|
* for which the CPU provides the vector=0x18+level.
|
|
* These are installed in the interrupt vector table.
|
|
*/
|
|
.globl __isr_autovec
|
|
__isr_autovec:
|
|
INTERRUPT_SAVEREG
|
|
movw sp@(22),sp@- | push exception vector info
|
|
clrw sp@-
|
|
jbsr _isr_autovec | C dispatcher
|
|
addql #4,sp
|
|
INTERRUPT_RESTORE
|
|
jra rei /* XXX - Just do rte here? */
|
|
|
|
/* clock: see clock.c */
|
|
.globl __isr_clock, _interrupt_reg, _clock_intr, _clock_va
|
|
.align 4
|
|
__isr_clock:
|
|
INTERRUPT_SAVEREG | save a0, a1, d0, d1
|
|
movl _clock_va, a0
|
|
movl _interrupt_reg, a1
|
|
tstb a0@(INTERSIL_INTR_OFFSET)
|
|
andb #~IREG_CLOCK_ENAB_5, a1@
|
|
orb #IREG_CLOCK_ENAB_5, a1@
|
|
tstb a0@(INTERSIL_INTR_OFFSET)
|
|
| used to have "timebomb" check here...
|
|
lea sp@(16),a1 | a1 = &clockframe
|
|
movl a1,sp@-
|
|
jbsr _clock_intr
|
|
addql #4,sp
|
|
INTERRUPT_RESTORE
|
|
jra rei
|
|
|
|
| Handler for all vectored interrupts (i.e. VME interrupts)
|
|
.globl _isr_vectored
|
|
.globl __isr_vectored
|
|
__isr_vectored:
|
|
INTERRUPT_SAVEREG
|
|
movw sp@(22),sp@- | push exception vector info
|
|
clrw sp@-
|
|
jbsr _isr_vectored | C dispatcher
|
|
addql #4,sp |
|
|
INTERRUPT_RESTORE
|
|
jra rei | all done
|
|
|
|
|
|
#undef INTERRUPT_SAVEREG
|
|
#undef INTERRUPT_RESTORE
|
|
|
|
/* interrupt counters (needed by vmstat) */
|
|
.globl _intrcnt,_eintrcnt,_intrnames,_eintrnames
|
|
_intrnames:
|
|
.asciz "spur" | 0
|
|
.asciz "lev1" | 1
|
|
.asciz "lev2" | 2
|
|
.asciz "lev3" | 3
|
|
.asciz "lev4" | 4
|
|
.asciz "clock" | 5
|
|
.asciz "lev6" | 6
|
|
.asciz "nmi" | 7
|
|
_eintrnames:
|
|
|
|
.data
|
|
.even
|
|
_intrcnt:
|
|
.long 0,0,0,0,0,0,0,0,0,0
|
|
_eintrcnt:
|
|
.text
|
|
|
|
/*
|
|
* Emulation of VAX REI instruction.
|
|
*
|
|
* This code is (mostly) un-altered from the hp300 code,
|
|
* except that sun machines do not need a simulated SIR
|
|
* because they have a real software interrupt register.
|
|
*
|
|
* This code deals with checking for and servicing ASTs
|
|
* (profiling, scheduling) and software interrupts (network, softclock).
|
|
* We check for ASTs first, just like the VAX. To avoid excess overhead
|
|
* the T_ASTFLT handling code will also check for software interrupts so we
|
|
* do not have to do it here. After identifying that we need an AST we
|
|
* drop the IPL to allow device interrupts.
|
|
*
|
|
* This code is complicated by the fact that sendsig may have been called
|
|
* necessitating a stack cleanup.
|
|
*/
|
|
|
|
.globl _astpending
|
|
.globl rei
|
|
rei:
|
|
#ifdef DIAGNOSTIC
|
|
tstl _panicstr | have we paniced?
|
|
jne Ldorte | yes, do not make matters worse
|
|
#endif
|
|
tstl _astpending | AST pending?
|
|
jeq Ldorte | no, done
|
|
Lrei1:
|
|
btst #5,sp@ | yes, are we returning to user mode?
|
|
jne Ldorte | no, done
|
|
movw #PSL_LOWIPL,sr | lower SPL
|
|
clrl sp@- | stack adjust
|
|
moveml #0xFFFF,sp@- | save all registers
|
|
movl usp,a1 | including
|
|
movl a1,sp@(FR_SP) | the users SP
|
|
clrl sp@- | VA == none
|
|
clrl sp@- | code == none
|
|
movl #T_ASTFLT,sp@- | type == async system trap
|
|
jbsr _trap | go handle it
|
|
lea sp@(12),sp | pop value args
|
|
movl sp@(FR_SP),a0 | restore user SP
|
|
movl a0,usp | from save area
|
|
movw sp@(FR_ADJ),d0 | need to adjust stack?
|
|
jne Laststkadj | yes, go to it
|
|
moveml sp@+,#0x7FFF | no, restore most user regs
|
|
addql #8,sp | toss SP and stack adjust
|
|
rte | and do real RTE
|
|
Laststkadj:
|
|
lea sp@(FR_HW),a1 | pointer to HW frame
|
|
addql #8,a1 | source pointer
|
|
movl a1,a0 | source
|
|
addw d0,a0 | + hole size = dest pointer
|
|
movl a1@-,a0@- | copy
|
|
movl a1@-,a0@- | 8 bytes
|
|
movl a0,sp@(FR_SP) | new SSP
|
|
moveml sp@+,#0x7FFF | restore user registers
|
|
movl sp@,sp | and our SP
|
|
Ldorte:
|
|
rte | real return
|
|
|
|
/*
|
|
* Initialization is at the beginning of this file, because the
|
|
* kernel entry point needs to be at zero for compatibility with
|
|
* the Sun boot loader. This works on Sun machines because the
|
|
* interrupt vector table for reset is NOT at address zero.
|
|
* (The MMU has a "boot" bit that forces access to the PROM)
|
|
*/
|
|
|
|
/*
|
|
* Signal "trampoline" code (18 bytes). Invoked from RTE setup by sendsig().
|
|
*
|
|
* Stack looks like:
|
|
*
|
|
* sp+0 -> signal number
|
|
* sp+4 signal specific code
|
|
* sp+8 pointer to signal context frame (scp)
|
|
* sp+12 address of handler
|
|
* sp+16 saved hardware state
|
|
* .
|
|
* .
|
|
* scp+0-> beginning of signal context frame
|
|
*/
|
|
.globl _sigcode, _esigcode
|
|
.data
|
|
.align 2
|
|
_sigcode: /* Found at address: 0x0DFFffdc */
|
|
movl sp@(12),a0 | signal handler addr (4 bytes)
|
|
jsr a0@ | call signal handler (2 bytes)
|
|
addql #4,sp | pop signo (2 bytes)
|
|
trap #1 | special syscall entry (2 bytes)
|
|
movl d0,sp@(4) | save errno (4 bytes)
|
|
moveq #1,d0 | syscall == exit (2 bytes)
|
|
trap #0 | exit(errno) (2 bytes)
|
|
.align 2
|
|
_esigcode:
|
|
.text
|
|
|
|
/* XXX - hp300 still has icode here... */
|
|
|
|
/*
|
|
* Primitives
|
|
*/
|
|
#include <machine/asm.h>
|
|
|
|
/* XXX copypage(fromaddr, toaddr) */
|
|
|
|
/*
|
|
* non-local gotos
|
|
*/
|
|
ENTRY(setjmp)
|
|
movl sp@(4),a0 | savearea pointer
|
|
moveml #0xFCFC,a0@ | save d2-d7/a2-a7
|
|
movl sp@,a0@(48) | and return address
|
|
moveq #0,d0 | return 0
|
|
rts
|
|
|
|
ENTRY(longjmp)
|
|
movl sp@(4),a0
|
|
moveml a0@+,#0xFCFC
|
|
movl a0@,sp@
|
|
moveq #1,d0
|
|
rts
|
|
|
|
/*
|
|
* The following primitives manipulate the run queues.
|
|
* _whichqs tells which of the 32 queues _qs have processes in them.
|
|
* Setrunqueue puts processes into queues, Remrunqueue removes them
|
|
* from queues. The running process is on no queue, other processes
|
|
* are on a queue related to p->p_priority, divided by 4 actually to
|
|
* shrink the 0-127 range of priorities into the 32 available queues.
|
|
*/
|
|
|
|
.globl _whichqs,_qs,_cnt,_panic
|
|
.globl _curproc
|
|
.comm _want_resched,4
|
|
|
|
/*
|
|
* setrunqueue(p)
|
|
*
|
|
* Call should be made at splclock(), and p->p_stat should be SRUN
|
|
*/
|
|
ENTRY(setrunqueue)
|
|
movl sp@(4),a0
|
|
#ifdef DIAGNOSTIC
|
|
tstl a0@(P_BACK)
|
|
jne Lset1
|
|
tstl a0@(P_WCHAN)
|
|
jne Lset1
|
|
cmpb #SRUN,a0@(P_STAT)
|
|
jne Lset1
|
|
#endif
|
|
clrl d0
|
|
movb a0@(P_PRIORITY),d0
|
|
lsrb #2,d0
|
|
movl _whichqs,d1
|
|
bset d0,d1
|
|
movl d1,_whichqs
|
|
lslb #3,d0
|
|
addl #_qs,d0
|
|
movl d0,a0@(P_FORW)
|
|
movl d0,a1
|
|
movl a1@(P_BACK),a0@(P_BACK)
|
|
movl a0,a1@(P_BACK)
|
|
movl a0@(P_BACK),a1
|
|
movl a0,a1@(P_FORW)
|
|
rts
|
|
#ifdef DIAGNOSTIC
|
|
Lset1:
|
|
movl #Lset2,sp@-
|
|
jbsr _panic
|
|
Lset2:
|
|
.asciz "setrunqueue"
|
|
.even
|
|
#endif
|
|
|
|
/*
|
|
* remrq(p)
|
|
*
|
|
* Call should be made at splclock().
|
|
*/
|
|
ENTRY(remrq)
|
|
movl sp@(4),a0 | proc *p
|
|
clrl d0
|
|
movb a0@(P_PRIORITY),d0
|
|
lsrb #2,d0
|
|
movl _whichqs,d1
|
|
bclr d0,d1 | if ((d1 & (1 << d0)) == 0)
|
|
jeq Lrem2 | panic (empty queue)
|
|
movl d1,_whichqs
|
|
movl a0@(P_FORW),a1
|
|
movl a0@(P_BACK),a1@(P_BACK)
|
|
movl a0@(P_BACK),a1
|
|
movl a0@(P_FORW),a1@(P_FORW)
|
|
movl #_qs,a1
|
|
movl d0,d1
|
|
lslb #3,d1
|
|
addl d1,a1
|
|
cmpl a1@(P_FORW),a1
|
|
jeq Lrem1
|
|
movl _whichqs,d1
|
|
bset d0,d1
|
|
movl d1,_whichqs
|
|
Lrem1:
|
|
clrl a0@(P_BACK)
|
|
rts
|
|
Lrem2:
|
|
movl #Lrem3,sp@-
|
|
jbsr _panic
|
|
Lrem3:
|
|
.asciz "remrq"
|
|
|
|
|
|
| Message for Lbadsw panic
|
|
Lsw0:
|
|
.asciz "cpu_switch"
|
|
.even
|
|
|
|
.globl _curpcb
|
|
.globl _masterpaddr | XXX compatibility (debuggers)
|
|
.data
|
|
_masterpaddr: | XXX compatibility (debuggers)
|
|
_curpcb:
|
|
.long 0
|
|
mdpflag:
|
|
.byte 0 | copy of proc md_flags low byte
|
|
.align 2
|
|
.comm nullpcb,SIZEOF_PCB
|
|
.text
|
|
|
|
/*
|
|
* At exit of a process, do a cpu_switch for the last time.
|
|
* Switch to a safe stack and PCB, and deallocate the process's resources.
|
|
* The ipl is high enough to prevent the memory from being reallocated.
|
|
*/
|
|
ENTRY(switch_exit)
|
|
movl sp@(4),a0 | struct proc *p
|
|
movl #nullpcb,_curpcb | save state into garbage pcb
|
|
lea tmpstk,sp | goto a tmp stack
|
|
movl a0,sp@- | pass proc ptr down
|
|
|
|
/* Free old process's u-area. */
|
|
movl #USPACE,sp@- | size of u-area
|
|
movl a0@(P_ADDR),sp@- | address of process's u-area
|
|
movl _kernel_map,sp@- | map it was allocated in
|
|
jbsr _kmem_free | deallocate it
|
|
lea sp@(12),sp | pop args
|
|
|
|
jra _cpu_switch
|
|
|
|
/*
|
|
* When no processes are on the runq, cpu_switch() branches to idle
|
|
* to wait for something to come ready.
|
|
*/
|
|
.data
|
|
.globl _Idle_count
|
|
_Idle_count:
|
|
.long 0
|
|
.text
|
|
|
|
.globl Idle
|
|
Lidle:
|
|
stop #PSL_LOWIPL
|
|
Idle:
|
|
movw #PSL_HIGHIPL,sr
|
|
addql #1, _Idle_count
|
|
tstl _whichqs
|
|
jeq Lidle
|
|
movw #PSL_LOWIPL,sr
|
|
jra Lsw1
|
|
|
|
Lbadsw:
|
|
movl #Lsw0,sp@-
|
|
jbsr _panic
|
|
/*NOTREACHED*/
|
|
|
|
/*
|
|
* cpu_switch()
|
|
* Hacked for sun3
|
|
* XXX - Arg 1 is a proc pointer (curproc) but this doesn't use it.
|
|
* XXX - Sould we use p->p_addr instead of curpcb? -gwr
|
|
*/
|
|
ENTRY(cpu_switch)
|
|
movl _curpcb,a1 | current pcb
|
|
movw sr,a1@(PCB_PS) | save sr before changing ipl
|
|
#ifdef notyet
|
|
movl _curproc,sp@- | remember last proc running
|
|
#endif
|
|
clrl _curproc
|
|
|
|
Lsw1:
|
|
/*
|
|
* Find the highest-priority queue that isn't empty,
|
|
* then take the first proc from that queue.
|
|
*/
|
|
clrl d0
|
|
lea _whichqs,a0
|
|
movl a0@,d1
|
|
Lswchk:
|
|
btst d0,d1
|
|
jne Lswfnd
|
|
addqb #1,d0
|
|
cmpb #32,d0
|
|
jne Lswchk
|
|
jra Idle
|
|
Lswfnd:
|
|
movw #PSL_HIGHIPL,sr | lock out interrupts
|
|
movl a0@,d1 | and check again...
|
|
bclr d0,d1
|
|
jeq Lsw1 | proc moved, rescan
|
|
movl d1,a0@ | update whichqs
|
|
moveq #1,d1 | double check for higher priority
|
|
lsll d0,d1 | process (which may have snuck in
|
|
subql #1,d1 | while we were finding this one)
|
|
andl a0@,d1
|
|
jeq Lswok | no one got in, continue
|
|
movl a0@,d1
|
|
bset d0,d1 | otherwise put this one back
|
|
movl d1,a0@
|
|
jra Lsw1 | and rescan
|
|
Lswok:
|
|
movl d0,d1
|
|
lslb #3,d1 | convert queue number to index
|
|
addl #_qs,d1 | locate queue (q)
|
|
movl d1,a1
|
|
cmpl a1@(P_FORW),a1 | anyone on queue?
|
|
jeq Lbadsw | no, panic
|
|
movl a1@(P_FORW),a0 | p = q->p_forw
|
|
movl a0@(P_FORW),a1@(P_FORW) | q->p_forw = p->p_forw
|
|
movl a0@(P_FORW),a1 | q = p->p_forw
|
|
movl a0@(P_BACK),a1@(P_BACK) | q->p_back = p->p_back
|
|
cmpl a0@(P_FORW),d1 | anyone left on queue?
|
|
jeq Lsw2 | no, skip
|
|
movl _whichqs,d1
|
|
bset d0,d1 | yes, reset bit
|
|
movl d1,_whichqs
|
|
Lsw2:
|
|
movl a0,_curproc
|
|
clrl _want_resched
|
|
#ifdef notyet
|
|
movl sp@+,a1
|
|
cmpl a0,a1 | switching to same proc?
|
|
jeq Lswdone | yes, skip save and restore
|
|
#endif
|
|
/*
|
|
* Save state of previous process in its pcb.
|
|
*/
|
|
movl _curpcb,a1
|
|
moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers
|
|
movl usp,a2 | grab USP (a2 has been saved)
|
|
movl a2,a1@(PCB_USP) | and save it
|
|
|
|
tstl _fpu_type | Do we have an fpu?
|
|
jeq Lswnofpsave | No? Then don't try save.
|
|
lea a1@(PCB_FPCTX),a2 | pointer to FP save area
|
|
fsave a2@ | save FP state
|
|
tstb a2@ | null state frame?
|
|
jeq Lswnofpsave | yes, all done
|
|
fmovem fp0-fp7,a2@(FPF_REGS) | save FP general regs
|
|
fmovem fpcr/fpsr/fpi,a2@(FPF_FPCR) | save FP control regs
|
|
Lswnofpsave:
|
|
|
|
#ifdef DIAGNOSTIC
|
|
tstl a0@(P_WCHAN)
|
|
jne Lbadsw
|
|
cmpb #SRUN,a0@(P_STAT)
|
|
jne Lbadsw
|
|
#endif
|
|
clrl a0@(P_BACK) | clear back link
|
|
movl a0@(P_ADDR),a1 | get p_addr
|
|
movl a1,_curpcb
|
|
movb a0@(P_MDFLAG+3),mdpflag | low byte of p_md.md_flags
|
|
|
|
/* see if pmap_activate needs to be called; should remove this */
|
|
movl a0@(P_VMSPACE),a0 | vmspace = p->p_vmspace
|
|
#ifdef DIAGNOSTIC
|
|
tstl a0 | map == VM_MAP_NULL?
|
|
jeq Lbadsw | panic
|
|
#endif
|
|
|
|
| Important note: We MUST call pmap_activate to set the
|
|
| MMU context register (like setting a root table pointer).
|
|
lea a0@(VM_PMAP),a0 | pmap = &vmspace.vm_pmap
|
|
pea a1@ | push pcb (at p_addr)
|
|
pea a0@ | push pmap
|
|
jbsr _pmap_activate | pmap_activate(pmap, pcb)
|
|
addql #8,sp
|
|
movl _curpcb,a1 | restore p_addr
|
|
|
|
| XXX - Should do this in pmap_activeate only if context reg changed.
|
|
movl #IC_CLEAR,d0
|
|
movc d0,cacr
|
|
|
|
Lcxswdone:
|
|
moveml a1@(PCB_REGS),#0xFCFC | reload registers
|
|
movl a1@(PCB_USP),a0
|
|
movl a0,usp | and USP
|
|
|
|
tstl _fpu_type | If we don't have an fpu,
|
|
jeq Lres_skip | don't try to restore it.
|
|
lea a1@(PCB_FPCTX),a0 | pointer to FP save area
|
|
tstb a0@ | null state frame?
|
|
jeq Lresfprest | yes, easy
|
|
fmovem a0@(FPF_FPCR),fpcr/fpsr/fpi | restore FP control regs
|
|
fmovem a0@(FPF_REGS),fp0-fp7 | restore FP general regs
|
|
Lresfprest:
|
|
frestore a0@ | restore state
|
|
Lres_skip:
|
|
movw a1@(PCB_PS),d0 | no, restore PS
|
|
#ifdef DIAGNOSTIC
|
|
btst #13,d0 | supervisor mode?
|
|
jeq Lbadsw | no? panic!
|
|
#endif
|
|
movw d0,sr | OK, restore PS
|
|
moveq #1,d0 | return 1 (for alternate returns)
|
|
rts
|
|
|
|
/*
|
|
* savectx(pcb)
|
|
* Update pcb, saving current processor state.
|
|
*/
|
|
ENTRY(savectx)
|
|
movl sp@(4),a1
|
|
movw sr,a1@(PCB_PS)
|
|
movl usp,a0 | grab USP
|
|
movl a0,a1@(PCB_USP) | and save it
|
|
moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers
|
|
|
|
tstl _fpu_type | Do we have FPU?
|
|
jeq Lsavedone | No? Then don't save state.
|
|
lea a1@(PCB_FPCTX),a0 | pointer to FP save area
|
|
fsave a0@ | save FP state
|
|
tstb a0@ | null state frame?
|
|
jeq Lsavedone | yes, all done
|
|
fmovem fp0-fp7,a0@(FPF_REGS) | save FP general regs
|
|
fmovem fpcr/fpsr/fpi,a0@(FPF_FPCR) | save FP control regs
|
|
Lsavedone:
|
|
moveq #0,d0 | return 0
|
|
rts
|
|
|
|
/* suline() */
|
|
/* TBIA, TBIS, TBIAS, TBIAU */
|
|
|
|
/*
|
|
* Invalidate instruction cache
|
|
*/
|
|
ENTRY(ICIA)
|
|
movl #IC_CLEAR,d0
|
|
movc d0,cacr | invalidate i-cache
|
|
rts
|
|
|
|
/* DCIA, DCIS */
|
|
|
|
/*
|
|
* Invalidate data cache.
|
|
*/
|
|
ENTRY(DCIU)
|
|
rts
|
|
|
|
/* ICPL, ICPP, DCPL, DCPP, DCPA, DCFL, DCFP, PCIA */
|
|
/* ecacheon, ecacheoff */
|
|
|
|
/*
|
|
* Get callers current SP value.
|
|
* Note that simply taking the address of a local variable in a C function
|
|
* doesn't work because callee saved registers may be outside the stack frame
|
|
* defined by A6 (e.g. GCC generated code).
|
|
*
|
|
* [I don't think the ENTRY() macro will do the right thing with this -- glass]
|
|
*/
|
|
.globl _getsp
|
|
_getsp:
|
|
movl sp,d0 | get current SP
|
|
addql #4,d0 | compensate for return address
|
|
rts
|
|
|
|
ENTRY(getsfc)
|
|
movc sfc,d0
|
|
rts
|
|
|
|
ENTRY(getdfc)
|
|
movc dfc,d0
|
|
rts
|
|
|
|
ENTRY(getvbr)
|
|
movc vbr, d0
|
|
rts
|
|
|
|
ENTRY(setvbr)
|
|
movl sp@(4), d0
|
|
movc d0, vbr
|
|
rts
|
|
|
|
/* loadustp */
|
|
|
|
/*
|
|
* Set processor priority level calls. Most are implemented with
|
|
* inline asm expansions. However, we need one instantiation here
|
|
* in case some non-optimized code makes external references.
|
|
* Most places will use the inlined function param.h supplies.
|
|
*/
|
|
|
|
ENTRY(_spl)
|
|
movl sp@(4),d1
|
|
clrl d0
|
|
movw sr,d0
|
|
movw d1,sr
|
|
rts
|
|
|
|
ENTRY(getsr)
|
|
moveq #0, d0
|
|
movw sr, d0
|
|
rts
|
|
|
|
ENTRY(_insque)
|
|
movw sr,d0
|
|
movw #PSL_HIGHIPL,sr | atomic
|
|
movl sp@(8),a0 | where to insert (after)
|
|
movl sp@(4),a1 | element to insert (e)
|
|
movl a0@,a1@ | e->next = after->next
|
|
movl a0,a1@(4) | e->prev = after
|
|
movl a1,a0@ | after->next = e
|
|
movl a1@,a0
|
|
movl a1,a0@(4) | e->next->prev = e
|
|
movw d0,sr
|
|
rts
|
|
|
|
ENTRY(_remque)
|
|
movw sr,d0
|
|
movw #PSL_HIGHIPL,sr | atomic
|
|
movl sp@(4),a0 | element to remove (e)
|
|
movl a0@,a1
|
|
movl a0@(4),a0
|
|
movl a0,a1@(4) | e->next->prev = e->prev
|
|
movl a1,a0@ | e->prev->next = e->next
|
|
movw d0,sr
|
|
rts
|
|
|
|
/*
|
|
* Save and restore 68881 state.
|
|
* Pretty awful looking since our assembler does not
|
|
* recognize FP mnemonics.
|
|
*/
|
|
ENTRY(m68881_save)
|
|
movl sp@(4),a0 | save area pointer
|
|
fsave a0@ | save state
|
|
tstb a0@ | null state frame?
|
|
jeq Lm68881sdone | yes, all done
|
|
fmovem fp0-fp7,a0@(FPF_REGS) | save FP general regs
|
|
fmovem fpcr/fpsr/fpi,a0@(FPF_FPCR) | save FP control regs
|
|
Lm68881sdone:
|
|
rts
|
|
|
|
ENTRY(m68881_restore)
|
|
movl sp@(4),a0 | save area pointer
|
|
tstb a0@ | null state frame?
|
|
jeq Lm68881rdone | yes, easy
|
|
fmovem a0@(FPF_FPCR),fpcr/fpsr/fpi | restore FP control regs
|
|
fmovem a0@(FPF_REGS),fp0-fp7 | restore FP general regs
|
|
Lm68881rdone:
|
|
frestore a0@ | restore state
|
|
rts
|
|
|
|
/*
|
|
* _delay(unsigned N)
|
|
* Delay for at least (N/256) microseconds.
|
|
* This routine depends on the variable: delay_divisor
|
|
* which should be set based on the CPU clock rate.
|
|
* XXX: Currently this is set in sun3_startup.c based on the
|
|
* XXX: CPU model but this should be determined at run time...
|
|
*/
|
|
.globl __delay
|
|
__delay:
|
|
| d0 = arg = (usecs << 8)
|
|
movl sp@(4),d0
|
|
| d1 = delay_divisor;
|
|
movl _delay_divisor,d1
|
|
L_delay:
|
|
subl d1,d0
|
|
jgt L_delay
|
|
rts
|
|
|
|
|
|
| Define some addresses, mostly so DDB can print useful info.
|
|
.globl _kernbase
|
|
.set _kernbase,KERNBASE
|
|
.globl _dvma_base
|
|
.set _dvma_base,DVMA_SPACE_START
|
|
.globl _prom_start
|
|
.set _prom_start,MONSTART
|
|
.globl _prom_base
|
|
.set _prom_base,PROM_BASE
|
|
|
|
|The end!
|