f8bc001484
=============================================== This code enables NetBSD to support for NEC VR4181 CPU and some devices on L-Card+ board. NEC VR4181 ---------- NEC VR4181 is a embedded CPU which has MIPS processor core and integrated I/O devices within a package. The basic architecture of VR4181 is similar to other VR41xx family CPU. Some integrated devices are compatible to another VR41xx series CPU and some are not. VR4181 has integrated devices listed bellow: - Two of 16550 compatible UART - Compact Flash controller - ISA bus controller - Audio CODEC - A/D converters - LCD driver - Touch panel controller - General purpose I/O L-Card+ Embedded CPU Board -------------------------- L-Card+ is name card sized CPU board for embedded system. It is soled by Laser5 (http://www.laser5.co.jp/) with Linux installed. L-Card+ has following devices: - 16Mbyte flash memory (Intel 28F128) - 16Mbyte SDRAM - CS8900A Ethernet controller and RJ45 port - RS232C line driver and external connector - Compact Flash socket - A pair of Mezzanine connector for extension board - Some on-board LEDs Current Feature of This Code ---------------------------- Following devices are supported: - UART (used for console) - wi on Compact Flash socket - cs (CS8900A) - Flash memory (Intel 28F128 and Fujitsu MBM29LV160) - Audio Coder (limited support) -- Naoto Shimazaki
120 lines
4.4 KiB
C
120 lines
4.4 KiB
C
/* $NetBSD: vripif.h,v 1.4 2003/05/01 07:02:06 igy Exp $ */
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/*-
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* Copyright (c) 1999, 2002
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* Shin Takemura and PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#ifndef _VRIPIF_H_
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#define _VRIPIF_H_
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#include <hpcmips/vr/cmuvar.h>
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#include <hpcmips/vr/vrdmaauvar.h>
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#include <hpcmips/vr/vrdcuvar.h>
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#include <dev/hpc/hpciovar.h>
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/* Vrip GPIO chip IDs */
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enum vrip_iochip {
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VRIP_IOCHIP_VRGIU = 0,
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VRIP_IOCHIP_VRC4172GPIO,
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VRIP_IOCHIP_VR4181GIU,
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VRIP_NIOCHIPS
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};
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/*
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* Vrip chipset
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*/
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typedef struct vrip_chipset_tag *vrip_chipset_tag_t;
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typedef void *vrip_intr_handle_t;
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struct vrip_chipset_tag {
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void *vc_sc;
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vrcmu_chipset_tag_t vc_cc;
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vrdmaau_chipset_tag_t vc_ac;
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vrdcu_chipset_tag_t vc_dc;
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int (*vc_power)(vrip_chipset_tag_t, int, int);
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vrip_intr_handle_t (*vc_intr_establish)(vrip_chipset_tag_t, int, int,
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int, int(*)(void*), void*);
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void (*vc_intr_disestablish)(vrip_chipset_tag_t, vrip_intr_handle_t);
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void (*vc_intr_setmask1)(vrip_chipset_tag_t, vrip_intr_handle_t, int);
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void (*vc_intr_setmask2)(vrip_chipset_tag_t, vrip_intr_handle_t,
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u_int32_t, int);
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void (*vc_intr_getstatus2)(vrip_chipset_tag_t, vrip_intr_handle_t,
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u_int32_t*);
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void (*vc_register_cmu)(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
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void (*vc_register_gpio)(vrip_chipset_tag_t, hpcio_chip_t);
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void (*vc_register_dmaau)(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
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void (*vc_register_dcu)(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
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};
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/*
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* Vrip driver attach arguments.
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*/
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struct vrip_attach_args {
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vrip_chipset_tag_t va_vc; /* Chipset tag */
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int va_unit; /* unit id */
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bus_space_tag_t va_iot; /* i/o space tag */
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bus_space_handle_t va_parent_ioh; /* parent i/o space */
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bus_addr_t va_addr; /* i/o address */
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bus_size_t va_size;
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bus_addr_t va_addr2; /* i/o address 2 */
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bus_size_t va_size2;
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hpcio_chip_t* va_gpio_chips;
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vrcmu_chipset_tag_t va_cc;
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vrdmaau_chipset_tag_t va_ac;
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vrdcu_chipset_tag_t va_dc;
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#ifdef HPCMIPS_NOT_YET
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bus_dma_tag_t va_dmat; /* DMA tag */
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#endif
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};
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/*
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* Vrip methods
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*/
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#define vrip_power(vc, unit, onoff) \
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((*(vc)->vc_power)((vc), (unit), (onoff)))
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#define vrip_intr_establish(vc, u, l, lv, fn, arg) \
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((*(vc)->vc_intr_establish)((vc), (u), (l), (lv), (fn), (arg)))
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#define vrip_intr_disestablish(vc, handle) \
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((*(vc)->vc_intr_disestablish)((vc), (handle)))
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#define vrip_intr_setmask1(vc, handle, enable) \
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((*(vc)->vc_intr_setmask1)((vc), (handle), (enable)))
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#define vrip_intr_setmask2(vc, handle, mask, onoff) \
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((*(vc)->vc_intr_setmask2)((vc), (handle), (mask), (onoff)))
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#define vrip_intr_getstatus2(vc, handle, status) \
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((*(vc)->vc_intr_getstatus2)((vc), (handle), (status)))
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#define vrip_register_cmu(vc, cmu) \
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((*(vc)->vc_register_cmu)((vc), (cmu)))
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#define vrip_register_gpio(vc, gpio) \
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((*(vc)->vc_register_gpio)((vc), (gpio)))
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#define vrip_register_dmaau(vc, dmaau) \
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((*(vc)->vc_register_dmaau)((vc), (dmaau)))
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#define vrip_register_dcu(vc, dcu) \
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((*(vc)->vc_register_dcu)((vc), (dcu)))
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#endif /* !_VRIPIF_H_ */
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