605f564f52
- Add PCI Extended Configuration Space support into x86. - Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1 if it isn't accessible. - Decode Extended Capability in PCI Extended Configuration Space. Currently the following extended capabilities are decoded: - Advanced Error Reporting - Virtual Channel - Device Serial Number - Power Budgeting - Root Complex Link Declaration - Root Complex Event Collector Association - Access Control Services - Alternative Routing-ID Interpretation - Address Translation Services - Single Root IO Virtualization - Page Request - TPH Requester - Latency Tolerance Reporting - Secondary PCI Express - Process Address Space ID - LN Requester - L1 PM Substates The following extended capabilities are not decoded yet: - Root Complex Internal Link Control - Multi-Function Virtual Channel - RCRB Header - Vendor Unique - Configuration Access Correction - Multiple Root IO Virtualization - Multicast - Resizable BAR - Dynamic Power Allocation - Protocol Multiplexing - Downstream Port Containment - Precision Time Management - M-PCIe - Function Reading Status Queueing - Readiness Time Reporting - Designated Vendor-Specific
205 lines
5.4 KiB
C
205 lines
5.4 KiB
C
/* $NetBSD: bonito_pci.c,v 1.12 2015/10/02 05:22:51 msaitoh Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI configuration space support for the Algorithmics BONITO
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* MIPS PCI and memory controller.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bonito_pci.c,v 1.12 2015/10/02 05:22:51 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/intr.h>
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#include <sys/systm.h>
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#include <mips/locore.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <mips/bonito/bonitoreg.h>
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#include <mips/bonito/bonitovar.h>
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/*
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* Bonito systems are always single-processor, so this is sufficient.
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*/
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#define PCI_CONF_LOCK(s) (s) = splhigh()
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#define PCI_CONF_UNLOCK(s) splx((s))
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void bonito_attach_hook(device_t, device_t,
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struct pcibus_attach_args *);
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int bonito_bus_maxdevs(void *, int);
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pcitag_t bonito_make_tag(void *, int, int, int);
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void bonito_decompose_tag(void *, pcitag_t, int *, int *, int *);
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pcireg_t bonito_conf_read(void *, pcitag_t, int);
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void bonito_conf_write(void *, pcitag_t, int, pcireg_t);
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void
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bonito_pci_init(pci_chipset_tag_t pc, const struct bonito_config *bc)
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{
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pc->pc_conf_v = __UNCONST(bc);
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if (bc->bc_attach_hook != NULL)
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pc->pc_attach_hook = bc->bc_attach_hook;
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else
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pc->pc_attach_hook = bonito_attach_hook;
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pc->pc_bus_maxdevs = bonito_bus_maxdevs;
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pc->pc_make_tag = bonito_make_tag;
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pc->pc_decompose_tag = bonito_decompose_tag;
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pc->pc_conf_read = bonito_conf_read;
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pc->pc_conf_write = bonito_conf_write;
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}
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void
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bonito_attach_hook(device_t parent, device_t self,
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struct pcibus_attach_args *pba)
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{
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}
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int
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bonito_bus_maxdevs(void *v, int busno)
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{
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return (32);
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}
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pcitag_t
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bonito_make_tag(void *v, int b, int d, int f)
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{
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return ((b << 16) | (d << 11) | (f << 8));
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}
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void
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bonito_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
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{
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if (bp != NULL)
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*bp = (tag >> 16) & 0xff;
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if (dp != NULL)
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*dp = (tag >> 11) & 0x1f;
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if (fp != NULL)
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*fp = (tag >> 8) & 0x7;
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}
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static bool
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bonito_conf_addr(struct bonito_config *bc, pcitag_t tag, int offset,
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u_int32_t *cfgoff, u_int32_t *pcimap_cfg)
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{
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int b, d, f;
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if ((unsigned int)offset >= PCI_CONF_SIZE)
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return true;
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bonito_decompose_tag(bc, tag, &b, &d, &f);
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if (b == 0) {
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if (d > (31 - bc->bc_adbase))
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return true;
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*cfgoff = (1UL << (d + bc->bc_adbase)) | (f << 8) | offset;
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*pcimap_cfg = 0;
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} else {
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*cfgoff = tag | offset;
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*pcimap_cfg = BONITO_PCIMAPCFG_TYPE1;
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}
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return false;
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}
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pcireg_t
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bonito_conf_read(void *v, pcitag_t tag, int offset)
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{
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struct bonito_config *bc = v;
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pcireg_t data;
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u_int32_t cfgoff, pcimap_cfg;
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int s;
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if (bonito_conf_addr(bc, tag, offset, &cfgoff, &pcimap_cfg))
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return ((pcireg_t) -1);
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PCI_CONF_LOCK(s);
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/* clear aborts */
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REGVAL(BONITO_PCICMD) |=
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PCI_STATUS_MASTER_ABORT | PCI_STATUS_MASTER_TARGET_ABORT;
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/* high 16 bits of address go into PciMapCfg register */
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REGVAL(BONITO_PCIMAP_CFG) = (cfgoff >> 16) | pcimap_cfg;
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wbflush();
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/* Issue a read to make sure the write is posted */
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(void)REGVAL(BONITO_PCIMAP_CFG);
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/* low 16 bits of address are offset into config space */
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data = REGVAL(BONITO_PCICFG_BASE + (cfgoff & 0xfffc));
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/* check for error */
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if (REGVAL(BONITO_PCICMD) &
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(PCI_STATUS_MASTER_ABORT | PCI_STATUS_MASTER_TARGET_ABORT))
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data = (pcireg_t) -1;
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PCI_CONF_UNLOCK(s);
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return (data);
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}
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void
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bonito_conf_write(void *v, pcitag_t tag, int offset, pcireg_t data)
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{
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struct bonito_config *vt = v;
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u_int32_t cfgoff, pcimap_cfg;
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int s;
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if (bonito_conf_addr(vt, tag, offset, &cfgoff, &pcimap_cfg))
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panic("bonito_conf_write");
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PCI_CONF_LOCK(s);
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/* clear aborts */
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REGVAL(BONITO_PCICMD) |=
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PCI_STATUS_MASTER_ABORT | PCI_STATUS_MASTER_TARGET_ABORT;
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/* high 16 bits of address go into PciMapCfg register */
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REGVAL(BONITO_PCIMAP_CFG) = (cfgoff >> 16) | pcimap_cfg;
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wbflush();
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/* Issue a read to make sure the write is posted */
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(void)REGVAL(BONITO_PCIMAP_CFG);
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/* low 16 bits of address are offset into config space */
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REGVAL(BONITO_PCICFG_BASE + (cfgoff & 0xfffc)) = data;
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PCI_CONF_UNLOCK(s);
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}
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