328 lines
9.1 KiB
C
328 lines
9.1 KiB
C
/* $NetBSD: if_le.c,v 1.3 1995/11/25 01:23:51 cgd Exp $ */
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/*-
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* Copyright (c) 1995 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell and Rick Macklem.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)if_le.c 8.2 (Berkeley) 11/16/93
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*/
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#include "bpfilter.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <net/if.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <machine/autoconf.h>
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#ifdef pmax
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typedef u_int32_t word_t;
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#define wbflush() MachEmptyWriteBuffer()
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/* These should be in a header file, but where? */
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int pmax_boardtype; /* Mother board type */
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/*extern u_long le_iomem;*/
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extern u_long asic_base;
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/* does this machine have an ASIC? */
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#define SYSTEM_HAS_ASIC() \
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(pmax_boardtype == DS_MAXINE || pmax_boardtype == DS_3MIN || \
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pmax_boardtype == DS_3MAXPLUS)
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#include <pmax/pmax/kn01.h>
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#include <machine/machConst.h>
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#include <pmax/pmax/pmaxtype.h>
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#include <pmax/tc/tc.h>
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#include <pmax/pmax/asic.h>
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#include <pmax/tc/if_levar.h>
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#define LEINTR_UNIT 1 /* pmax interrupts take a unit as arg */
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#else /* Alpha */
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typedef u_int64 word_t;
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#define SYSTEM_HAS_ASIC() \
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(hwrpb->rpb_type == ST_DEC_3000_300 || hwrpb->rpb_type == ST_DEC_3000_500)
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#include <machine/rpb.h>
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#include <alpha/tc/tc.h>
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#include <alpha/tc/asic.h>
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#include <alpha/tc/if_levar.h>
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#endif /* Alpha */
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#include <dev/ic/am7990reg.h>
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#define LE_NEED_BUF_CONTIG
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#define LE_NEED_BUF_GAP2
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#define LE_NEED_BUF_GAP16
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#include <dev/ic/am7990var.h>
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/* access LANCE registers */
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void lewritereg();
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#define LERDWR(cntl, src, dst) { (dst) = (src); wbflush(); }
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#define LEWREG(src, dst) lewritereg(&(dst), (src))
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#define LE_OFFSET_RAM 0x0
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#define LE_OFFSET_LANCE 0x100000
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#define LE_OFFSET_ROM 0x1c0000
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extern caddr_t le_iomem;
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#define LE_SOFTC(unit) lecd.cd_devs[unit]
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#define LE_DELAY(x) DELAY(x)
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int lematch __P((struct device *, void *, void *));
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void leattach __P((struct device *, struct device *, void *));
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#ifdef LEINTR_UNIT
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int leintr __P((int unit));
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#else
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int leintr __P((void *sc));
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#endif
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struct cfdriver lecd = {
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NULL, "le", lematch, leattach, DV_IFNET, sizeof (struct le_softc)
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};
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integrate void
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lewrcsr(sc, port, val)
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struct le_softc *sc;
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u_int16_t port, val;
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{
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struct lereg1 *ler1 = sc->sc_r1;
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LEWREG(port, ler1->ler1_rap);
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LERDWR(port, val, ler1->ler1_rdp);
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}
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integrate u_int16_t
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lerdcsr(sc, port)
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struct le_softc *sc;
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u_int16_t port;
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{
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struct lereg1 *ler1 = sc->sc_r1;
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u_int16_t val;
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LEWREG(port, ler1->ler1_rap);
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LERDWR(0, ler1->ler1_rdp, val);
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return (val);
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}
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int
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lematch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct confargs *ca = aux;
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#ifdef notdef /* XXX */
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struct tc_cfloc *tc_locp;
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struct asic_cfloc *asic_locp;
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#endif
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#ifdef notdef /* XXX */
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tclocp = (struct tc_cfloc *)cf->cf_loc;
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#endif
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/* XXX CHECK BUS */
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/* make sure that we're looking for this type of device. */
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if (!BUS_MATCHNAME(ca, "PMAD-BA ") && /* untested alpha TC option */
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!BUS_MATCHNAME(ca, "PMAD-AA ") && /* KN02 baseboard, old option */
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!BUS_MATCHNAME(ca, "lance")) /* NetBSD name for b'board */
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return (0);
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#ifdef notdef /* XXX */
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/* make sure the unit matches the cfdata */
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if ((cf->cf_unit != tap->ta_unit &&
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tap->ta_unit != TA_ANYUNIT) ||
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(tclocp->cf_slot != tap->ta_slot &&
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tclocp->cf_slot != TC_SLOT_WILD) ||
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(tclocp->cf_offset != tap->ta_offset &&
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tclocp->cf_offset != TC_OFFSET_WILD))
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return (0);
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#endif
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return (1);
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}
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void
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leattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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register struct le_softc *sc = (void *)self;
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struct confargs *ca = aux;
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u_char *cp; /* pointer to MAC address */
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int i;
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if (sc->sc_dev.dv_unit == 0 && SYSTEM_HAS_ASIC()) {
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/* It's on the system ASIC */
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volatile u_int *ldp;
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word_t dma_mask;
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sc->sc_r1 = (struct lereg1 *)
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MACH_PHYS_TO_UNCACHED(BUS_CVTADDR(ca));
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#ifdef alpha
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sc->sc_r1 = TC_DENSE_TO_SPARSE(sc->sc_r1);
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#endif
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sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(le_iomem);
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/* XXX */ cp = (u_char *)ASIC_SYS_ETHER_ADDRESS(asic_base);
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sc->sc_copytodesc = copytobuf_gap2;
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sc->sc_copyfromdesc = copyfrombuf_gap2;
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sc->sc_copytobuf = copytobuf_gap16;
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sc->sc_copyfrombuf = copyfrombuf_gap16;
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sc->sc_zerobuf = zerobuf_gap16;
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/*
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* And enable Lance dma through the asic.
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*/
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ldp = (volatile u_int *) (ASIC_REG_LANCE_DMAPTR(asic_base));
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dma_mask = ((word_t)le_iomem << 3);
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#ifdef alpha
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/* Set upper 64 bits of DMA mask */
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dma_mask = (dma_mask & ~(word_t)0x1f) |
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(((word_t)le_iomem >> 29) & 0x1f);
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#endif /*alpha*/
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*(volatile u_int *)ASIC_REG_CSR(asic_base) |=
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ASIC_CSR_DMAEN_LANCE;
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wbflush();
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}
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#ifdef pmax
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else if (sc->sc_dev.dv_unit == 0 && (pmax_boardtype == DS_PMAX)) {
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/* It's on the baseboard, attached directly to mainbus. */
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sc->sc_r1 = (struct lereg1 *)BUS_CVTADDR(ca);
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/*XXX*/ sc->sc_mem = (void *)MACH_PHYS_TO_UNCACHED(0x19000000);
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/*XXX*/ cp = (u_char *)(MACH_PHYS_TO_UNCACHED(KN01_SYS_CLOCK) + 1);
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sc->sc_copytodesc = copytobuf_gap2;
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sc->sc_copyfromdesc = copyfrombuf_gap2;
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sc->sc_copytobuf = copytobuf_gap2;
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sc->sc_copyfrombuf = copyfrombuf_gap2;
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sc->sc_zerobuf = zerobuf_gap2;
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}
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#endif
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else {
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/* It's on the turbochannel proper, or on KN02 baseboard. */
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sc->sc_r1 = (struct lereg1 *)
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(BUS_CVTADDR(ca) + LE_OFFSET_LANCE);
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sc->sc_mem = (void *)
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(BUS_CVTADDR(ca) + LE_OFFSET_RAM);
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cp = (u_char *)(BUS_CVTADDR(ca) + LE_OFFSET_ROM + 2);
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sc->sc_copytodesc = copytobuf_contig;
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sc->sc_copyfromdesc = copyfrombuf_contig;
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sc->sc_copytobuf = copytobuf_contig;
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sc->sc_copyfrombuf = copyfrombuf_contig;
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sc->sc_zerobuf = zerobuf_contig;
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}
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sc->sc_conf3 = 0;
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sc->sc_addr = 0;
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sc->sc_memsize = 65536;
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/*
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* Get the ethernet address out of rom
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*/
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for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++) {
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sc->sc_arpcom.ac_enaddr[i] = *cp;
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cp += 4;
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}
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sc->sc_arpcom.ac_if.if_name = lecd.cd_name;
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leconfig(sc);
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#ifdef LEINTR_UNIT
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BUS_INTR_ESTABLISH(ca, leintr, self->dv_unit);
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#else
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BUS_INTR_ESTABLISH(ca, leintr, sc);
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#endif
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if (SYSTEM_HAS_ASIC()) {
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/* XXX YEECH!!! */
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*(volatile u_int *)ASIC_REG_IMSK(asic_base) |= ASIC_INTR_LANCE;
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wbflush();
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}
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}
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/*
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* Write a lance register port, reading it back to ensure success. This seems
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* to be necessary during initialization, since the chip appears to be a bit
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* pokey sometimes.
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*/
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void
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lewritereg(regptr, val)
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register volatile u_short *regptr;
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register u_short val;
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{
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register int i = 0;
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while (*regptr != val) {
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*regptr = val;
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wbflush();
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if (++i > 10000) {
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printf("le: Reg did not settle (to x%x): x%x\n", val,
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*regptr);
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return;
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}
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DELAY(100);
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}
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}
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/*
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* Routines for accessing the transmit and receive buffers are provided
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* by am7990.c, because of the LE_NEED_BUF_* macros defined above.
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* Unfortunately, CPU addressing of these buffers is done in one of
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* 3 ways:
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* - contiguous (for the 3max and turbochannel option card)
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* - gap2, which means shorts (2 bytes) interspersed with short (2 byte)
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* spaces (for the pmax)
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* - gap16, which means 16bytes interspersed with 16byte spaces
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* for buffers which must begin on a 32byte boundary (for 3min and maxine)
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* The buffer offset is the logical byte offset, assuming contiguous storage.
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*/
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#include <dev/ic/am7990.c>
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