91 lines
3.8 KiB
C
91 lines
3.8 KiB
C
/* $NetBSD: hfa3861areg.h,v 1.4 2009/10/19 23:19:39 rmind Exp $ */
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/* $Id: hfa3861areg.h,v 1.4 2009/10/19 23:19:39 rmind Exp $ */
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/*
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* Copyright (c) 2007 David Young. All rights reserved.
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*
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* Written by David Young.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DAVID
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* YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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#ifndef _DEV_IC_HFA3861A_H_
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#define _DEV_IC_HFA3861A_H_
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/* Register set for the Intersil HFA3861A. */
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#define HFA3861A_CR5 0x0a /* Tx signal field, read-write */
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#define HFA3861A_CR5_RSVD0 __BITS(7, 4) /* reserved, set to 0 */
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#define HFA3861A_CR5_SHORTPRE __BIT(3) /* 0: long preamble,
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* 1: short preamble
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*/
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#define HFA3861A_CR5_RSVD1 __BIT(2) /* reserved, set to 0 */
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#define HFA3861A_CR5_RATE_MASK __BITS(1, 0) /* Tx data rate */
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/* 1, 2, 5.5, and 11 Mbps */
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#define HFA3861A_CR5_RATE_1 __SHIFTIN(0, HFA3861A_CR5_RATE_MASK)
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#define HFA3861A_CR5_RATE_2 __SHIFTIN(1, HFA3861A_CR5_RATE_MASK)
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#define HFA3861A_CR5_RATE_5 __SHIFTIN(2, HFA3861A_CR5_RATE_MASK)
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#define HFA3861A_CR5_RATE_11 __SHIFTIN(3, HFA3861A_CR5_RATE_MASK)
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#define HFA3861A_CR6 0x0c /* Tx service field: copied directly to 802.11
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* PLCP header
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*/
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#define HFA3861A_CR7 0x0e /* Tx length, hi: microseconds Tx duration */
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#define HFA3861A_CR8 0x10 /* Tx length, lo: microseconds Tx duration */
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#define HFA3861A_CR49 0x62 /* Read-only register mux control */
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#define HFA3861A_CR49_SEL __BIT(7) /* 0: read-only register set 'b'
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* 1: read-only register set 'a'
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*/
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#define HFA3861A_CR49_RSVD __BITS(6, 0)
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#define HFA3861A_CR61 0x7c /* Rx status, read-only, sets 'a' & 'b' */
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#define HFA3861A_CR62 0x7e /* RSSI, read-only */
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#define HFA3861A_CR62_RSSI __BITS(7, 0) /* RSSI, sets 'a' & 'b' */
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#define HFA3861A_CR63 0x80 /* Rx status, read-only */
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#define HFA3861A_CR63_SIGNAL_MASK __BITS(7, 6) /* signal field value,
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* sets 'a' & 'b' */
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/* 1 Mbps */
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#define HFA3861A_CR63_SIGNAL_1MBPS __SHIFTIN(0, HFA3861A_CR63_SIGNAL)
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/* 2 Mbps */
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#define HFA3861A_CR63_SIGNAL_2MBPS __SHIFTIN(2, HFA3861A_CR63_SIGNAL)
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/* 5.5 or 11 Mbps */
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#define HFA3861A_CR63_SIGNAL_OTHER_MBPS __SHIFTIN(1, HFA3861A_CR63_SIGNAL)
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#define HFA3861A_CR63_SFD __BIT(5) /* SFD found, sets 'a' & 'b' */
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#define HFA3861A_CR63_SHORTPRE __BIT(4) /* short preamble detected,
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* sets 'a' & 'b'
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*/
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#define HFA3861A_CR63_SIGNAL_OK __BIT(3) /* valid signal field,
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* sets 'a' & 'b'
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*/
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#define HFA3861A_CR63_CRC16_OK __BIT(2) /* valid CRC 16,
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* sets 'a' & 'b'
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*/
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#define HFA3861A_CR63_ANTENNA __BIT(1) /* antenna used,
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* sets 'a' & 'b'
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*/
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#define HFA3861A_CR63_RSVD __BIT(0) /* reserved, sets 'a' & 'b' */
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#endif /* _DEV_IC_HFA3861A_H_ */
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