2c34d70afa
by a field in ne2000_softc.
416 lines
12 KiB
C
416 lines
12 KiB
C
/* $NetBSD: mx98905.c,v 1.6 2004/03/18 23:38:17 he Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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* adapters.
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*
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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*
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* Copyright (C) 1993, David Greenman. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided that
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* the above copyright and these terms are retained. Under no circumstances is
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* the author responsible for the proper functioning of this software, nor does
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* the author assume any responsibility for damages incurred with its use.
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*/
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/*
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* Special routines for the Macronix MX 98905. For use with the "ne" driver.
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*/
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/*
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* <URL:http://mail-index.NetBSD.org/port-arm32/1996/06/23/0005.html>:
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* There are 2 types of etherh card. One uses the macronics chipset MX98905
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* and that chipset has a bug in it, in that it the MSB remote DMA
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* register does not work. There is a workaround for this which
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* should be around soon. In fact, I think only the buffer ram test
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* ever transfers more than 256 bytes across the DMA channel, so diabling
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* it will make the mx stuff work.
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*/
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.6 2004/03/18 23:38:17 he Exp $");
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#include <sys/device.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/syslog.h>
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#include <sys/systm.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <machine/bus.h>
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#include <dev/ic/dp8390reg.h>
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#include <dev/ic/dp8390var.h>
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#include <dev/ic/ne2000reg.h>
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#include <dev/ic/ne2000var.h>
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#include <dev/ic/mx98905var.h>
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#ifndef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_write_stream_2 bus_space_write_2
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#define bus_space_write_multi_stream_2 bus_space_write_multi_2
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#define bus_space_read_multi_stream_2 bus_space_read_multi_2
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#endif /* __BUS_SPACE_HAS_STREAM_METHODS */
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static __inline void mx98905_write_setup(struct dp8390_softc *, int, int);
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static __inline void mx98905_write_wait(struct dp8390_softc *);
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void
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mx98905_attach(struct dp8390_softc *sc)
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{
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sc->ring_copy = mx98905_ring_copy;
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sc->write_mbuf = mx98905_write_mbuf;
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sc->read_hdr = mx98905_read_hdr;
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}
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static __inline void
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mx98905_write_setup(sc, len, buf)
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struct dp8390_softc *sc;
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int len, buf;
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{
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bus_space_tag_t nict = sc->sc_regt;
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bus_space_handle_t nich = sc->sc_regh;
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/* Select page 0 registers. */
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NIC_BARRIER(nict, nich);
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bus_space_write_1(nict, nich, ED_P0_CR,
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ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
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NIC_BARRIER(nict, nich);
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/* Reset remote DMA complete flag. */
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bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
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NIC_BARRIER(nict, nich);
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/* Set up DMA byte count. */
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bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
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bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
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/* Set up destination address in NIC mem. */
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bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
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bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
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/* Set remote DMA write. */
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NIC_BARRIER(nict, nich);
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bus_space_write_1(nict, nich,
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ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
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NIC_BARRIER(nict, nich);
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}
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static __inline void
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mx98905_write_wait(sc)
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struct dp8390_softc *sc;
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{
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int maxwait = 100; /* about 120us */
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bus_space_tag_t nict = sc->sc_regt;
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bus_space_handle_t nich = sc->sc_regh;
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/*
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* Wait for remote DMA to complete. This is necessary because on the
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* transmit side, data is handled internally by the NIC in bursts, and
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* we can't start another remote DMA until this one completes. Not
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* waiting causes really bad things to happen - like the NIC wedging
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* the bus.
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*/
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while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
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ED_ISR_RDC) && --maxwait) {
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bus_space_read_1(nict, nich, ED_P0_CRDA1);
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bus_space_read_1(nict, nich, ED_P0_CRDA0);
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NIC_BARRIER(nict, nich);
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DELAY(1);
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}
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if (maxwait == 0) {
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log(LOG_WARNING,
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"%s: remote transmit DMA failed to complete\n",
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sc->sc_dev.dv_xname);
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dp8390_reset(sc);
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}
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}
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/*
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* Write an mbuf chain to the destination NIC memory address using programmed
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* I/O.
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*/
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int
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mx98905_write_mbuf(sc, m, buf)
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struct dp8390_softc *sc;
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struct mbuf *m;
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int buf;
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{
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struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
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bus_space_tag_t nict = sc->sc_regt;
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bus_space_handle_t nich = sc->sc_regh;
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bus_space_tag_t asict = nsc->sc_asict;
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bus_space_handle_t asich = nsc->sc_asich;
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int savelen, dmalen, resid, len;
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u_int8_t *data, savebyte[2];
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int l, leftover;
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#ifdef DIAGNOSTIC
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u_int8_t *lim;
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#endif
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int i;
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resid = savelen = m->m_pkthdr.len;
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dmalen = min(resid, 254);
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mx98905_write_setup(sc, dmalen, buf);
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buf += dmalen;
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resid -= dmalen;
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/*
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* Transfer the mbuf chain to the NIC memory. NE2000 cards
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* require that data be transferred as words, and only words,
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* so that case requires some extra code to patch over odd-length
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* mbufs.
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*/
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/* NE2000s are a bit trickier. */
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/* Start out with no leftover data. */
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leftover = 0;
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savebyte[0] = savebyte[1] = 0;
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for (; m != 0; m = m->m_next) {
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l = m->m_len;
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if (l == 0)
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continue;
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data = mtod(m, u_int8_t *);
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#ifdef DIAGNOSTIC
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lim = data + l;
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#endif
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while (l > 0) {
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if (leftover) {
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/*
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* Data left over (from mbuf or
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* realignment). Buffer the next
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* byte, and write it and the leftover
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* data out.
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*/
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savebyte[1] = *data++;
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l--;
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bus_space_write_stream_2(asict, asich,
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NE2000_ASIC_DATA, *(u_int16_t *)savebyte);
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dmalen -= 2;
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leftover = 0;
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} else if (BUS_SPACE_ALIGNED_POINTER(data,
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u_int16_t) == 0) {
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/* Unaligned data; buffer the next byte. */
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savebyte[0] = *data++;
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l--;
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leftover = 1;
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} else {
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/*
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* Aligned data; output contiguous
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* words as much as we can, then
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* buffer the remaining byte, if any.
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*/
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len = min(l, dmalen);
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leftover = len & 1;
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len &= ~1;
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bus_space_write_multi_stream_2(asict,
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asich, NE2000_ASIC_DATA,
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(u_int16_t *)data, len >> 1);
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dmalen -= len;
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data += len;
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if (leftover)
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savebyte[0] = *data++;
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l -= len + leftover;
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}
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if (dmalen == 0 && resid > 0) {
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mx98905_write_wait(sc);
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dmalen = min(resid, 254);
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mx98905_write_setup(sc, dmalen, buf);
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buf += dmalen;
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resid -= dmalen;
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}
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}
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if (l < 0)
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panic("mx98905_write_mbuf: negative len");
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#ifdef DIAGNOSTIC
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if (data != lim)
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panic("mx98905_write_mbuf: data != lim");
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#endif
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}
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if (leftover) {
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savebyte[1] = 0;
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bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
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*(u_int16_t *)savebyte);
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}
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if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
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for(i = 0; i < (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1;
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i++)
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bus_space_write_stream_2(asict, asich,
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NE2000_ASIC_DATA, 0);
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savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
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}
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NIC_BARRIER(nict, nich);
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mx98905_write_wait(sc);
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return (savelen);
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}
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/*
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* Given a source and destination address, copy 'amout' of a packet from
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* the ring buffer into a linear destination buffer. Takes into account
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* ring-wrap.
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*/
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int
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mx98905_ring_copy(sc, src, dst, amount)
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struct dp8390_softc *sc;
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int src;
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caddr_t dst;
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u_short amount;
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{
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struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
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bus_space_tag_t nict = sc->sc_regt;
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bus_space_handle_t nich = sc->sc_regh;
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bus_space_tag_t asict = nsc->sc_asict;
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bus_space_handle_t asich = nsc->sc_asich;
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u_short tmp_amount;
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int useword = nsc->sc_useword;
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/* Does copy wrap to lower addr in ring buffer? */
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if (src + amount > sc->mem_end) {
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tmp_amount = sc->mem_end - src;
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/* Copy amount up to end of NIC memory. */
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mx98905_readmem(nict, nich, asict, asich, src,
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(u_int8_t *)dst, tmp_amount, useword);
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amount -= tmp_amount;
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src = sc->mem_ring;
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dst += tmp_amount;
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}
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mx98905_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
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amount, useword);
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return (src + amount);
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}
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void
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mx98905_read_hdr(sc, buf, hdr)
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struct dp8390_softc *sc;
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int buf;
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struct dp8390_ring *hdr;
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{
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struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
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mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
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buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
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nsc->sc_useword);
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#if BYTE_ORDER == BIG_ENDIAN
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hdr->count = bswap16(hdr->count);
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#endif
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}
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static __inline void
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mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich,
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int len, int buf)
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{
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/* Select page 0 registers. */
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NIC_BARRIER(nict, nich);
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bus_space_write_1(nict, nich, ED_P0_CR,
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ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
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NIC_BARRIER(nict, nich);
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/* Set up DMA byte count. */
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bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
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bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
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/* Set up source address in NIC mem. */
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bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
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bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
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NIC_BARRIER(nict, nich);
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bus_space_write_1(nict, nich, ED_P0_CR,
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ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
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bus_space_barrier(nict, nich, 0, NE2000_NPORTS,
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BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
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}
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/*
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* Given a NIC memory source address and a host memory destination address,
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* copy 'amount' from NIC to host using programmed i/o. The 'amount' is
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* rounded up to a word - ok as long as mbufs are word sized.
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*/
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void
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mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword)
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bus_space_tag_t nict;
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bus_space_handle_t nich;
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bus_space_tag_t asict;
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bus_space_handle_t asich;
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int src;
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u_int8_t *dst;
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size_t amount;
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int useword;
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{
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int len, resid;
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resid = amount;
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/* Round up to a word. */
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if (resid & 1)
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++resid;
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while (resid > 0) {
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len = min(resid, 254);
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mx98905_read_setup(nict, nich, len, src);
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if (useword)
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bus_space_read_multi_stream_2(asict, asich,
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NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1);
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else
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bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
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dst, len);
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resid -= len;
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src += len;
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dst += len;
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}
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}
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