0823f75d49
StrongARM SA110 processor The DC21285 provides memory controller, timers, interrupt controller PCI-HOST bridge and diagnostic serial port.
101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
/* $NetBSD: footbridge_machdep.c,v 1.1 1998/09/06 02:20:36 mark Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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* Copyright (c) 1997 Causality Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_uvm.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_page.h>
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#include <machine/pmap.h>
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#include <machine/pte.h>
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#include <arm32/footbridge/dc21285mem.h>
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extern pt_entry_t *pmap_pte __P((pmap_t pmap, vm_offset_t va));
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/*
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* For optimal cache cleaning we need two 16K banks of
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* virtual address space that NOTHING else will access
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* and then we alternate the cache cleaning between the
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* two banks.
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* The cache cleaning code requires requires 2 banks aligned
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* on total size boundry so the banks can be alternated by
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* eorring the size bit (assumes the bank size is a power of 2)
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*
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* On the DC21285 we have a special cache clean area so we will
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* use it.
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*/
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extern unsigned int sa110_cache_clean_addr;
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extern unsigned int sa110_cache_clean_size;
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#if 0
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void
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footbridge_sa110_cc_setup(void)
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{
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vm_offset_t vaddr;
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vm_offset_t addr;
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int cleanarea;
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int loop;
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pt_entry_t *pte;
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cleanarea = (NBPG * 4) * 2;
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#if defined(UVM)
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vaddr = uvm_km_valloc(kernel_map, cleanarea + (NBPG * 4));
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#else
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vaddr = kmem_alloc_pageable(kernel_map, cleanarea + (NBPG * 4));
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#endif
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addr = (vaddr + (cleanarea - 1)) & ~(cleanarea - 1);
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/* printf("vaddr=%x addr=%x\n", vaddr, addr);*/
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for (loop = 0; loop < cleanarea; loop += NBPG) {
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pte = pmap_pte(kernel_pmap, (addr + loop));
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*pte = L2_PTE(DC28285_SA_CACHE_FLUSH_BASE + loop, AP_KR);
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}
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sa110_cache_clean_addr = addr;
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sa110_cache_clean_size = cleanarea / 2;
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}
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#else
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void
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footbridge_sa110_cc_setup(void)
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{
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sa110_cache_clean_addr = DC21285_CACHE_FLUSH_VBASE;
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sa110_cache_clean_size = (NBPG * 4);
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}
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#endif
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