134 lines
5.1 KiB
C
134 lines
5.1 KiB
C
/* $NetBSD: mtd803var.h,v 1.9 2012/10/27 17:18:22 chs Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Peter Bex <Peter.Bex@student.kun.nl>.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/rnd.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <dev/mii/miivar.h>
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/* Number of Tx and Rx descriptors */
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#define MTD_NUM_TXD 64
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#define MTD_NUM_RXD 64
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/* Tx and Rx buffer size */
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#define MTD_RXBUF_SIZE 1536
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#define MTD_TXBUF_SIZE 1536
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/* DMA mem must be longword (4 bytes) aligned */
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#define MTD_DMA_ALIGN 4
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/* Descriptor structure */
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struct mtd_desc {
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u_int32_t stat; /* Status field */
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u_int32_t conf; /* Config field */
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u_int32_t data; /* Data buffer start address */
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u_int32_t next; /* Next descriptor address */
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};
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/* Softc struct */
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struct mtd_softc {
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device_t dev;
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struct mii_data mii;
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struct ethercom ethercom;
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bus_space_tag_t bus_tag;
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bus_space_handle_t bus_handle;
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void * sd_hook;
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u_int8_t eaddr[ETHER_ADDR_LEN];
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volatile unsigned int cur_tx;
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volatile unsigned int cur_rx;
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bus_dma_tag_t dma_tag;
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struct mtd_desc * desc;
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bus_dmamap_t desc_dma_map;
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void * buf;
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bus_dmamap_t buf_dma_map;
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krndsource_t rnd_src;
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};
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/* Transmit descriptor layout */
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/* Status register */
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#define MTD_TXD_OWNER 0x80000000 /* Owner bit */
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#define MTD_TXD_RSRVD0 0x7fffc000 /* Bits [30:14] are reserved */
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#define MTD_TXD_ABORT 0x00002000 /* Transmit aborted */
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#define MTD_TXD_CSL 0x00001000 /* Carrier Sense Loss */
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#define MTD_TXD_LCOL 0x00000800 /* Late collision */
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#define MTD_TXD_EXCOL 0x00000400 /* Excessive collisions */
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#define MTD_TXD_DFD 0x00000200 /* Deferred */
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#define MTD_TXD_HBFAIL 0x00000100 /* Heart-beat failure */
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#define MTD_TXD_NRC 0x000000ff /* Collision Retry Count */
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/* Configuration register */
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#define MTD_TXD_CONF_IRQC 0x80000000 /* Interrupt control */
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#define MTD_TXD_CONF_EIRQC 0x40000000 /* Early interrupt control */
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#define MTD_TXD_CONF_LSD 0x20000000 /* Last descriptor */
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#define MTD_TXD_CONF_FSD 0x10000000 /* First descriptor */
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#define MTD_TXD_CONF_CRC 0x08000000 /* CRC append */
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#define MTD_TXD_CONF_PAD 0x04000000 /* Pad control */
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#define MTD_TXD_CONF_RLCOL 0x02000000 /* Retry Late Collision */
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#define MTD_TXD_CONF_RSRVD0 0x01c00000 /* Bits [24:22] are reserved */
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#define MTD_TXD_CONF_PKTS 0x003ff800 /* Packet size */
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#define MTD_TXD_CONF_BUFS 0x000007ff /* Transmit buffer size */
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#define MTD_TXD_PKTS_SHIFT 11
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/* Receive descriptor layout */
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/* Status register */
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#define MTD_RXD_OWNER 0x80000000 /* Owner bit */
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#define MTD_RXD_RSRVD3 0x70000000 /* Bits [30:28] are reserved */
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#define MTD_RXD_FLEN 0x0fff0000 /* Frame length */
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#define MTD_RXD_RSRVD2 0x00008000 /* Bit 15 is reserved */
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#define MTD_RXD_MAR 0x00004000 /* Multicast Address Received */
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#define MTD_RXD_BAR 0x00002000 /* Broadcast Address Received */
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#define MTD_RXD_PAR 0x00001000 /* Physical Address Received */
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#define MTD_RXD_FSD 0x00000800 /* First Descriptor */
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#define MTD_RXD_LSD 0x00000400 /* Last Descriptor */
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#define MTD_RXD_RSRVD1 0x00000300 /* Bits [9:8] are reserved */
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#define MTD_RXD_ERRSUM 0x00000080 /* Error summary */
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#define MTD_RXD_RUNT 0x00000040 /* Runt packet received */
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#define MTD_RXD_LONG 0x00000020 /* Long packet received */
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#define MTD_RXD_FALERR 0x00000010 /* Frame alignment error */
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#define MTD_RXD_CRC 0x00000008 /* CRC error. See manual :) */
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#define MTD_RXD_RXERR 0x00000004 /* Receive error */
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#define MTD_RXD_RSRVD0 0x00000003 /* Bits [1:0] are reserved */
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/* Configuration register */
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#define MTD_RXD_CONF_RSRVD0 0xfffff800 /* Bits [31:11] are reserved */
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#define MTD_RXD_CONF_BUFS 0x000007ff /* Receive buffer size */
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#define MTD_RXD_FLEN_SHIFT 16
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extern int mtd_config(struct mtd_softc *);
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extern int mtd_irq_h(void *);
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