6f3bab1f59
(currently only CD-ROM drives on i386). The sys/dev/scsipi system provides 2 busses to which devices can attach (scsibus and atapibus). This needed to change some include files and structure names in the low level scsi drivers.
429 lines
11 KiB
C
429 lines
11 KiB
C
/* $NetBSD: esp.c,v 1.11 1997/08/27 11:23:48 bouyer Exp $ */
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/*
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* Copyright (c) 1997 Jason R. Thorpe.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project
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* by Jason R. Thorpe.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1994 Peter Galbavy
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* Copyright (c) 1995 Paul Kranenburg
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Peter Galbavy
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Based on aic6360 by Jarle Greipsland
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*
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* Acknowledgements: Many of the algorithms used in this driver are
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* inspired by the work of Julian Elischer (julian@tfs.com) and
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* Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
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*/
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/*
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* Initial m68k mac support from Allen Briggs <briggs@macbsd.com>
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* (basically consisting of the match, a bit of the attach, and the
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* "DMA" glue functions).
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/queue.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/scsipi/scsi_message.h>
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#include <machine/cpu.h>
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#include <machine/param.h>
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#include <dev/ic/ncr53c9xreg.h>
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#include <dev/ic/ncr53c9xvar.h>
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#include <machine/viareg.h>
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#include <mac68k/dev/espvar.h>
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void espattach __P((struct device *, struct device *, void *));
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int espmatch __P((struct device *, struct cfdata *, void *));
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/* Linkup to the rest of the kernel */
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struct cfattach esp_ca = {
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sizeof(struct esp_softc), espmatch, espattach
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};
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struct cfdriver esp_cd = {
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NULL, "esp", DV_DULL
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};
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struct scsipi_adapter esp_switch = {
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ncr53c9x_scsi_cmd,
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minphys, /* no max at this level; handled by DMA code */
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NULL,
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NULL,
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};
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struct scsipi_device esp_dev = {
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NULL, /* Use default error handler */
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NULL, /* have a queue, served by this */
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NULL, /* have no async handler */
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NULL, /* Use default 'done' routine */
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};
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/*
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* Functions and the switch for the MI code.
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*/
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u_char esp_read_reg __P((struct ncr53c9x_softc *, int));
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void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char));
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int esp_dma_isintr __P((struct ncr53c9x_softc *));
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void esp_dma_reset __P((struct ncr53c9x_softc *));
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int esp_dma_intr __P((struct ncr53c9x_softc *));
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int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *,
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size_t *, int, size_t *));
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void esp_dma_go __P((struct ncr53c9x_softc *));
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void esp_dma_stop __P((struct ncr53c9x_softc *));
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int esp_dma_isactive __P((struct ncr53c9x_softc *));
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struct ncr53c9x_glue esp_glue = {
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esp_read_reg,
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esp_write_reg,
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esp_dma_isintr,
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esp_dma_reset,
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esp_dma_intr,
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esp_dma_setup,
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esp_dma_go,
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esp_dma_stop,
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esp_dma_isactive,
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NULL, /* gl_clear_latched_intr */
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};
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int
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espmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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if ((cf->cf_unit == 0) && mac68k_machine.scsi96)
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return (1);
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if ((cf->cf_unit == 1) && mac68k_machine.scsi96_2)
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return (1);
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return (0);
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}
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/*
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* Attach this instance, and then all the sub-devices
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*/
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void
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espattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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extern vm_offset_t SCSIBase;
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struct esp_softc *esc = (void *)self;
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struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
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/*
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* Set up the glue for MI code early; we use some of it here.
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*/
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sc->sc_glue = &esp_glue;
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/*
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* Save the regs
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*/
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if (sc->sc_dev.dv_unit == 0) {
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unsigned long reg_offset;
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esc->sc_reg = (volatile u_char *) SCSIBase;
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via2_register_irq(VIA2_SCSIIRQ,
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(void (*)(void *))ncr53c9x_intr, esc);
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esc->irq_mask = V2IF_SCSIIRQ;
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reg_offset = SCSIBase - IOBase;
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if (reg_offset == 0x10000) {
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sc->sc_freq = 16500000;
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} else {
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sc->sc_freq = 25000000;
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}
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} else {
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esc->sc_reg = (volatile u_char *) SCSIBase + 0x402;
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via2_register_irq(VIA2_SCSIDRQ,
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(void (*)(void *))ncr53c9x_intr, esc);
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esc->irq_mask = V2IF_SCSIDRQ; /* V2IF_T1? */
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sc->sc_freq = 25000000;
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}
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printf(": address %p", esc->sc_reg);
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sc->sc_id = 7;
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/* gimme Mhz */
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sc->sc_freq /= 1000000;
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/*
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* It is necessary to try to load the 2nd config register here,
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* to find out what rev the esp chip is, else the esp_reset
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* will not set up the defaults correctly.
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*/
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sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
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sc->sc_cfg2 = NCRCFG2_SCSI2;
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sc->sc_cfg3 = 0;
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sc->sc_rev = NCR_VARIANT_NCR53C96;
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/*
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* This is the value used to start sync negotiations
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* Note that the NCR register "SYNCTP" is programmed
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* in "clocks per byte", and has a minimum value of 4.
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* The SCSI period used in negotiation is one-fourth
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* of the time (in nanoseconds) needed to transfer one byte.
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* Since the chip's clock is given in MHz, we have the following
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* formula: 4 * period = (1000 / freq) * 4
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*/
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sc->sc_minsync = 1000 / sc->sc_freq;
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sc->sc_minsync = 0; /* No synchronous xfers w/o DMA */
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/* Really no limit, but since we want to fit into the TCR... */
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sc->sc_maxxfer = 64 * 1024;
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/*
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* Now try to attach all the sub-devices
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*/
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ncr53c9x_attach(sc, &esp_switch, &esp_dev);
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/*
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* Configure interrupts.
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*/
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via2_reg(vPCR) = 0x22;
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via2_reg(vIFR) = esc->irq_mask;
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via2_reg(vIER) = 0x80 | esc->irq_mask;
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}
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/*
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* Glue functions.
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*/
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u_char
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esp_read_reg(sc, reg)
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struct ncr53c9x_softc *sc;
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int reg;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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return esc->sc_reg[reg * 16];
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}
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void
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esp_write_reg(sc, reg, val)
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struct ncr53c9x_softc *sc;
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int reg;
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u_char val;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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u_char v = val;
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if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) {
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v = NCRCMD_TRANS;
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}
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esc->sc_reg[reg * 16] = v;
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}
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int
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esp_dma_isintr(sc)
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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return esc->sc_reg[NCR_STAT * 16] & 0x80;
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}
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void
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esp_dma_reset(sc)
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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esc->sc_active = 0;
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esc->sc_tc = 0;
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}
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int
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esp_dma_intr(sc)
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struct ncr53c9x_softc *sc;
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{
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register struct esp_softc *esc = (struct esp_softc *)sc;
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register u_char *p;
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volatile u_char *cmdreg, *intrreg, *statreg, *fiforeg;
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register u_int espphase, espstat, espintr;
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register int cnt;
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if (esc->sc_active == 0) {
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printf("dma_intr--inactive DMA\n");
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return -1;
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}
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if ((sc->sc_espintr & NCRINTR_BS) == 0) {
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esc->sc_active = 0;
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return 0;
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}
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cnt = *esc->sc_pdmalen;
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if (*esc->sc_pdmalen == 0) {
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printf("data interrupt, but no count left.");
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}
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p = *esc->sc_dmaaddr;
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espphase = sc->sc_phase;
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espstat = (u_int) sc->sc_espstat;
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espintr = (u_int) sc->sc_espintr;
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cmdreg = esc->sc_reg + NCR_CMD * 16;
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fiforeg = esc->sc_reg + NCR_FIFO * 16;
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statreg = esc->sc_reg + NCR_STAT * 16;
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intrreg = esc->sc_reg + NCR_INTR * 16;
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do {
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if (esc->sc_datain) {
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*p++ = *fiforeg;
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cnt--;
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if (espphase == DATA_IN_PHASE) {
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*cmdreg = NCRCMD_TRANS;
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} else {
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esc->sc_active = 0;
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}
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} else {
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if ( (espphase == DATA_OUT_PHASE)
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|| (espphase == MESSAGE_OUT_PHASE)) {
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*fiforeg = *p++;
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cnt--;
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*cmdreg = NCRCMD_TRANS;
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} else {
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esc->sc_active = 0;
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}
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}
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if (esc->sc_active) {
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while (!(*statreg & 0x80));
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espstat = *statreg;
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espintr = *intrreg;
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espphase = (espintr & NCRINTR_DIS)
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? /* Disconnected */ BUSFREE_PHASE
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: espstat & PHASE_MASK;
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}
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} while (esc->sc_active && (espintr & NCRINTR_BS));
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sc->sc_phase = espphase;
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sc->sc_espstat = (u_char) espstat;
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sc->sc_espintr = (u_char) espintr;
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*esc->sc_dmaaddr = p;
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*esc->sc_pdmalen = cnt;
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if (*esc->sc_pdmalen == 0) {
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esc->sc_tc = NCRSTAT_TC;
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}
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sc->sc_espstat |= esc->sc_tc;
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return 0;
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}
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int
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esp_dma_setup(sc, addr, len, datain, dmasize)
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struct ncr53c9x_softc *sc;
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caddr_t *addr;
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size_t *len;
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int datain;
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size_t *dmasize;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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esc->sc_dmaaddr = addr;
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esc->sc_pdmalen = len;
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esc->sc_datain = datain;
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esc->sc_dmasize = *dmasize;
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esc->sc_tc = 0;
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return 0;
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}
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void
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esp_dma_go(sc)
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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if (esc->sc_datain == 0) {
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esc->sc_reg[NCR_FIFO * 16] = **esc->sc_dmaaddr;
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(*esc->sc_pdmalen)--;
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(*esc->sc_dmaaddr)++;
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}
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esc->sc_active = 1;
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}
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void
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esp_dma_stop(sc)
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struct ncr53c9x_softc *sc;
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{
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}
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int
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esp_dma_isactive(sc)
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struct ncr53c9x_softc *sc;
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{
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struct esp_softc *esc = (struct esp_softc *)sc;
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return esc->sc_active;
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}
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