maxv 8b7b379561 Handle NMIs correctly when SVS is enabled. We store the kernel's CR3 at the
top of the NMI stack, and we unconditionally switch to it, because we don't
know with which page tables we received the NMI. Hotpatch the whole thing as
usual.

This restores the ability to use PMCs on Intel CPUs.
2018-07-12 19:48:16 +00:00
..
2018-07-12 13:05:39 +00:00
2018-07-11 05:25:45 +00:00
2018-07-08 17:54:42 +00:00
2018-07-11 05:25:45 +00:00