601 lines
15 KiB
C
601 lines
15 KiB
C
/* $NetBSD: pca9685.c,v 1.6 2021/01/27 02:29:48 thorpej Exp $ */
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/*-
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* Copyright (c) 2018, 2019 Jason R. Thorpe
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pca9685.c,v 1.6 2021/01/27 02:29:48 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/mutex.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/pca9685reg.h>
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#include <dev/pwm/pwmvar.h>
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#include <dev/fdt/fdtvar.h>
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/*
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* Special channel number used to indicate that we want to set the
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* pulse mode for all channels on this controller.
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*/
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#define PCA9685_ALL_CHANNELS PCA9685_NCHANNELS
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struct pcapwm_channel {
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struct pwm_controller ch_controller;
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struct pwm_config ch_conf;
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u_int ch_number;
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};
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struct pcapwm_softc {
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device_t sc_dev;
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i2c_tag_t sc_i2c;
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i2c_addr_t sc_addr;
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/*
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* Locking order is:
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* pcapwm mutex -> i2c bus
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*/
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kmutex_t sc_lock;
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/*
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* The PCA9685 only has a single pre-scaler, so the configured
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* PWM frequency / period is shared by all channels.
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*/
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u_int sc_period; /* nanoseconds */
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u_int sc_clk_freq;
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bool sc_ext_clk;
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bool sc_invert; /* "invert" property specified */
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bool sc_open_drain; /* "open-drain" property specified */
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/*
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* +1 because we treat channel "16" as the all-channels
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* pseudo-channel.
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*/
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struct pcapwm_channel sc_channels[PCA9685_NCHANNELS+1];
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};
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static int pcapwm_pwm_enable(struct pwm_controller *, bool);
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static int pcapwm_pwm_get_config(struct pwm_controller *,
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struct pwm_config *);
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static int pcapwm_pwm_set_config(struct pwm_controller *,
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const struct pwm_config *);
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static const struct device_compatible_entry compat_data[] = {
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{ .compat = "nxp,pca9685-pwm" },
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DEVICE_COMPAT_EOL
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};
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static int
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pcapwm_read1(struct pcapwm_softc * const sc, uint8_t reg, uint8_t *valp)
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{
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return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP,
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sc->sc_addr, ®, sizeof(reg),
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valp, sizeof(*valp), 0);
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}
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static int
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pcapwm_write1(struct pcapwm_softc * const sc, uint8_t reg, uint8_t val)
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{
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return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP,
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sc->sc_addr, ®, sizeof(reg),
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&val, sizeof(val), 0);
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}
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static int
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pcapwm_read_LEDn(struct pcapwm_softc * const sc, uint8_t reg, uint8_t *buf,
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size_t buflen)
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{
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/* We rely on register auto-increment being enabled. */
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return iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP,
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sc->sc_addr, ®, sizeof(reg),
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buf, buflen, 0);
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}
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static int
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pcapwm_write_LEDn(struct pcapwm_softc * const sc, uint8_t reg, uint8_t *buf,
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size_t buflen)
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{
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/* We rely on register auto-increment being enabled. */
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return iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP,
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sc->sc_addr, ®, sizeof(reg),
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buf, buflen, 0);
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}
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static int
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pcapwm_program_channel(struct pcapwm_softc * const sc,
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struct pcapwm_channel * const chan,
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uint16_t on_tick, uint16_t off_tick)
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{
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const uint8_t reg = chan->ch_number == PCA9685_ALL_CHANNELS ?
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PCA9685_ALL_LED_ON_L : PCA9685_LEDx_ON_L(chan->ch_number);
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uint8_t regs[4];
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int error;
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regs[0] = (uint8_t)(on_tick & 0xff);
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regs[1] = (uint8_t)((on_tick >> 8) & 0xff);
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regs[2] = (uint8_t)(off_tick & 0xff);
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regs[3] = (uint8_t)((off_tick >> 8) & 0xff);
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error = iic_acquire_bus(sc->sc_i2c, 0);
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if (error) {
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device_printf(sc->sc_dev,
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"program_channel: failed to acquire I2C bus\n");
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return error;
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}
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error = pcapwm_write_LEDn(sc, reg, regs, sizeof(regs));
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iic_release_bus(sc->sc_i2c, 0);
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return error;
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}
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static int
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pcapwm_inspect_channel(struct pcapwm_softc * const sc,
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struct pcapwm_channel * const chan,
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uint16_t *on_tickp, uint16_t *off_tickp)
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{
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const uint8_t reg = chan->ch_number == PCA9685_ALL_CHANNELS ?
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PCA9685_ALL_LED_ON_L : PCA9685_LEDx_ON_L(chan->ch_number);
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uint8_t regs[4];
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int error;
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error = iic_acquire_bus(sc->sc_i2c, 0);
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if (error) {
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device_printf(sc->sc_dev,
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"inspect_channel: failed to acquire I2C bus\n");
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return error;
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}
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error = pcapwm_read_LEDn(sc, reg, regs, sizeof(regs));
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iic_release_bus(sc->sc_i2c, 0);
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if (error) {
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return error;
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}
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*on_tickp = regs[0] | (((uint16_t)regs[1]) << 8);
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*off_tickp = regs[2] | (((uint16_t)regs[3]) << 8);
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return 0;
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}
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static struct pcapwm_channel *
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pcapwm_lookup_channel(struct pcapwm_softc * const sc, u_int index)
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{
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if (index > PCA9685_ALL_CHANNELS)
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return NULL;
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return &sc->sc_channels[index];
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}
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static void
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pcapwm_init_channel(struct pcapwm_softc * const sc, u_int index)
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{
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struct pcapwm_channel * const chan = pcapwm_lookup_channel(sc, index);
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KASSERT(chan != NULL);
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chan->ch_number = index;
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chan->ch_controller.pwm_enable = pcapwm_pwm_enable;
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chan->ch_controller.pwm_get_config = pcapwm_pwm_get_config;
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chan->ch_controller.pwm_set_config = pcapwm_pwm_set_config;
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chan->ch_controller.pwm_dev = sc->sc_dev;
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chan->ch_controller.pwm_priv = chan;
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}
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static pwm_tag_t
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pcapwm_get_tag(device_t dev, const void *data, size_t len)
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{
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struct pcapwm_softc * const sc = device_private(dev);
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const u_int *pwm = data;
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/* #pwm-cells == 2 in the PCA9685 DT bindings. */
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if (len != 12)
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return NULL;
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/* Channel 16 is the special call-channels channel. */
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const u_int index = be32toh(pwm[1]);
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struct pcapwm_channel * const chan = pcapwm_lookup_channel(sc, index);
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if (chan == NULL)
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return NULL;
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const u_int period = be32toh(pwm[2]);
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mutex_enter(&sc->sc_lock);
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/*
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* XXX Should we reflect the value of the "invert" property in
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* pwm_config::polarity? I'm thinking not, but...
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*/
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chan->ch_conf.period = period;
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chan->ch_conf.polarity = PWM_ACTIVE_HIGH;
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mutex_exit(&sc->sc_lock);
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return &chan->ch_controller;
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}
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static struct fdtbus_pwm_controller_func pcapwm_pwm_funcs = {
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.get_tag = pcapwm_get_tag,
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};
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static int
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pcapwm_pwm_enable(pwm_tag_t pwm, bool enable)
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{
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struct pcapwm_softc * const sc = device_private(pwm->pwm_dev);
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struct pcapwm_channel * const chan = pwm->pwm_priv;
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int error;
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if (enable) {
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/* Set whatever is programmed for the channel. */
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error = pwm_set_config(pwm, &chan->ch_conf);
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if (error) {
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device_printf(sc->sc_dev,
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"enable: unable to set config for channel %u\n",
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chan->ch_number);
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}
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return error;
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}
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mutex_enter(&sc->sc_lock);
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error = pcapwm_program_channel(sc, chan, 0, PCA9685_PWM_TICKS);
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if (error) {
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device_printf(sc->sc_dev,
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"disable: unable to program channel %u\n",
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chan->ch_number);
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}
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mutex_exit(&sc->sc_lock);
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return error;
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}
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static int
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pcapwm_pwm_get_config(pwm_tag_t pwm, struct pwm_config *conf)
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{
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struct pcapwm_softc * const sc = device_private(pwm->pwm_dev);
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struct pcapwm_channel * const chan = pwm->pwm_priv;
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uint16_t on_tick, off_tick;
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u_int duty_cycle;
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int error;
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mutex_enter(&sc->sc_lock);
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error = pcapwm_inspect_channel(sc, chan, &on_tick, &off_tick);
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if (error) {
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device_printf(sc->sc_dev,
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"get_config: unable to inspect channel %u\n",
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chan->ch_number);
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goto out;
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}
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if (on_tick & PCA9685_PWM_TICKS) {
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duty_cycle = chan->ch_conf.period;
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} else if (off_tick & PCA9685_PWM_TICKS) {
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duty_cycle = 0;
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} else {
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/*
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* Compute the number of ticks, accounting for a non-zero
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* on-tick (which the hardware can do, even if the software
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* can't).
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*/
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int signed_off_tick = off_tick;
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signed_off_tick -= on_tick;
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if (signed_off_tick < 0)
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signed_off_tick += PCA9685_PWM_TICKS;
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const uint64_t nticks = signed_off_tick;
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duty_cycle = (u_int)((nticks * chan->ch_conf.period) /
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PCA9685_PWM_TICKS);
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}
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*conf = chan->ch_conf;
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conf->duty_cycle = duty_cycle;
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out:
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mutex_exit(&sc->sc_lock);
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return error;
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}
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static int
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pcapwm_pwm_set_config(pwm_tag_t pwm, const struct pwm_config *conf)
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{
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struct pcapwm_softc * const sc = device_private(pwm->pwm_dev);
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struct pcapwm_channel * const chan = pwm->pwm_priv;
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int error = 0;
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mutex_enter(&sc->sc_lock);
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/* Only active-high is supported. */
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if (conf->polarity != PWM_ACTIVE_HIGH) {
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device_printf(sc->sc_dev,
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"set_config: invalid polarity: %d\n", conf->polarity);
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error = EINVAL;
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goto out;
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}
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if (sc->sc_period != conf->period) {
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/*
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* Formula for the prescale is:
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*
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* ( clk_freq )
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* round( ----------------- ) - 1
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* ( 4096 * pwm_freq )
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*
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* pwm_freq == 1000000000 / period.
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*
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* To do the rounding step, we scale the oscillator_freq
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* by 100, check for the rounding condition, and then
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* de-scale before the subtraction step.
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*/
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const u_int pwm_freq = 1000000000 / conf->period;
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u_int prescale = (sc->sc_clk_freq * 100) /
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(PCA9685_PWM_TICKS * pwm_freq);
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if ((prescale % 100) >= 50)
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prescale += 100;
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prescale = (prescale / 100) - 1;
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if (prescale < PCA9685_PRESCALE_MIN ||
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prescale > PCA9685_PRESCALE_MAX) {
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device_printf(sc->sc_dev,
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"set_config: invalid period: %uns\n", conf->period);
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error = EINVAL;
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goto out;
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}
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error = iic_acquire_bus(sc->sc_i2c, 0);
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to acquire I2C bus\n");
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goto out;
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}
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uint8_t mode1;
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error = pcapwm_read1(sc, PCA9685_MODE1, &mode1);
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to read MODE1\n");
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goto out_release_i2c;
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}
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/* Disable the internal oscillator. */
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mode1 |= MODE1_SLEEP;
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error = pcapwm_write1(sc, PCA9685_MODE1, mode1);
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to write MODE1\n");
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goto out_release_i2c;
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}
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/* Update the prescale register. */
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error = pcapwm_write1(sc, PCA9685_PRE_SCALE,
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(uint8_t)(prescale & 0xff));
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to write PRE_SCALE\n");
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goto out_release_i2c;
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}
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/*
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* If we're using an external clock source, keep the
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* internal oscillator turned off.
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*
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* XXX The datasheet is a little ambiguous about how this
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* XXX is supposed to work -- on the same page it says to
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* XXX perform this procedure, and also that PWM control of
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* XXX the channels is not possible when the oscillator is
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* XXX disabled. I haven't tested this with an external
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* XXX oscillator yet, so I don't know for sure.
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*/
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if (sc->sc_ext_clk) {
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mode1 |= MODE1_EXTCLK;
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} else {
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mode1 &= ~MODE1_SLEEP;
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}
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/*
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* We rely on auto-increment for the PWM register updates.
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*/
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mode1 |= MODE1_AI;
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error = pcapwm_write1(sc, PCA9685_MODE1, mode1);
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to write MODE1\n");
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goto out_release_i2c;
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}
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iic_release_bus(sc->sc_i2c, 0);
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if (sc->sc_ext_clk == false) {
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/* Wait for 500us for the clock to settle. */
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delay(500);
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}
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sc->sc_period = conf->period;
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}
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uint16_t on_tick, off_tick;
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/*
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* The PWM framework doesn't support the phase-shift / start-delay
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* feature of this chip, so all duty cycles start at 0 ticks.
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*/
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/*
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* For full-on and full-off, use the magic FULL-{ON,OFF} values
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* described in the data sheet.
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*/
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if (conf->duty_cycle == 0) {
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on_tick = 0;
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off_tick = PCA9685_PWM_TICKS;
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} else if (conf->duty_cycle == sc->sc_period) {
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on_tick = PCA9685_PWM_TICKS;
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off_tick = 0;
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} else {
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uint64_t ticks =
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PCA9685_PWM_TICKS * (uint64_t)conf->duty_cycle;
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/* Scale up so we can check if we need to round. */
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ticks = (ticks * 100) / sc->sc_period;
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/* Round up. */
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if (ticks % 100)
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ticks += 100;
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ticks /= 100;
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if (ticks >= PCA9685_PWM_TICKS) {
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ticks = PCA9685_PWM_TICKS - 1;
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}
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on_tick = 0;
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off_tick = (u_int)ticks;
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}
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error = pcapwm_program_channel(sc, chan, on_tick, off_tick);
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if (error) {
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device_printf(sc->sc_dev,
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"set_config: unable to program channel %u\n",
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chan->ch_number);
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goto out;
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}
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chan->ch_conf = *conf;
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out:
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mutex_exit(&sc->sc_lock);
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return error;
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out_release_i2c:
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iic_release_bus(sc->sc_i2c, 0);
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goto out;
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}
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static int
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pcapwm_match(device_t parent, cfdata_t cf, void *aux)
|
|
{
|
|
struct i2c_attach_args * const ia = aux;
|
|
int match_result;
|
|
|
|
if (iic_use_direct_match(ia, cf, compat_data, &match_result)) {
|
|
return match_result;
|
|
}
|
|
|
|
/* This device is direct-config only. */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
pcapwm_attach(device_t parent, device_t self, void *aux)
|
|
{
|
|
struct pcapwm_softc * const sc = device_private(self);
|
|
struct i2c_attach_args * const ia = aux;
|
|
struct clk *clk;
|
|
const int phandle = (int)ia->ia_cookie;
|
|
u_int index;
|
|
int error;
|
|
|
|
sc->sc_dev = self;
|
|
sc->sc_i2c = ia->ia_tag;
|
|
sc->sc_addr = ia->ia_addr;
|
|
|
|
aprint_naive("\n");
|
|
aprint_normal(": PCA9685 PWM controller\n");
|
|
|
|
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
|
|
|
|
for (index = 0; index <= PCA9685_ALL_CHANNELS; index++) {
|
|
pcapwm_init_channel(sc, index);
|
|
}
|
|
|
|
clk = fdtbus_clock_get_index(phandle, 0);
|
|
if (clk != NULL) {
|
|
sc->sc_ext_clk = true;
|
|
sc->sc_clk_freq = clk_get_rate(clk);
|
|
} else {
|
|
sc->sc_clk_freq = PCA9685_INTERNAL_FREQ;
|
|
}
|
|
|
|
if (of_hasprop(phandle, "invert")) {
|
|
sc->sc_invert = true;
|
|
}
|
|
|
|
if (of_hasprop(phandle, "open-drain")) {
|
|
sc->sc_open_drain = true;
|
|
}
|
|
|
|
/*
|
|
* XXX No DT bindings for the OUTNEx configurations in
|
|
* MODE2.
|
|
*/
|
|
|
|
error = iic_acquire_bus(sc->sc_i2c, 0);
|
|
if (error) {
|
|
aprint_error_dev(sc->sc_dev, "failed to acquire I2C bus\n");
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Set up the outputs. We want the channel to update when
|
|
* we send the I2C "STOP" condition.
|
|
*/
|
|
uint8_t mode2;
|
|
error = pcapwm_read1(sc, PCA9685_MODE2, &mode2);
|
|
if (error == 0) {
|
|
mode2 &= ~(MODE2_OUTDRV | MODE2_OCH | MODE2_INVRT);
|
|
if (sc->sc_invert) {
|
|
mode2 |= MODE2_INVRT;
|
|
}
|
|
if (sc->sc_open_drain == false) {
|
|
mode2 |= MODE2_OUTDRV;
|
|
}
|
|
error = pcapwm_write1(sc, PCA9685_MODE2, mode2);
|
|
}
|
|
iic_release_bus(sc->sc_i2c, 0);
|
|
if (error) {
|
|
aprint_error_dev(sc->sc_dev, "failed to configure MODE2\n");
|
|
return;
|
|
}
|
|
|
|
fdtbus_register_pwm_controller(self, phandle,
|
|
&pcapwm_pwm_funcs);
|
|
}
|
|
|
|
CFATTACH_DECL_NEW(pcapwm, sizeof(struct pcapwm_softc),
|
|
pcapwm_match, pcapwm_attach, NULL, NULL);
|