90 lines
3.8 KiB
C
90 lines
3.8 KiB
C
/* $NetBSD: bt463reg.h,v 1.1 1998/08/18 07:43:09 thorpej Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Register definitions for the Brooktree Bt463 135MHz Monolithic
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* CMOS TrueVu RAMDAC.
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*/
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/*
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* Directly-accessible registers. Note the address register is
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* auto-incrementing.
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*/
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#define BT463_REG_ADDR_LOW 0x00 /* C1,C0 == 0,0 */
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#define BT463_REG_ADDR_HIGH 0x01 /* C1,C0 == 0,1 */
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#define BT463_REG_IREG_DATA 0x02 /* C1,C0 == 1,0 */
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#define BT463_REG_CMAP_DATA 0x03 /* C1,C0 == 1,1 */
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#define BT463_REG_MAX BT463_REG_CMAP_DATA
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/*
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* All internal register access to the Bt463 is done indirectly via the
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* Address Register (mapped into the host bus in a device-specific
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* fashion). The following register definitions are in terms of
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* their address register address values.
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*/
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/* C1,C0 must be 1,0 */
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#define BT463_IREG_CURSOR_COLOR_0 0x0100 /* 3 r/w cycles */
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#define BT463_IREG_CURSOR_COLOR_1 0x0101 /* 3 r/w cycles */
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#define BT463_IREG_ID 0x0200
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#define BT463_IREG_COMMAND_0 0x0201
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#define BT463_IREG_COMMAND_1 0x0202
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#define BT463_IREG_COMMAND_2 0x0203
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#define BT463_IREG_READ_MASK_P0_P7 0x0205
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#define BT463_IREG_READ_MASK_P8_P15 0x0206
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#define BT463_IREG_READ_MASK_P16_P23 0x0207
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#define BT463_IREG_READ_MASK_P24_P27 0x0208
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#define BT463_IREG_BLINK_MASK_P0_P7 0x0209
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#define BT463_IREG_BLINK_MASK_P8_P15 0x020a
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#define BT463_IREG_BLINK_MASK_P16_P23 0x020b
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#define BT463_IREG_BLINK_MASK_P24_P27 0x020c
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#define BT463_IREG_TEST 0x020d
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#define BT463_IREG_INPUT_SIG 0x020e /* 2 of 3 r/w cycles */
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#define BT463_IREG_OUTPUT_SIG 0x020f /* 3 r/w cycles */
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#define BT463_IREG_REVISION 0x0220
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#define BT463_IREG_WINDOW_TYPE_TABLE 0x0300 /* 3 r/w cycles */
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#define BT463_NWTYPE_ENTRIES 0x10 /* 16 window type entries */
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/* C1,C0 must be 1,1 */
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#define BT463_IREG_CPALETTE_RAM 0x0000 /* 3 r/w cycles */
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#define BT463_NCMAP_ENTRIES 0x210 /* 528 CMAP entries */
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