66 lines
2.6 KiB
C
66 lines
2.6 KiB
C
/* $NetBSD: plumiobusreg.h,v 1.1 1999/11/21 06:50:26 uch Exp $ */
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/*
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* Copyright (c) 1999, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/* (CS3) */
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#define PLUM_IOBUS_REGBASE 0x6000
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#define PLUM_IOBUS_REGSIZE 0x1000
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/* I/O bus width settting */
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#define PLUM_IOBUS_IOXBSZ_REG 0x000
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#define PLUM_IOBUS_IOXBSZ_IO5BE5 0x00000020
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#define PLUM_IOBUS_IOXBSZ_IO5BE4 0x00000010
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#define PLUM_IOBUS_IOXBSZ_IO5BE3 0x00000008
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#define PLUM_IOBUS_IOXBSZ_IO5BE2 0x00000004
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#define PLUM_IOBUS_IOXBSZ_IO5BE1 0x00000002
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#define PLUM_IOBUS_IOXBSZ_IO5BE0 0x00000001
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/* I/O bus wait control 1 (# of wait from the access beginning) */
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#define PLUM_IOBUS_IOXCCNT_REG 0x004
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#define PLUM_IOBUS_IOXCCNT_MASK 0x7
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/* I/O bus wait control 2 (# of wait in access) */
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#define PLUM_IOBUS_IOXACNT_REG 0x008
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#define PLUM_IOBUS_IOXACNT_MASK 0x1f
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#define PLUM_IOBUS_IOXACNT_SHIFT 5
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/* I/O bus wait control 3 (# of wait during access) */
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#define PLUM_IOBUS_IOXSCNT_REG 0x00c
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#define PLUM_IOBUS_IOXSCNT_MASK 0x7
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/* IDE mode setting */
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#define PLUM_IOBUS_IDEMODE_REG 0x010
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#define PLUM_IOBUS_IDEMODE 0x00000001
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/* (MCS0) */
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#define PLUM_IOBUS_IOBASE 0x00410000
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#define PLUM_IOBUS_IOSIZE 0x6000
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#define PLUM_IOBUS_IO5CS0BASE 0x0000
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#define PLUM_IOBUS_IO5CS1BASE 0x1000
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#define PLUM_IOBUS_IO5CS2BASE 0x2000
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#define PLUM_IOBUS_IO5CS3BASE 0x3000
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#define PLUM_IOBUS_IO5CS4BASE 0x4000
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#define PLUM_IOBUS_IO5CS5BASE 0x5000
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#define PLUM_IOBUS_IO5SIZE 0x1000
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