83 lines
2.8 KiB
C
83 lines
2.8 KiB
C
/* $NetBSD: idcr.h,v 1.1 2006/12/02 22:18:47 freza Exp $ */
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/*
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* Copyright (c) 2006 Jachym Holecek
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* All rights reserved.
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*
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* Written for DFC Design, s.r.o.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_virtex.h"
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#ifndef IDCR_BASE
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#error "Internal DCR base address not defined"
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#endif
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#include <powerpc/cpu.h>
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#ifndef _VIRTEX_IDCR_H_
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#define _VIRTEX_IDCR_H_
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/* Instruction OCM control */
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#define IDCR_ISINIT 0x0000
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#define IDCR_ISFILL 0x0001
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#define IDCR_ISARC 0x0002
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#define IDCR_ISCNT 0x0003
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/* APU control */
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#define IDCR_UDICFG 0x0004
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#define IDCR_APUCFG 0x0005
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/* Data OCM control */
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#define IDCR_DSARC 0x0006
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#define IDCR_DSCNT 0x0007
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/* 8...11 reserved */
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/* Temac HIF-to-GMI communication: arguments, ... */
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#define IDCR_HIF_ARG1 0x000c
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#define IDCR_HIF_ARG0 0x000d
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/* ... control, ... */
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#define IDCR_HIF_CTRL 0x000e
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#define HIF_CTRL_GMIADDR 0x000003ff
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#define HIF_CTRL_SEL 0x00000400 /* Keep this bit zero! */
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#define HIF_CTRL_WRITE 0x00008000 /* Read otherwise */
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/* ... status. */
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#define IDCR_HIF_STAT 0x000f
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#define HIF_STAT_STATS 0x00000001
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#define HIF_STAT_MIIRR 0x00000002 /* MII read ready */
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#define HIF_STAT_MIIWR 0x00000004 /* MII write ready */
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#define HIF_STAT_AFRR 0x00000008 /* Address filter read ready */
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#define HIF_STAT_AFWR 0x00000010 /* Address filter write ready */
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#define HIF_STAT_GMIRR 0x00000020 /* GMI read ready */
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#define HIF_STAT_GMIWR 0x00000040 /* GMI write ready */
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#define mtidcr(addr, val) mtdcr(IDCR_BASE + (addr), (val))
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#define mfidcr(addr) mfdcr(IDCR_BASE + (addr))
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#endif /*_VIRTEX_IDCR_H_*/
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