800ff533b4
directly to work around the fact that $(OBJS) seems to produce a double list of each .o for some reason. XXX Why does $(OBJS) list doubles?
40 lines
833 B
Makefile
40 lines
833 B
Makefile
# $NetBSD: Makefile,v 1.9 1999/09/26 04:49:37 dan Exp $
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#
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# Stubs to kill off some things from libc:
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# This save space on a boot system.
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# (See Makefile.inc also.)
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LIB= hack
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SRCS= getcap.c getgrent.c gethost.c getnet.c getnetgr.c getpwent.c \
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localeconv.c perror.c setlocale.c \
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strerror.c strsignal.c utmp.c yplib.c
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.ifndef NOLIBHACKOPENDIR
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SRCS+= opendir.c
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.endif
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HACKOBJS= getcap.o getgrent.o gethost.o getnet.o getnetgr.o getpwent.o \
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localeconv.o perror.o setlocale.o \
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strerror.o strsignal.o utmp.o yplib.o
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.ifndef NOLIBHACKOPENDIR
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HACKOBJS+= opendir.o
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.endif
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WARNS= 1
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MKPIC= no
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MKLINT= no
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MKPROFILE=no
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all: libhack.a libhack.o
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libhack.o : $(HACKOBJS)
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$(LD) -r -o $@ $(HACKOBJS)
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CLEANFILES+= libhack.o
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tpwent: getpwent.c
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$(CC) -g -o $@.o -DTEST_MAIN -c getpwent.c
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$(CC) -o $@ $@.o
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.include <bsd.lib.mk>
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