129 lines
4.1 KiB
C
129 lines
4.1 KiB
C
/* $NetBSD: fpu_fstore.c,v 1.6 1997/07/19 22:28:49 is Exp $ */
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/*
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* Copyright (c) 1995 Ken Nakata
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/signal.h>
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#include <sys/systm.h>
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#include <machine/frame.h>
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#include "fpu_emulate.h"
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/*
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* type 0: fmove mem/fpr->fpr
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* In this function, we know
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* (opcode & 0x01c0) == 0
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* (word1 & 0xe000) == 0x6000
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*/
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int
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fpu_emul_fstore(fe, insn)
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struct fpemu *fe;
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struct instruction *insn;
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{
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struct frame *frame = fe->fe_frame;
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u_int *fpregs = fe->fe_fpframe->fpf_regs;
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int word1, sig;
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int regnum;
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int format;
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u_int buf[3];
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if (fpu_debug_level & DL_FSTORE) {
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printf(" fpu_emul_fstore: frame at %p fpframe at %p\n",
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frame, fe->fe_fpframe);
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}
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word1 = insn->is_word1;
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format = (word1 >> 10) & 7;
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regnum = (word1 >> 7) & 7;
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insn->is_advance = 4;
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if (format == FTYPE_DBL) {
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insn->is_datasize = 8;
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} else if (format == FTYPE_SNG || format == FTYPE_LNG) {
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insn->is_datasize = 4;
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} else if (format == FTYPE_WRD) {
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insn->is_datasize = 2;
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format = FTYPE_LNG;
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} else if (format == FTYPE_BYT) {
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insn->is_datasize = 1;
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format = FTYPE_LNG;
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} else if (format == FTYPE_EXT) {
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insn->is_datasize = 12;
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} else {
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/* invalid or unsupported operand format */
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if (fpu_debug_level & DL_FSTORE) {
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printf(" fpu_emul_fstore: invalid format %d\n", format);
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}
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sig = SIGFPE;
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}
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if (fpu_debug_level & DL_FSTORE) {
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printf(" fpu_emul_fstore: format %d, size %d\n",
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format, insn->is_datasize);
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}
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fe->fe_fpsr &= ~FPSR_EXCP;
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/* Get effective address. (modreg=opcode&077) */
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sig = fpu_decode_ea(frame, insn, &insn->is_ea0, insn->is_opcode);
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if (sig) {
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if (fpu_debug_level & DL_FSTORE) {
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printf(" fpu_emul_fstore: failed in decode_ea sig=%d\n", sig);
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}
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return sig;
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}
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if (insn->is_datasize > 4 && insn->is_ea0.ea_flags == EA_DIRECT) {
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/* trying to store dbl or ext into a data register */
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#ifdef DEBUG
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printf(" fpu_fstore: attempted to store dbl/ext to reg\n");
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#endif
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return SIGILL;
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}
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if (fpu_debug_level & DL_OPERANDS)
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printf(" fpu_emul_fstore: saving FP%d (%08x,%08x,%08x)\n",
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regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
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fpregs[regnum * 3 + 2]);
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fpu_explode(fe, &fe->fe_f3, FTYPE_EXT, &fpregs[regnum * 3]);
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if (fpu_debug_level & DL_VALUES) {
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static char *class_name[] = { "SNAN", "QNAN", "ZERO", "NUM", "INF" };
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printf(" fpu_emul_fstore: fpn (%s,%c,%d,%08x,%08x,%08x,%08x)\n",
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class_name[fe->fe_f3.fp_class + 2],
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fe->fe_f3.fp_sign ? '-' : '+', fe->fe_f3.fp_exp,
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fe->fe_f3.fp_mant[0], fe->fe_f3.fp_mant[1],
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fe->fe_f3.fp_mant[2], fe->fe_f3.fp_mant[3]);
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}
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fpu_implode(fe, &fe->fe_f3, format, buf);
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fpu_store_ea(frame, insn, &insn->is_ea0, (char *)buf);
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if (fpu_debug_level & DL_RESULT)
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printf(" fpu_emul_fstore: %08x,%08x,%08x size %d\n",
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buf[0], buf[1], buf[2], insn->is_datasize);
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return 0;
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}
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