278 lines
8.1 KiB
C
278 lines
8.1 KiB
C
/* $NetBSD: cpu.h,v 1.10 2001/05/30 12:28:47 mrg Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: cpu.h 1.16 91/03/25$
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*
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* @(#)cpu.h 8.4 (Berkeley) 1/5/94
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*/
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#ifndef _NEWS68K_CPU_H_
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#define _NEWS68K_CPU_H_
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/*
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* Exported definitions unique to news68k cpu support.
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*/
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#if defined(_KERNEL_OPT)
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#include "opt_lockdebug.h"
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#endif
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/*
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* Get common m68k CPU definitions.
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*/
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#include <m68k/cpu.h>
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/*
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* XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
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* XXX Should these be defined in machine/cpu.h?
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*/
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#undef CACHE_ON
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#undef CACHE_CLR
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#undef IC_CLEAR
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#undef DC_CLEAR
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#define CACHE_ON (DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
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#define CACHE_CLR CACHE_ON
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#define IC_CLEAR (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
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#define DC_CLEAR (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
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#define DCIC_CLR (DC_CLR|IC_CLR)
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#define CACHE_BE (DC_BE|IC_BE)
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/*
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* Get interrupt glue.
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*/
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#include <machine/intr.h>
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#include <sys/sched.h>
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struct cpu_info {
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struct schedstate_percpu ci_schedstate; /* scheduler state */
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#if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
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u_long ci_spin_locks; /* # of spin locks held */
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u_long ci_simple_locks; /* # of simple locks held */
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#endif
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};
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#ifdef _KERNEL
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extern struct cpu_info cpu_info_store;
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#define curcpu() (&cpu_info_store)
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/*
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* definitions of cpu-dependent requirements
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* referenced in generic code
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*/
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#define cpu_swapin(p) /* nothing */
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#define cpu_wait(p) /* nothing */
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#define cpu_swapout(p) /* nothing */
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#define cpu_number() 0
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/*
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* Arguments to hardclock and gatherstats encapsulate the previous
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* machine state in an opaque clockframe. One the hp300, we use
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* what the hardware pushes on an interrupt (frame format 0).
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*/
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struct clockframe {
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u_short sr; /* sr at time of interrupt */
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u_long pc; /* pc at time of interrupt */
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u_short vo; /* vector offset (4-word frame) */
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};
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#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
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#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
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#define CLKF_PC(framep) ((framep)->pc)
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#if 0
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/* We would like to do it this way... */
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#define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
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#else
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/* but until we start using PSL_M, we have to do this instead */
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#define CLKF_INTR(framep) (0) /* XXX */
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#endif
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/*
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* Preempt the current process if in interrupt from user mode,
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* or after the current trap/syscall if in system mode.
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*/
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extern int want_resched; /* resched() was called */
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#define need_resched(ci) do { want_resched++; aston(); } while(0)
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/*
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* Give a profiling tick to the current process when the user profiling
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* buffer pages are invalid. On the hp300, request an ast to send us
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* through trap, marking the proc as needing a profiling tick.
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*/
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#define need_proftick(p) do { (p)->p_flag |= P_OWEUPC; aston(); } while(0)
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define signotify(p) aston()
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extern int astpending; /* need to trap before returning to user mode */
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extern volatile u_char *ctrl_ast;
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#define aston() do { astpending++; *ctrl_ast = 0xff; } while(0)
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#endif /* _KERNEL */
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/*
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* CTL_MACHDEP definitions.
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*/
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#define CPU_CONSDEV 1 /* dev_t: console terminal device */
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#define CPU_MAXID 2 /* number of valid machdep ids */
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ "console_device", CTLTYPE_STRUCT }, \
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}
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#ifdef _KERNEL
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#if defined(news1700) || defined(news1200)
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#ifndef M68030
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#define M68030
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#endif
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#define M68K_MMU_MOTOROLA
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#endif
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#if defined(news1700)
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#define CACHE_HAVE_PAC
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#endif
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#endif
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#ifdef _KERNEL
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extern int systype;
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#define NEWS1700 0
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#define NEWS1200 1
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extern int cpuspeed;
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extern char *intiobase, *intiolimit, *extiobase;
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extern u_int intiobase_phys, intiotop_phys;
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extern u_int extiobase_phys, extiotop_phys;
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extern u_int intrcnt[];
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extern void (*vectab[]) __P((void));
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struct frame;
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struct fpframe;
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struct pcb;
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/* locore.s functions */
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void m68881_save __P((struct fpframe *));
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void m68881_restore __P((struct fpframe *));
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void DCIA __P((void));
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void DCIS __P((void));
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void DCIU __P((void));
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void ICIA __P((void));
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void ICPA __P((void));
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void PCIA __P((void));
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void TBIA __P((void));
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void TBIS __P((vaddr_t));
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void TBIAS __P((void));
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void TBIAU __P((void));
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int suline __P((caddr_t, caddr_t));
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void savectx __P((struct pcb *));
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void switch_exit __P((struct proc *));
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void proc_trampoline __P((void));
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void loadustp __P((int));
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void badtrap __P((void));
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void intrhand_vectored __P((void));
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int getsr __P((void));
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void doboot __P((int))
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__attribute__((__noreturn__));
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void nmihand __P((struct frame *));
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void ecacheon __P((void));
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void ecacheoff __P((void));
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/* machdep.c functions */
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int badaddr __P((caddr_t, int));
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int badbaddr __P((caddr_t));
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/* sys_machdep.c functions */
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int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
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/* vm_machdep.c functions */
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void physaccess __P((caddr_t, caddr_t, int, int));
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void physunaccess __P((caddr_t, int));
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int kvtop __P((caddr_t));
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#endif
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/* physical memory sections */
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#define ROMBASE (0xe0000000)
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#define INTIOBASE1700 (0xe0c00000)
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#define INTIOTOP1700 (0xe1d00000) /* XXX */
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#define EXTIOBASE1700 (0xf0f00000)
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#define EXTIOTOP1700 (0xf1000000) /* XXX */
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#define INTIOBASE1200 (0xe1000000)
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#define INTIOTOP1200 (0xe1d00000) /* XXX */
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#define EXTIOBASE1200 (0xe4000000)
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#define EXTIOTOP1200 (0xe4020000) /* XXX */
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#define MAXADDR (0xfffff000)
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/*
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* Internal IO space:
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*
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* Internal IO space is mapped in the kernel from ``intiobase'' to
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* ``intiolimit'' (defined in locore.s). Since it is always mapped,
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* conversion between physical and kernel virtual addresses is easy.
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*/
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#define ISIIOVA(va) \
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((char *)(va) >= intiobase && (char *)(va) < intiolimit)
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#define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
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#define ISIIOPA(pa) \
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((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
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#define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys)
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#define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys)
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/* XXX EIO space mapping should be modified like hp300 XXX */
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#define EIOSIZE (extiotop_phys - extiobase_phys)
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#define ISEIOVA(va) \
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((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
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#define EIOV(pa) (((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
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#endif /* !_NEWS68K_CPU_H_ */
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