d003492f75
- Expand the SMART / Health Information Log Page (Page 02) printout based on NVM Express 1.2.1 Standard. - Implement Intel-specific log pages. - Implement HGST-specific log pages. - Implement wdc-specific nvme control options. - Add the ability to dump log pages directly in binary to stdout.
170 lines
5.6 KiB
C
170 lines
5.6 KiB
C
/* $NetBSD: nvme.h,v 1.2 2017/04/29 00:06:40 nonaka Exp $ */
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/*-
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* Copyright (C) 2012-2013 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: head/sys/dev/nvme/nvme.h 314888 2017-03-07 23:02:59Z imp $
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*/
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#ifndef __NVME_H__
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#define __NVME_H__
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/* Cap nvme to 1MB transfers driver explodes with larger sizes */
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#define NVME_MAX_XFER_SIZE (MAXPHYS < (1<<20) ? MAXPHYS : (1<<20))
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/* Get/Set Features */
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#define NVME_FEAT_ARBITRATION 0x01
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#define NVME_FEAT_POWER_MANAGEMENT 0x02
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#define NVME_FEAT_LBA_RANGE_TYPE 0x03
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#define NVME_FEAT_TEMPERATURE_THRESHOLD 0x04
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#define NVME_FEAT_ERROR_RECOVERY 0x05
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#define NVME_FEAT_VOLATILE_WRITE_CACHE 0x06
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#define NVME_FEAT_NUMBER_OF_QUEUES 0x07
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#define NVME_FEAT_INTERRUPT_COALESCING 0x08
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#define NVME_FEAT_INTERRUPT_VECTOR_CONFIGURATION 0x09
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#define NVME_FEAT_WRITE_ATOMICITY_NORMAL 0x0a
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#define NVME_FEAT_ASYNC_EVENT_CONFIGURATION 0x0b
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#define NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION 0x0c
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#define NVME_FEAT_HOST_MEMORY_BUFFER 0x0d
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/* NVM Command Set specific */
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#define NVME_FEAT_SOFTWARE_PROGRESS_MARKER 0x80
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#define NVME_FEAT_HOST_IDENTIFIER 0x81
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#define NVME_FEAT_RESERVATION_NOTIFICATION_MASK 0x82
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#define NVME_FEAT_RESERVATION_PERSISTANCE 0x83
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/* Get Log Page */
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#define NVME_LOG_ERROR 0x01
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#define NVME_LOG_HEALTH_INFORMATION 0x02
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#define NVME_LOG_FIRMWARE_SLOT 0x03
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#define NVME_LOG_CHANGED_NAMESPACE_LIST 0x04
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#define NVME_LOG_COMMAND_EFFECTS_LOG 0x05
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#define NVME_LOG_RESERVATION_NOTIFICATION 0x80
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/*
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* The following are Intel Specific log pages, but they seem
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* to be widely implemented.
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*/
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#define INTEL_LOG_READ_LAT_LOG 0xc1
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#define INTEL_LOG_WRITE_LAT_LOG 0xc2
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#define INTEL_LOG_TEMP_STATS 0xc5
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#define INTEL_LOG_ADD_SMART 0xca
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#define INTEL_LOG_DRIVE_MKT_NAME 0xdd
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/*
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* HGST log page, with lots ofs sub pages.
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*/
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#define HGST_INFO_LOG 0xc1
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/* Error Information Log (Log Identifier 01h) */
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struct nvme_error_information_entry {
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uint64_t error_count;
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uint16_t sqid;
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uint16_t cid;
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uint16_t status;
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uint16_t error_location;
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uint64_t lba;
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uint32_t nsid;
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uint8_t vendor_specific;
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uint8_t _reserved1[3];
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uint64_t command_specific;
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uint8_t reserved[24];
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} __packed __aligned(4);
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/* SMART / Health Information Log (Log Identifier 02h) */
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struct nvme_health_information_page {
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uint8_t critical_warning;
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#define NVME_HEALTH_PAGE_CW_VOLATILE_MEMORY_BACKUP __BIT(4)
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#define NVME_HEALTH_PAGE_CW_READ_ONLY __BIT(3)
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#define NVME_HEALTH_PAGE_CW_DEVICE_RELIABLITY __BIT(2)
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#define NVME_HEALTH_PAGE_CW_TEMPERTURE __BIT(1)
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#define NVME_HEALTH_PAGE_CW_AVAIL_SPARE __BIT(0)
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uint16_t composite_temperature;
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uint8_t available_spare;
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uint8_t available_spare_threshold;
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uint8_t percentage_used;
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uint8_t _reserved1[26];
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uint64_t data_units_read[2];
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uint64_t data_units_written[2];
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uint64_t host_read_commands[2];
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uint64_t host_write_commands[2];
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uint64_t controller_busy_time[2];
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uint64_t power_cycles[2];
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uint64_t power_on_hours[2];
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uint64_t unsafe_shutdowns[2];
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uint64_t media_errors[2];
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uint64_t num_error_info_log_entries[2];
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uint32_t warning_temp_time;
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uint32_t error_temp_time;
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uint16_t temp_sensor[8];
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uint8_t reserved[296];
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} __packed __aligned(4);
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/* Firmware Commit */
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#define NVME_COMMIT_ACTION_REPLACE_NO_ACTIVATE 0
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#define NVME_COMMIT_ACTION_REPLACE_ACTIVATE 1
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#define NVME_COMMIT_ACTION_ACTIVATE_RESET 2
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#define NVME_COMMIT_ACTION_ACTIVATE_NO_RESET 3
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/* Firmware Slot Information (Log Identifier 03h) */
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struct nvme_firmware_page {
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uint8_t afi;
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#define NVME_FW_PAGE_AFI_SLOT_RST __BITS(4, 6)
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#define NVME_FW_PAGE_AFI_SLOT __BITS(0, 2)
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uint8_t _reserved1[7];
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uint64_t revision[7]; /* revisions for 7 slots */
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uint8_t reserved[448];
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} __packed __aligned(4);
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struct intel_log_temp_stats {
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uint64_t current;
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uint64_t overtemp_flag_last;
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uint64_t overtemp_flag_life;
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uint64_t max_temp;
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uint64_t min_temp;
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uint64_t _rsvd[5];
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uint64_t max_oper_temp;
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uint64_t min_oper_temp;
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uint64_t est_offset;
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} __packed __aligned(4);
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/* Commands Supported and Effects (Log Identifier 05h) */
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struct nvme_command_effeects_page {
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uint32_t acs[256];
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#define NVME_CE_PAGE_CS_CSE __BITS(16, 18)
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#define NVME_CE_PAGE_CS_CCC __BIT(4)
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#define NVME_CE_PAGE_CS_NIC __BIT(3)
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#define NVME_CE_PAGE_CS_NCC __BIT(2)
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#define NVME_CE_PAGE_CS_LBCC __BIT(1)
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#define NVME_CE_PAGE_CS_CSUPP __BIT(0)
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uint32_t iocs[256];
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uint8_t reserved[2048];
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} __packed __aligned(4);
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#endif /* __NVME_H__ */
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