615 lines
15 KiB
C
615 lines
15 KiB
C
/* $NetBSD: pci_machdep.c,v 1.1 2001/06/19 00:20:45 fvdl Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-specific functions for PCI autoconfiguration.
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*
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* On PCs, there are two methods of generating PCI configuration cycles.
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* We try to detect the appropriate mechanism for this machine and set
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* up a few function pointers to access the correct method directly.
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*
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* The configuration method can be hard-coded in the config file by
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* using `options PCI_CONF_MODE=N', where `N' is the configuration mode
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* as defined section 3.6.4.1, `Generating Configuration Cycles'.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/lock.h>
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#include <uvm/uvm_extern.h>
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#define _X86_64_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/pio.h>
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#include <i386/isa/icu.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include "opt_pci_conf_mode.h"
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int pci_mode = -1;
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struct simplelock pci_conf_slock;
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#define PCI_CONF_LOCK(s) \
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do { \
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(s) = splhigh(); \
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simple_lock(&pci_conf_slock); \
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} while (0)
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#define PCI_CONF_UNLOCK(s) \
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do { \
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simple_unlock(&pci_conf_slock); \
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splx((s)); \
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} while (0)
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#define PCI_MODE1_ENABLE 0x80000000UL
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#define PCI_MODE1_ADDRESS_REG 0x0cf8
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#define PCI_MODE1_DATA_REG 0x0cfc
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#define PCI_MODE2_ENABLE_REG 0x0cf8
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#define PCI_MODE2_FORWARD_REG 0x0cfa
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#define _m1tag(b, d, f) \
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(PCI_MODE1_ENABLE | ((b) << 16) | ((d) << 11) | ((f) << 8))
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#define _id(v, p) \
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(((v) << PCI_VENDOR_SHIFT) | ((p) << PCI_PRODUCT_SHIFT))
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#define _qe(bus, dev, fcn, vend, prod) \
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{_m1tag(bus, dev, fcn), _id(vend, prod)}
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struct {
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u_int32_t tag;
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pcireg_t id;
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} pcim1_quirk_tbl[] = {
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_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX1),
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/* XXX Triflex2 not tested */
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_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX2),
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_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX4),
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/* Triton needed for Connectix Virtual PC */
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_qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437FX),
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{0, 0xffffffff} /* patchable */
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};
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#undef _m1tag
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#undef _id
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#undef _qe
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/*
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* PCI doesn't have any special needs; just use the generic versions
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* of these functions.
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*/
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struct x86_64_bus_dma_tag pci_bus_dma_tag = {
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0, /* _bounce_thresh */
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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_bus_dmamap_load,
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_bus_dmamap_load_mbuf,
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_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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_bus_dmamap_unload,
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NULL, /* _dmamap_sync */
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_bus_dmamem_alloc,
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_bus_dmamem_free,
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_bus_dmamem_map,
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_bus_dmamem_unmap,
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_bus_dmamem_mmap,
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};
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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if (pba->pba_bus == 0)
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printf(": configuration mode %d", pci_mode);
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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/*
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* Bus number is irrelevant. If Configuration Mechanism 2 is in
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* use, can only have devices 0-15 on any bus. If Configuration
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* Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal'
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* range).
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*/
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if (pci_mode == 2)
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return (16);
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else
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return (32);
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}
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pcitag_t
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pci_make_tag(pc, bus, device, function)
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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pcitag_t tag;
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#ifndef PCI_CONF_MODE
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switch (pci_mode) {
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case 1:
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goto mode1;
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case 2:
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goto mode2;
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default:
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panic("pci_make_tag: mode not configured");
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}
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
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#ifndef PCI_CONF_MODE
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mode1:
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#endif
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if (bus >= 256 || device >= 32 || function >= 8)
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panic("pci_make_tag: bad request");
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tag.mode1 = PCI_MODE1_ENABLE |
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(bus << 16) | (device << 11) | (function << 8);
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return tag;
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
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#ifndef PCI_CONF_MODE
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mode2:
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#endif
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if (bus >= 256 || device >= 16 || function >= 8)
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panic("pci_make_tag: bad request");
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tag.mode2.port = 0xc000 | (device << 8);
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tag.mode2.enable = 0xf0 | (function << 1);
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tag.mode2.forward = bus;
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return tag;
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#endif
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}
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void
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pci_decompose_tag(pc, tag, bp, dp, fp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int *bp, *dp, *fp;
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{
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#ifndef PCI_CONF_MODE
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switch (pci_mode) {
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case 1:
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goto mode1;
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case 2:
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goto mode2;
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default:
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panic("pci_decompose_tag: mode not configured");
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}
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
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#ifndef PCI_CONF_MODE
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mode1:
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#endif
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if (bp != NULL)
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*bp = (tag.mode1 >> 16) & 0xff;
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if (dp != NULL)
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*dp = (tag.mode1 >> 11) & 0x1f;
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if (fp != NULL)
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*fp = (tag.mode1 >> 8) & 0x7;
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return;
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
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#ifndef PCI_CONF_MODE
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mode2:
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#endif
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if (bp != NULL)
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*bp = tag.mode2.forward & 0xff;
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if (dp != NULL)
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*dp = (tag.mode2.port >> 8) & 0xf;
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if (fp != NULL)
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*fp = (tag.mode2.enable >> 1) & 0x7;
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#endif
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}
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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pcireg_t data;
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int s;
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#ifndef PCI_CONF_MODE
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switch (pci_mode) {
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case 1:
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goto mode1;
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case 2:
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goto mode2;
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default:
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panic("pci_conf_read: mode not configured");
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}
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
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#ifndef PCI_CONF_MODE
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mode1:
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#endif
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PCI_CONF_LOCK(s);
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outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg);
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data = inl(PCI_MODE1_DATA_REG);
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outl(PCI_MODE1_ADDRESS_REG, 0);
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PCI_CONF_UNLOCK(s);
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return data;
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
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#ifndef PCI_CONF_MODE
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mode2:
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#endif
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PCI_CONF_LOCK(s);
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outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);
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outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);
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data = inl(tag.mode2.port | reg);
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outb(PCI_MODE2_ENABLE_REG, 0);
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PCI_CONF_UNLOCK(s);
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return data;
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#endif
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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int s;
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#ifndef PCI_CONF_MODE
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switch (pci_mode) {
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case 1:
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goto mode1;
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case 2:
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goto mode2;
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default:
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panic("pci_conf_write: mode not configured");
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}
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
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#ifndef PCI_CONF_MODE
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mode1:
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#endif
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PCI_CONF_LOCK(s);
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outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg);
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outl(PCI_MODE1_DATA_REG, data);
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outl(PCI_MODE1_ADDRESS_REG, 0);
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PCI_CONF_UNLOCK(s);
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return;
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#endif
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#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
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#ifndef PCI_CONF_MODE
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mode2:
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#endif
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PCI_CONF_LOCK(s);
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outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);
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outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);
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outl(tag.mode2.port | reg, data);
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outb(PCI_MODE2_ENABLE_REG, 0);
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PCI_CONF_UNLOCK(s);
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#endif
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}
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int
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pci_mode_detect()
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{
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#ifdef PCI_CONF_MODE
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#if (PCI_CONF_MODE == 1) || (PCI_CONF_MODE == 2)
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return (pci_mode = PCI_CONF_MODE);
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#else
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#error Invalid PCI configuration mode.
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#endif
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#else
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u_int32_t sav, val;
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int i;
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pcireg_t idreg;
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simple_lock_init(&pci_conf_slock);
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if (pci_mode != -1)
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return pci_mode;
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/*
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* We try to divine which configuration mode the host bridge wants.
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*/
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sav = inl(PCI_MODE1_ADDRESS_REG);
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pci_mode = 1; /* assume this for now */
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/*
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* catch some known buggy implementations of mode 1
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*/
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for (i = 0; i < sizeof(pcim1_quirk_tbl) / sizeof(pcim1_quirk_tbl[0]);
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i++) {
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pcitag_t t;
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if (!pcim1_quirk_tbl[i].tag)
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break;
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t.mode1 = pcim1_quirk_tbl[i].tag;
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idreg = pci_conf_read(0, t, PCI_ID_REG); /* needs "pci_mode" */
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if (idreg == pcim1_quirk_tbl[i].id) {
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#ifdef DEBUG
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printf("known mode 1 PCI chipset (%08x)\n",
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idreg);
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#endif
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return (pci_mode);
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}
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}
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/*
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* Strong check for standard compliant mode 1:
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* 1. bit 31 ("enable") can be set
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* 2. byte/word access does not affect register
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*/
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outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE);
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outb(PCI_MODE1_ADDRESS_REG + 3, 0);
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outw(PCI_MODE1_ADDRESS_REG + 2, 0);
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val = inl(PCI_MODE1_ADDRESS_REG);
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if ((val & 0x80fffffc) != PCI_MODE1_ENABLE) {
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#ifdef DEBUG
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printf("pci_mode_detect: mode 1 enable failed (%x)\n",
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val);
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#endif
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goto not1;
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}
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outl(PCI_MODE1_ADDRESS_REG, 0);
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val = inl(PCI_MODE1_ADDRESS_REG);
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if ((val & 0x80fffffc) != 0)
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goto not1;
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return (pci_mode);
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not1:
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outl(PCI_MODE1_ADDRESS_REG, sav);
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/*
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* This mode 2 check is quite weak (and known to give false
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* positives on some Compaq machines).
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* However, this doesn't matter, because this is the
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* last test, and simply no PCI devices will be found if
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* this happens.
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*/
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outb(PCI_MODE2_ENABLE_REG, 0);
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outb(PCI_MODE2_FORWARD_REG, 0);
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if (inb(PCI_MODE2_ENABLE_REG) != 0 ||
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inb(PCI_MODE2_FORWARD_REG) != 0)
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goto not2;
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return (pci_mode = 2);
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not2:
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return (pci_mode = 0);
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#endif
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}
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int
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pci_intr_map(pa, ihp)
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struct pci_attach_args *pa;
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pci_intr_handle_t *ihp;
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{
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int pin = pa->pa_intrpin;
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int line = pa->pa_intrline;
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if (pin == 0) {
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/* No IRQ used. */
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goto bad;
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}
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if (pin > PCI_INTERRUPT_PIN_MAX) {
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printf("pci_intr_map: bad interrupt pin %d\n", pin);
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goto bad;
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}
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/*
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* Section 6.2.4, `Miscellaneous Functions', says that 255 means
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* `unknown' or `no connection' on a PC. We assume that a device with
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* `no connection' either doesn't have an interrupt (in which case the
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* pin number should be 0, and would have been noticed above), or
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* wasn't configured by the BIOS (in which case we punt, since there's
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* no real way we can know how the interrupt lines are mapped in the
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* hardware).
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*
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* XXX
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* Since IRQ 0 is only used by the clock, and we can't actually be sure
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* that the BIOS did its job, we also recognize that as meaning that
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* the BIOS has not configured the device.
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*/
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if (line == 0 || line == X86_64_PCI_INTERRUPT_LINE_NO_CONNECTION) {
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printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
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goto bad;
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} else {
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if (line >= ICU_LEN) {
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printf("pci_intr_map: bad interrupt line %d\n", line);
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goto bad;
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}
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if (line == 2) {
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printf("pci_intr_map: changed line 2 to line 9\n");
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line = 9;
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}
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}
|
|
|
|
*ihp = line;
|
|
return 0;
|
|
|
|
bad:
|
|
*ihp = -1;
|
|
return 1;
|
|
}
|
|
|
|
const char *
|
|
pci_intr_string(pc, ih)
|
|
pci_chipset_tag_t pc;
|
|
pci_intr_handle_t ih;
|
|
{
|
|
static char irqstr[8]; /* 4 + 2 + NULL + sanity */
|
|
|
|
if (ih == 0 || ih >= ICU_LEN || ih == 2)
|
|
panic("pci_intr_string: bogus handle 0x%x\n", ih);
|
|
|
|
sprintf(irqstr, "irq %d", ih);
|
|
return (irqstr);
|
|
|
|
}
|
|
|
|
const struct evcnt *
|
|
pci_intr_evcnt(pc, ih)
|
|
pci_chipset_tag_t pc;
|
|
pci_intr_handle_t ih;
|
|
{
|
|
|
|
/* XXX for now, no evcnt parent reported */
|
|
return NULL;
|
|
}
|
|
|
|
void *
|
|
pci_intr_establish(pc, ih, level, func, arg)
|
|
pci_chipset_tag_t pc;
|
|
pci_intr_handle_t ih;
|
|
int level, (*func) __P((void *));
|
|
void *arg;
|
|
{
|
|
|
|
if (ih == 0 || ih >= ICU_LEN || ih == 2)
|
|
panic("pci_intr_establish: bogus handle 0x%x\n", ih);
|
|
|
|
return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
|
|
}
|
|
|
|
void
|
|
pci_intr_disestablish(pc, cookie)
|
|
pci_chipset_tag_t pc;
|
|
void *cookie;
|
|
{
|
|
|
|
return isa_intr_disestablish(NULL, cookie);
|
|
}
|
|
|
|
/*
|
|
* Determine which flags should be passed to the primary PCI bus's
|
|
* autoconfiguration node. We use this to detect broken chipsets
|
|
* which cannot safely use memory-mapped device access.
|
|
*/
|
|
int
|
|
pci_bus_flags()
|
|
{
|
|
int rval = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
|
|
int device, maxndevs;
|
|
pcitag_t tag;
|
|
pcireg_t id;
|
|
|
|
maxndevs = pci_bus_maxdevs(NULL, 0);
|
|
|
|
for (device = 0; device < maxndevs; device++) {
|
|
tag = pci_make_tag(NULL, 0, device, 0);
|
|
id = pci_conf_read(NULL, tag, PCI_ID_REG);
|
|
|
|
/* Invalid vendor ID value? */
|
|
if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
|
|
continue;
|
|
/* XXX Not invalid, but we've done this ~forever. */
|
|
if (PCI_VENDOR(id) == 0)
|
|
continue;
|
|
|
|
switch (PCI_VENDOR(id)) {
|
|
case PCI_VENDOR_SIS:
|
|
switch (PCI_PRODUCT(id)) {
|
|
case PCI_PRODUCT_SIS_85C496:
|
|
goto disable_mem;
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
return (rval);
|
|
|
|
disable_mem:
|
|
printf("Warning: broken PCI-Host bridge detected; "
|
|
"disabling memory-mapped access\n");
|
|
rval &= ~PCI_FLAGS_MEM_ENABLED;
|
|
return (rval);
|
|
}
|