9cc521a148
info common to all types of ATA controllers.
123 lines
4.2 KiB
C
123 lines
4.2 KiB
C
/* $NetBSD: dtide.c,v 1.18 2004/08/20 06:39:39 thorpej Exp $ */
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/*-
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* Copyright (c) 2000, 2001 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* dtide.c - Driver for the D.T. Software IDE interface.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: dtide.c,v 1.18 2004/08/20 06:39:39 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <dev/podulebus/podulebus.h>
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#include <dev/podulebus/podules.h>
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#include <dev/podulebus/dtidereg.h>
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#include <dev/ic/wdcreg.h>
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcvar.h>
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struct dtide_softc {
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struct wdc_softc sc_wdc;
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struct ata_channel *sc_chp[DTIDE_NCHANNELS];/* pointers to sc_chan */
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struct ata_channel sc_chan[DTIDE_NCHANNELS];
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struct ata_queue sc_chq[DTIDE_NCHANNELS];
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struct wdc_regs sc_wdc_regs[DTIDE_NCHANNELS];
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bus_space_tag_t sc_magict;
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bus_space_handle_t sc_magich;
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};
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static int dtide_match(struct device *, struct cfdata *, void *);
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static void dtide_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(dtide, sizeof(struct dtide_softc),
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dtide_match, dtide_attach, NULL, NULL);
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static const int dtide_cmdoffsets[] = { DTIDE_CMDBASE0, DTIDE_CMDBASE1 };
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static const int dtide_ctloffsets[] = { DTIDE_CTLBASE0, DTIDE_CTLBASE1 };
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static int
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dtide_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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return pa->pa_product == PODULE_DTSOFT_IDE;
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}
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static void
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dtide_attach(struct device *parent, struct device *self, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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struct dtide_softc *sc = (void *)self;
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struct wdc_regs *wdr;
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struct ata_channel *ch;
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int i, j;
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bus_space_tag_t bst;
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sc->sc_wdc.regs = sc->sc_wdc_regs;
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sc->sc_wdc.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_NOIRQ;
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sc->sc_wdc.sc_atac.atac_pio_cap = 0; /* XXX correct? */
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sc->sc_wdc.sc_atac.atac_dma_cap = 0; /* XXX correct? */
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sc->sc_wdc.sc_atac.atac_udma_cap = 0;
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sc->sc_wdc.sc_atac.atac_nchannels = DTIDE_NCHANNELS;
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sc->sc_wdc.sc_atac.atac_channels = sc->sc_chp;
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sc->sc_magict = pa->pa_fast_t;
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bus_space_map(pa->pa_fast_t, pa->pa_fast_base + DTIDE_MAGICBASE, 0, 1,
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&sc->sc_magich);
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podulebus_shift_tag(pa->pa_fast_t, DTIDE_REGSHIFT, &bst);
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printf("\n");
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for (i = 0; i < DTIDE_NCHANNELS; i++) {
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ch = sc->sc_chp[i] = &sc->sc_chan[i];
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wdr = &sc->sc_wdc_regs[i];
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ch->ch_channel = i;
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ch->ch_atac = &sc->sc_wdc.sc_atac;
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wdr->cmd_iot = bst;
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wdr->ctl_iot = bst;
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ch->ch_queue = &sc->sc_chq[i];
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bus_space_map(pa->pa_fast_t,
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pa->pa_fast_base + dtide_cmdoffsets[i], 0, 8,
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&wdr->cmd_baseioh);
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for (j = 0; j < WDC_NREG; j++)
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bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
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j, j == 0 ? 4 : 1, &wdr->cmd_iohs[j]);
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wdc_init_shadow_regs(ch);
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bus_space_map(pa->pa_fast_t,
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pa->pa_fast_base + dtide_ctloffsets[i], 0, 8,
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&wdr->ctl_ioh);
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wdcattach(ch);
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}
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}
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