205 lines
5.8 KiB
C
205 lines
5.8 KiB
C
/* $NetBSD: ixp12x0_pci.c,v 1.3 2002/12/08 13:21:44 ichiro Exp $ */
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/*
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Ichiro FUKUHARA and Naoto Shimazaki.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI configuration support for IXP12x0 Network Processor chip.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <uvm/uvm_extern.h>
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#include <arm/ixp12x0/ixp12x0reg.h>
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#include <arm/ixp12x0/ixp12x0var.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pciconf.h>
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#include "opt_pci.h"
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#include "pci.h"
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void ixp12x0_pci_attach_hook(struct device *, struct device *,
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struct pcibus_attach_args *);
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int ixp12x0_pci_bus_maxdevs(void *, int);
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pcitag_t ixp12x0_pci_make_tag(void *, int, int, int);
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void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
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pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int);
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void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t);
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#define MAX_PCI_DEVICES 4
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/*
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* IXM1200 PCI configuration Cycles
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* Device Address
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* -------------------------------------
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* 0 IXP1200 0x0800 - 0x08FF
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* 1 i21555 0x1000 - 0x10FF
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* 2 i82559 0x2000 - 0x20FF
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* 3 PMC expansion 0x4000 - 0x40FF
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*/
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void
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ixp12x0_pci_init(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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pc->pc_conf_v = cookie;
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pc->pc_attach_hook = ixp12x0_pci_attach_hook;
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pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs;
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pc->pc_make_tag = ixp12x0_pci_make_tag;
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pc->pc_decompose_tag = ixp12x0_pci_decompose_tag;
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pc->pc_conf_read = ixp12x0_pci_conf_read;
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pc->pc_conf_write = ixp12x0_pci_conf_write;
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}
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void
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pci_conf_interrupt(pc, a, b, c, d, p)
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pci_chipset_tag_t pc;
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int a, b, c, d, *p;
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{
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/* Nothing */
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}
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void
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ixp12x0_pci_attach_hook(parent, self, pba)
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struct device *parent;
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struct device *self;
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struct pcibus_attach_args *pba;
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{
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/* Nothing to do. */
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}
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int
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ixp12x0_pci_bus_maxdevs(v, busno)
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void *v;
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int busno;
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{
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return(MAX_PCI_DEVICES);
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}
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pcitag_t
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ixp12x0_pci_make_tag(v, bus, device, function)
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void *v;
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int bus, device, function;
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{
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#ifdef PCI_DEBUG
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printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
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v, bus, device, function);
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#endif
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#ifdef PCI_DEBUG2
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printf("ixp12x0_pci_make_tag return = 0x%x\n",
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((bus << 16) | (device << 11) | (function << 8)));
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#endif
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return ((bus << 16) | (device << 11) | (function << 8));
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}
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void
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ixp12x0_pci_decompose_tag(v, tag, busp, devicep, functionp)
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void *v;
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pcitag_t tag;
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int *busp, *devicep, *functionp;
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{
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#ifdef PCI_DEBUG
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printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
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v, tag, (int)busp, (int)devicep, (int)functionp);
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#endif
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if (busp != NULL)
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*busp = (tag >> 16) & 0xff;
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if (devicep != NULL)
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*devicep = (tag >> 11) & 0x1f;
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if (functionp != NULL)
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*functionp = (tag >> 8) & 0x7;
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}
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pcireg_t
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ixp12x0_pci_conf_read(v, tag, offset)
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void *v;
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pcitag_t tag;
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int offset;
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{
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int bus, device, function;
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u_int address;
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pcireg_t val;
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ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
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/* bus == 0 */
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address = IXP12X0_PCI_TYPE0_VBASE |
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((0x1) << (device)) << 11 | (offset & 0xff); /* XXX */
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val = *((unsigned int *)address);
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#ifdef PCI_DEBUG
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printf("ixp12x0_pci_conf_read(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
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address, v, tag, offset, val);
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#endif
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#ifdef PCI_DEBUG2
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printf("ixp12x0_pci_conf_read(addr=%08x)(bus=0x%08x device=0x%08x function=0x%08x offset=0x%02x)\n", address, bus, device, function, offset);
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#endif
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return(val);
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}
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void
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ixp12x0_pci_conf_write(v, tag, offset, val)
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void *v;
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pcitag_t tag;
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int offset;
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pcireg_t val;
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{
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int bus, device, function;
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u_int address;
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ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
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/* bus == 0 */
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address = IXP12X0_PCI_TYPE0_VBASE |
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((0x1) << (device)) << 11 | (offset & 0xff); /* XXX */
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#ifdef PCI_DEBUG
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printf("ixp12x0_pci_conf_write(addr=%08x)(v=%p tag=0x%08lx offset=0x%02x)=0x%08x\n",
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address, v, tag, offset, val);
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#endif
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*((unsigned int *)address) = val;
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}
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