97 lines
3.3 KiB
ArmAsm
97 lines
3.3 KiB
ArmAsm
/* $NetBSD: start.S,v 1.7 2008/04/28 20:23:16 martin Exp $ */
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/*
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Wayne Knowles
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <mips/asm.h>
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#include <mips/cache_r4k.h>
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LEAF(start)
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.set noreorder
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.set mips3
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#ifdef __GP_SUPPORT__
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la gp, _C_LABEL (_gp)
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#endif
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la sp, start - CALLFRAME_SIZ
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sw zero, CALLFRAME_RA(sp) # clear ra for debugger
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sw zero, CALLFRAME_SP(sp) # clear fp for debugger
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move s0, a0 # save argc
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move s1, a1 # save argv
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jal _C_LABEL(flushcache)
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nop
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la a0, _C_LABEL (edata) # clear BSS
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move a1, zero
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la a2, _C_LABEL (end)
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jal _C_LABEL(memset) # memset(edata, 0, end - edata)
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subu a2, a2, a0
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move a0, s0 # restore argc
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jal _C_LABEL(main) # main(unsigned int)
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move a1, s1 # restore argv
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XLEAF(_rtt)
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jal _C_LABEL(cpu_reboot) # failed, reboot
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nop
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END(start)
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LEAF(flushcache)
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li t0, 0x80000000
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addu t1, t0, 32*1024 /* flush 32KB */
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subu t1, t1, 0x100 /* per 256 bytes */
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1:
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/* flush I-cache */
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x000(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x020(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x040(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x060(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x080(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x0a0(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x0c0(t0)
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cache CACHE_R4K_I | CACHEOP_R4K_INDEX_INV, 0x0e0(t0)
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/* flush D-cache */
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x000(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x020(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x040(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x060(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x080(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x0a0(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x0c0(t0)
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cache CACHE_R4K_D | CACHEOP_R4K_INDEX_WB_INV, 0x0e0(t0)
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bne t0, t1, 1b
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addu t0, t0, 0x100
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j ra
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nop
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END(flushcache)
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