104 lines
3.5 KiB
C
104 lines
3.5 KiB
C
/* $NetBSD: intr.h,v 1.2 2003/02/07 17:46:12 cgd Exp $ */
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/*
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* Copyright 2000, 2001
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* Broadcom Corporation. All rights reserved.
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*
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* This software is furnished under license and may be used and copied only
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* in accordance with the following terms and conditions. Subject to these
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* conditions, you may download, copy, install, use, modify and distribute
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* modified or unmodified copies of this software in source and/or binary
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* form. No title or ownership is transferred hereby.
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*
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* 1) Any source code used, modified or distributed must reproduce and
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* retain this copyright notice and list of conditions as they appear in
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* the source file.
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*
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* 2) No right is granted to use any trade name, trademark, or logo of
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* Broadcom Corporation. The "Broadcom Corporation" name may not be
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* used to endorse or promote products derived from this software
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* without the prior written permission of Broadcom Corporation.
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*
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* 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
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* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
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* FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
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* LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SBMIPS_INTR_H_
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#define _SBMIPS_INTR_H_
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#include <machine/systemsw.h>
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/* Interrupt levels */
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#define IPL_SERIAL 0
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#define IPL_STATCLOCK 1
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#define IPL_CLOCK 2
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#define IPL_BIO 3
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#define IPL_NET 4
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#define IPL_TTY 5
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#define _NIPL 6
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#define IPL_SOFTSERIAL 1000
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#define IPL_SOFTNET 1001
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#define IPL_SOFTCLOCK 1002
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#define _IMR_SOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1)
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#define _IMR_VM (_IMR_SOFT | MIPS_INT_MASK_0)
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#define _IMR_SCHED (_IMR_VM | MIPS_INT_MASK_1 | MIPS_INT_MASK_5)
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#define _IMR_SERIAL (_IMR_SCHED | MIPS_INT_MASK_2)
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#define _IMR_HIGH (MIPS_INT_MASK)
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#define splbio() _splraise(_IMR_VM)
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#define splclock() _splraise(_IMR_SCHED)
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#define splhigh() _splraise(_IMR_HIGH)
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#define spllock() splhigh()
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#define splvm() _splraise(_IMR_VM)
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#define splnet() _splraise(_IMR_VM)
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#define splsched() _splraise(_IMR_SCHED)
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#define splserial() _splraise(_IMR_SERIAL)
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#define splsoftclock() _splraise(_IMR_SOFT)
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#define splsoftnet() _splraise(_IMR_SOFT)
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#define splsoftserial() _splraise(_IMR_SOFT)
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#define splstatclock() _splraise(_IMR_SCHED)
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#define spltty() _splraise(_IMR_VM)
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#define spl0() _spllower(0)
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#define spllowersoftclock() _spllower(_IMR_SOFT)
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#define splx(s) _splset(s)
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#define __GENERIC_SOFT_INTERRUPTS
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void *softintr_establish(int level, void (*fun)(void *), void *arg);
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void softintr_disestablish(void *cookie);
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void softintr_schedule(void *cookie);
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/* for interrupt dispatch code */
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void dosoftints(void);
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/* XXX backward-compat */
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void setsoftclock(void);
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void setsoftnet(void);
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extern int _splraise(int);
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extern int _spllower(int);
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extern int _splset(int);
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extern int _splget(void);
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extern void _splnone(void);
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extern void _setsoftintr(int);
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extern void _clrsoftintr(int);
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/* XXX */
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extern u_long intrcnt[];
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#define SOFTCLOCK_INTR 0
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#define SOFTNET_INTR 1
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#endif /* _SBMIPS_INTR_H_ */
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