1429 lines
33 KiB
C
1429 lines
33 KiB
C
/* $NetBSD: com.c,v 1.17 1997/07/28 18:07:06 mark Exp $ */
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/*-
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* Copyright (c) 1993, 1994, 1995, 1996
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* Charles M. Hannum. All rights reserved.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)com.c 7.5 (Berkeley) 5/16/91
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*/
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/*
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* COM driver, based on HP dca driver
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* uses National Semiconductor NS16450/NS16550AF UART
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ioctl.h>
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#include <sys/select.h>
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#include <sys/tty.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/uio.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <sys/types.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/irqhandler.h>
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#include <machine/io.h>
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#include <arm32/mainbus/mainbus.h>
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#include <arm32/mainbus/comreg.h>
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#include <arm32/mainbus/comvar.h>
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#include <dev/ic/ns16550reg.h>
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#ifdef COM_HAYESP
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#include <dev/ic/hayespreg.h>
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#endif
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#define com_lcr com_cfcr
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#include "com.h"
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#include "locators.h"
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#define COM_IBUFSIZE (2 * 512)
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#define COM_IHIGHWATER ((3 * COM_IBUFSIZE) / 4)
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struct com_softc {
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struct device sc_dev;
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void *sc_ih;
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struct tty *sc_tty;
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int sc_overflows;
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int sc_floods;
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int sc_failures;
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int sc_errors;
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int sc_halt;
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int sc_iobase;
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#ifdef COM_HAYESP
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int sc_hayespbase;
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#endif
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_space_handle_t sc_hayespioh;
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u_char sc_hwflags;
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#define COM_HW_NOIEN 0x01
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#define COM_HW_FIFO 0x02
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#define COM_HW_HAYESP 0x04
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#define COM_HW_CONSOLE 0x40
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u_char sc_swflags;
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#define COM_SW_SOFTCAR 0x01
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#define COM_SW_CLOCAL 0x02
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#define COM_SW_CRTSCTS 0x04
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#define COM_SW_MDMBUF 0x08
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u_char sc_msr, sc_mcr, sc_lcr, sc_ier;
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u_char sc_dtr;
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u_char *sc_ibuf, *sc_ibufp, *sc_ibufhigh, *sc_ibufend;
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u_char sc_ibufs[2][COM_IBUFSIZE];
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};
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#ifdef COM_HAYESP
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int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
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#endif
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void comdiag __P((void *));
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int comspeed __P((long));
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int comparam __P((struct tty *, struct termios *));
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void comstart __P((struct tty *));
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void comsoft __P((void *));
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/* XXX: These belong elsewhere */
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cdev_decl(com);
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bdev_decl(com);
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struct consdev;
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void comcnprobe __P((struct consdev *));
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void comcninit __P((struct consdev *));
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int comcngetc __P((dev_t));
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void comcnputc __P((dev_t, int));
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void comcnpollc __P((dev_t, int));
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static u_char tiocm_xxx2mcr __P((int));
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/*
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* XXX the following two cfattach structs should be different, and possibly
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* XXX elsewhere.
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*/
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#ifdef __BROKEN_INDIRECT_CONFIG
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int comprobe __P((struct device *, void *, void *));
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#else
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int comprobe __P((struct device *, struct cfdata *, void *));
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#endif
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void comattach __P((struct device *, struct device *, void *));
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struct cfattach com_ca = {
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sizeof(struct com_softc), comprobe, comattach
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};
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struct cfdriver com_cd = {
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NULL, "com", DV_TTY
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};
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#ifdef COMCONSOLE
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int comdefaultrate = CONSPEED; /* XXX why set default? */
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#else
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int comdefaultrate = TTYDEF_SPEED;
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#endif
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int comconsaddr;
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int comconsattached;
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bus_space_tag_t comconstag;
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bus_space_handle_t comconsbah;
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tcflag_t comconscflag = TTYDEF_CFLAG;
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int commajor;
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int comsopen = 0;
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int comevents = 0;
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#ifdef KGDB
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#include <machine/remote-sl.h>
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extern int kgdb_dev;
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extern int kgdb_rate;
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extern int kgdb_debug_init;
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#endif
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#define COMUNIT(x) (minor(x))
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/* Macros to clear/set/test flags. */
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#define SET(t, f) (t) |= (f)
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#define CLR(t, f) (t) &= ~(f)
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#define ISSET(t, f) ((t) & (f))
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int
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comspeed(speed)
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long speed;
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{
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#define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
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int x, err;
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if (speed == 0)
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return 0;
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if (speed < 0)
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return -1;
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x = divrnd((COM_FREQ / 16), speed);
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if (x <= 0)
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return -1;
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err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
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if (err < 0)
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err = -err;
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if (err > COM_TOLERANCE)
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return -1;
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return x;
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#undef divrnd(n, q)
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}
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int
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comprobe1(iot, ioh, iobase)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int iobase;
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{
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/* force access to id reg */
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bus_space_write_1(iot, ioh, com_lcr, 0);
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bus_space_write_1(iot, ioh, com_iir, 0);
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if (bus_space_read_1(iot, ioh, com_iir) & 0x38)
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return 0;
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return 1;
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}
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#ifdef COM_HAYESP
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int
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comprobeHAYESP(hayespioh, sc)
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bus_space_handle_t hayespioh;
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struct com_softc *sc;
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{
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char val, dips;
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int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
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bus_space_tag_t iot = sc->sc_iot;
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/*
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* Hayes ESP cards have two iobases. One is for compatibility with
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* 16550 serial chips, and at the same ISA PC base addresses. The
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* other is for ESP-specific enhanced features, and lies at a
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* different addressing range entirely (0x140, 0x180, 0x280, or 0x300).
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*/
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/* Test for ESP signature */
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if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
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return 0;
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/*
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* ESP is present at ESP enhanced base address; unknown com port
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*/
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/* Get the dip-switch configurations */
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bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
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dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
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/* Determine which com port this ESP card services: bits 0,1 of */
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/* dips is the port # (0-3); combaselist[val] is the com_iobase */
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if (sc->sc_iobase != combaselist[dips & 0x03])
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return 0;
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printf(": ESP");
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/* Check ESP Self Test bits. */
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/* Check for ESP version 2.0: bits 4,5,6 == 010 */
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bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
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val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */
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val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
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if ((val & 0x70) < 0x20) {
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printf("-old (%o)", val & 0x70);
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/* we do not support the necessary features */
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return 0;
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}
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/* Check for ability to emulate 16550: bit 8 == 1 */
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if ((dips & 0x80) == 0) {
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printf(" slave");
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/* XXX Does slave really mean no 16550 support?? */
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return 0;
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}
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/*
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* If we made it this far, we are a full-featured ESP v2.0 (or
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* better), at the correct com port address.
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*/
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SET(sc->sc_hwflags, COM_HW_HAYESP);
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printf(", 1024 byte fifo\n");
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return 1;
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}
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#endif
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int
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comprobe(parent, match, aux)
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struct device *parent;
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#ifdef __BROKEN_INDIRECT_CONFIG
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void *match;
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#else
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struct cfdata *match;
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#endif
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void *aux;
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{
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int iobase;
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int rv = 1;
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struct mainbus_attach_args *mb = aux;
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/* We need a base address */
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if (mb->mb_iobase == MAINBUSCF_BASE_DEFAULT)
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return(0);
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iot = mb->mb_iot;
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iobase = mb->mb_iobase;
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/* if it's in use as console, it's there. */
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if (iobase == comconsaddr && !comconsattached)
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goto out;
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if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
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rv = 0;
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goto out;
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}
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rv = comprobe1(iot, ioh, iobase);
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bus_space_unmap(iot, ioh, COM_NPORTS);
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out:
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mb->mb_iosize = COM_NPORTS;
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return (rv);
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}
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void
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comattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct com_softc *sc = (void *)self;
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int iobase, irq;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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#ifdef COM_HAYESP
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int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
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int *hayespp;
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#endif
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struct mainbus_attach_args *mb = aux;
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sc->sc_hwflags = 0;
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sc->sc_swflags = 0;
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/*
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* We're living on an isa.
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*/
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iobase = mb->mb_iobase;
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iot = mb->mb_iot;
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if (iobase != comconsaddr) {
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if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
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panic("comattach: io mapping failed");
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} else
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ioh = comconsbah;
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irq = mb->mb_irq;
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sc->sc_iot = iot;
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sc->sc_ioh = ioh;
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sc->sc_iobase = iobase;
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if (iobase == comconsaddr) {
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comconsattached = 1;
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/* Make sure the console is always "hardwired". */
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delay(1000); /* wait for output to finish */
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SET(sc->sc_hwflags, COM_HW_CONSOLE);
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SET(sc->sc_swflags, COM_SW_SOFTCAR);
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}
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#ifdef COM_HAYESP
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/* Look for a Hayes ESP board. */
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for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
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bus_space_handle_t hayespioh;
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#define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */
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if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh))
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continue;
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if (comprobeHAYESP(hayespioh, sc)) {
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sc->sc_hayespbase = *hayespp;
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sc->sc_hayespioh = hayespioh;
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break;
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}
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bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
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}
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/* No ESP; look for other things. */
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if (*hayespp == 0) {
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#endif
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/* look for a NS 16550AF UART with FIFOs */
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bus_space_write_1(iot, ioh, com_fifo,
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FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
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delay(100);
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if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
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if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
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SET(sc->sc_hwflags, COM_HW_FIFO);
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printf(": ns16550a, working fifo\n");
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} else
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printf(": ns16550, broken fifo\n");
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else
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printf(": ns8250 or ns16450, no fifo\n");
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bus_space_write_1(iot, ioh, com_fifo, 0);
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#ifdef COM_HAYESP
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}
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#endif
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/* disable interrupts */
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bus_space_write_1(iot, ioh, com_ier, 0);
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bus_space_write_1(iot, ioh, com_mcr, 0);
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if (irq != IRQUNK) {
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sc->sc_ih = intr_claim(irq, IPL_TTY, "com",
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comintr, sc);
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}
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if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
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cominit(iot, ioh, comdefaultrate);
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printf("%s: console\n", sc->sc_dev.dv_xname);
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}
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#ifdef KGDB
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if (kgdb_dev == makedev(commajor, unit)) {
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if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
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kgdb_dev = -1; /* can't debug over console port */
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else {
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cominit(iot, ioh, kgdb_rate);
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if (kgdb_debug_init) {
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/*
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* Print prefix of device name,
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* let kgdb_connect print the rest.
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*/
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printf("%s: ", sc->sc_dev.dv_xname);
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kgdb_connect(1);
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} else
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printf("%s: kgdb enabled\n",
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sc->sc_dev.dv_xname);
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}
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}
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#endif
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}
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int
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comopen(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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{
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int unit = COMUNIT(dev);
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struct com_softc *sc;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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struct tty *tp;
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int s;
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int error = 0;
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int count;
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if (unit >= com_cd.cd_ndevs)
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return ENXIO;
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sc = com_cd.cd_devs[unit];
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if (!sc)
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return ENXIO;
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if (!sc->sc_tty) {
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tp = sc->sc_tty = ttymalloc();
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tty_attach(tp);
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} else
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tp = sc->sc_tty;
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tp->t_oproc = comstart;
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tp->t_param = comparam;
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tp->t_dev = dev;
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if (!ISSET(tp->t_state, TS_ISOPEN)) {
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SET(tp->t_state, TS_WOPEN);
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ttychars(tp);
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tp->t_iflag = TTYDEF_IFLAG;
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tp->t_oflag = TTYDEF_OFLAG;
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if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
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tp->t_cflag = comconscflag;
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else
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tp->t_cflag = TTYDEF_CFLAG;
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if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
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SET(tp->t_cflag, CLOCAL);
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if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
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SET(tp->t_cflag, CRTSCTS);
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if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
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SET(tp->t_cflag, MDMBUF);
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tp->t_lflag = TTYDEF_LFLAG;
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tp->t_ispeed = tp->t_ospeed = comdefaultrate;
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s = spltty();
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comparam(tp, &tp->t_termios);
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ttsetwater(tp);
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if (comsopen++ == 0)
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timeout(comsoft, NULL, 1);
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sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
|
|
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
|
|
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
|
|
|
|
iot = sc->sc_iot;
|
|
ioh = sc->sc_ioh;
|
|
#ifdef COM_HAYESP
|
|
/* Setup the ESP board */
|
|
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
|
|
bus_space_handle_t hayespioh = sc->sc_hayespioh;
|
|
|
|
bus_space_write_1(iot, ioh, com_fifo,
|
|
FIFO_DMA_MODE|FIFO_ENABLE|
|
|
FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8);
|
|
|
|
/* Set 16550 compatibility mode */
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
|
|
HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
|
|
HAYESP_MODE_SCALE);
|
|
|
|
/* Set RTS/CTS flow control */
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
|
|
|
|
/* Set flow control levels */
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
|
|
HAYESP_HIBYTE(HAYESP_RXHIWMARK));
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
|
|
HAYESP_LOBYTE(HAYESP_RXHIWMARK));
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
|
|
HAYESP_HIBYTE(HAYESP_RXLOWMARK));
|
|
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
|
|
HAYESP_LOBYTE(HAYESP_RXLOWMARK));
|
|
} else
|
|
#endif
|
|
/*
|
|
* This is a patch for bugged revision 1-4 SMC FDC37C665
|
|
* I/O controllers.
|
|
* If there is RX data pending when the FIFO in turned on
|
|
* the RX register cannot be emptied.
|
|
*
|
|
* Solution:
|
|
* Make sure FIFO is off.
|
|
* Read pending data / int status etc.
|
|
* Enable FIFO.
|
|
*/
|
|
bus_space_write_1(iot, ioh, com_fifo, 0);
|
|
for (count = 0; count < 8; ++count)
|
|
(void)bus_space_read_1(iot, ioh, count);
|
|
if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
|
|
/* Set the FIFO threshold based on the receive speed. */
|
|
bus_space_write_1(iot, ioh, com_fifo,
|
|
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
|
|
(tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
|
|
/* flush any pending I/O */
|
|
count = 1024;
|
|
while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) && count > 0) {
|
|
(void) bus_space_read_1(iot, ioh, com_data);
|
|
--count;
|
|
}
|
|
if (count == 0) {
|
|
/*
|
|
* Read 1024 bytes from the serial chip and still data !
|
|
* This means something is broken ...
|
|
*/
|
|
printf("com init error: lsr=%02x data=%02x\n",
|
|
bus_space_read_1(iot, ioh, com_lsr),
|
|
bus_space_read_1(iot, ioh, com_data));
|
|
printf("Cannot clear serial input register\n");
|
|
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
|
|
CLR(tp->t_state, TS_WOPEN);
|
|
if (--comsopen == 0)
|
|
untimeout(comsoft, NULL);
|
|
splx(s);
|
|
return(ENXIO);
|
|
}
|
|
/* you turn me on, baby */
|
|
sc->sc_mcr = MCR_DTR | MCR_RTS;
|
|
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
|
|
SET(sc->sc_mcr, MCR_IENABLE);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
|
|
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
|
|
|
|
sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
|
|
if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) ||
|
|
ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
|
|
SET(tp->t_state, TS_CARR_ON);
|
|
else
|
|
CLR(tp->t_state, TS_CARR_ON);
|
|
} else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0)
|
|
return EBUSY;
|
|
else
|
|
s = spltty();
|
|
|
|
/* wait for carrier if necessary */
|
|
if (!ISSET(flag, O_NONBLOCK))
|
|
while (!ISSET(tp->t_cflag, CLOCAL) &&
|
|
!ISSET(tp->t_state, TS_CARR_ON)) {
|
|
SET(tp->t_state, TS_WOPEN);
|
|
error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
|
|
ttopen, 0);
|
|
if (error) {
|
|
/* XXX should turn off chip if we're the
|
|
only waiter */
|
|
splx(s);
|
|
return error;
|
|
}
|
|
}
|
|
splx(s);
|
|
|
|
return (*linesw[tp->t_line].l_open)(dev, tp);
|
|
}
|
|
|
|
int
|
|
comclose(dev, flag, mode, p)
|
|
dev_t dev;
|
|
int flag, mode;
|
|
struct proc *p;
|
|
{
|
|
int unit = COMUNIT(dev);
|
|
struct com_softc *sc = com_cd.cd_devs[unit];
|
|
struct tty *tp = sc->sc_tty;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int s;
|
|
|
|
/* XXX This is for cons.c. */
|
|
if (!ISSET(tp->t_state, TS_ISOPEN))
|
|
return 0;
|
|
|
|
(*linesw[tp->t_line].l_close)(tp, flag);
|
|
s = spltty();
|
|
CLR(sc->sc_lcr, LCR_SBREAK);
|
|
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
|
|
bus_space_write_1(iot, ioh, com_ier, 0);
|
|
if (ISSET(tp->t_cflag, HUPCL) &&
|
|
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
|
|
/* XXX perhaps only clear DTR */
|
|
bus_space_write_1(iot, ioh, com_mcr, 0);
|
|
bus_space_write_1(iot, ioh, com_fifo,
|
|
FIFO_RCV_RST | FIFO_XMT_RST);
|
|
}
|
|
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
|
|
if (--comsopen == 0)
|
|
untimeout(comsoft, NULL);
|
|
splx(s);
|
|
ttyclose(tp);
|
|
#ifdef notyet /* XXXX */
|
|
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
|
|
ttyfree(tp);
|
|
sc->sc_tty = 0;
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
comread(dev, uio, flag)
|
|
dev_t dev;
|
|
struct uio *uio;
|
|
int flag;
|
|
{
|
|
struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
|
|
}
|
|
|
|
int
|
|
comwrite(dev, uio, flag)
|
|
dev_t dev;
|
|
struct uio *uio;
|
|
int flag;
|
|
{
|
|
struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
|
|
}
|
|
|
|
struct tty *
|
|
comtty(dev)
|
|
dev_t dev;
|
|
{
|
|
struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
|
|
struct tty *tp = sc->sc_tty;
|
|
|
|
return (tp);
|
|
}
|
|
|
|
static u_char
|
|
tiocm_xxx2mcr(data)
|
|
int data;
|
|
{
|
|
u_char m = 0;
|
|
|
|
if (ISSET(data, TIOCM_DTR))
|
|
SET(m, MCR_DTR);
|
|
if (ISSET(data, TIOCM_RTS))
|
|
SET(m, MCR_RTS);
|
|
return m;
|
|
}
|
|
|
|
int
|
|
comioctl(dev, cmd, data, flag, p)
|
|
dev_t dev;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
int flag;
|
|
struct proc *p;
|
|
{
|
|
int unit = COMUNIT(dev);
|
|
struct com_softc *sc = com_cd.cd_devs[unit];
|
|
struct tty *tp = sc->sc_tty;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int error;
|
|
|
|
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return error;
|
|
error = ttioctl(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return error;
|
|
|
|
switch (cmd) {
|
|
case TIOCSBRK:
|
|
SET(sc->sc_lcr, LCR_SBREAK);
|
|
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
|
|
break;
|
|
case TIOCCBRK:
|
|
CLR(sc->sc_lcr, LCR_SBREAK);
|
|
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
|
|
break;
|
|
case TIOCSDTR:
|
|
SET(sc->sc_mcr, sc->sc_dtr);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
break;
|
|
case TIOCCDTR:
|
|
CLR(sc->sc_mcr, sc->sc_dtr);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
break;
|
|
case TIOCMSET:
|
|
CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
|
|
case TIOCMBIS:
|
|
SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
break;
|
|
case TIOCMBIC:
|
|
CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
break;
|
|
case TIOCMGET: {
|
|
u_char m;
|
|
int bits = 0;
|
|
|
|
m = sc->sc_mcr;
|
|
if (ISSET(m, MCR_DTR))
|
|
SET(bits, TIOCM_DTR);
|
|
if (ISSET(m, MCR_RTS))
|
|
SET(bits, TIOCM_RTS);
|
|
m = sc->sc_msr;
|
|
if (ISSET(m, MSR_DCD))
|
|
SET(bits, TIOCM_CD);
|
|
if (ISSET(m, MSR_CTS))
|
|
SET(bits, TIOCM_CTS);
|
|
if (ISSET(m, MSR_DSR))
|
|
SET(bits, TIOCM_DSR);
|
|
if (ISSET(m, MSR_RI | MSR_TERI))
|
|
SET(bits, TIOCM_RI);
|
|
if (bus_space_read_1(iot, ioh, com_ier))
|
|
SET(bits, TIOCM_LE);
|
|
*(int *)data = bits;
|
|
break;
|
|
}
|
|
case TIOCGFLAGS: {
|
|
int driverbits, userbits = 0;
|
|
|
|
driverbits = sc->sc_swflags;
|
|
if (ISSET(driverbits, COM_SW_SOFTCAR))
|
|
SET(userbits, TIOCFLAG_SOFTCAR);
|
|
if (ISSET(driverbits, COM_SW_CLOCAL))
|
|
SET(userbits, TIOCFLAG_CLOCAL);
|
|
if (ISSET(driverbits, COM_SW_CRTSCTS))
|
|
SET(userbits, TIOCFLAG_CRTSCTS);
|
|
if (ISSET(driverbits, COM_SW_MDMBUF))
|
|
SET(userbits, TIOCFLAG_MDMBUF);
|
|
|
|
*(int *)data = userbits;
|
|
break;
|
|
}
|
|
case TIOCSFLAGS: {
|
|
int userbits, driverbits = 0;
|
|
|
|
error = suser(p->p_ucred, &p->p_acflag);
|
|
if (error != 0)
|
|
return(EPERM);
|
|
|
|
userbits = *(int *)data;
|
|
if (ISSET(userbits, TIOCFLAG_SOFTCAR) ||
|
|
ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
|
|
SET(driverbits, COM_SW_SOFTCAR);
|
|
if (ISSET(userbits, TIOCFLAG_CLOCAL))
|
|
SET(driverbits, COM_SW_CLOCAL);
|
|
if (ISSET(userbits, TIOCFLAG_CRTSCTS))
|
|
SET(driverbits, COM_SW_CRTSCTS);
|
|
if (ISSET(userbits, TIOCFLAG_MDMBUF))
|
|
SET(driverbits, COM_SW_MDMBUF);
|
|
|
|
sc->sc_swflags = driverbits;
|
|
break;
|
|
}
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
comparam(tp, t)
|
|
struct tty *tp;
|
|
struct termios *t;
|
|
{
|
|
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int ospeed = comspeed(t->c_ospeed);
|
|
u_char lcr;
|
|
tcflag_t oldcflag;
|
|
int s;
|
|
|
|
/* check requested parameters */
|
|
if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
|
|
return EINVAL;
|
|
|
|
lcr = ISSET(sc->sc_lcr, LCR_SBREAK);
|
|
|
|
switch (ISSET(t->c_cflag, CSIZE)) {
|
|
case CS5:
|
|
SET(lcr, LCR_5BITS);
|
|
break;
|
|
case CS6:
|
|
SET(lcr, LCR_6BITS);
|
|
break;
|
|
case CS7:
|
|
SET(lcr, LCR_7BITS);
|
|
break;
|
|
case CS8:
|
|
SET(lcr, LCR_8BITS);
|
|
break;
|
|
}
|
|
if (ISSET(t->c_cflag, PARENB)) {
|
|
SET(lcr, LCR_PENAB);
|
|
if (!ISSET(t->c_cflag, PARODD))
|
|
SET(lcr, LCR_PEVEN);
|
|
}
|
|
if (ISSET(t->c_cflag, CSTOPB))
|
|
SET(lcr, LCR_STOPB);
|
|
|
|
sc->sc_lcr = lcr;
|
|
|
|
s = spltty();
|
|
|
|
if (ospeed == 0) {
|
|
CLR(sc->sc_mcr, MCR_DTR);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
}
|
|
|
|
/*
|
|
* Set the FIFO threshold based on the receive speed, if we are
|
|
* changing it.
|
|
*/
|
|
#if 0
|
|
if (tp->t_ispeed != t->c_ispeed) {
|
|
#else
|
|
if (1) {
|
|
#endif
|
|
if (ospeed != 0) {
|
|
/*
|
|
* Make sure the transmit FIFO is empty before
|
|
* proceeding. If we don't do this, some revisions
|
|
* of the UART will hang. Interestingly enough,
|
|
* even if we do this will the last character is
|
|
* still being pushed out, they don't hang. This
|
|
* seems good enough.
|
|
*/
|
|
while (ISSET(tp->t_state, TS_BUSY)) {
|
|
int error;
|
|
|
|
++sc->sc_halt;
|
|
error = ttysleep(tp, &tp->t_outq,
|
|
TTOPRI | PCATCH, "comprm", 0);
|
|
--sc->sc_halt;
|
|
if (error) {
|
|
splx(s);
|
|
comstart(tp);
|
|
return (error);
|
|
}
|
|
}
|
|
|
|
bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
|
|
bus_space_write_1(iot, ioh, com_dlbl, ospeed);
|
|
bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8);
|
|
bus_space_write_1(iot, ioh, com_lcr, lcr);
|
|
SET(sc->sc_mcr, MCR_DTR);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
} else
|
|
bus_space_write_1(iot, ioh, com_lcr, lcr);
|
|
|
|
if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) &&
|
|
ISSET(sc->sc_hwflags, COM_HW_FIFO))
|
|
bus_space_write_1(iot, ioh, com_fifo,
|
|
FIFO_ENABLE |
|
|
(t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
|
|
} else
|
|
bus_space_write_1(iot, ioh, com_lcr, lcr);
|
|
|
|
/* When not using CRTSCTS, RTS follows DTR. */
|
|
if (!ISSET(t->c_cflag, CRTSCTS)) {
|
|
if (ISSET(sc->sc_mcr, MCR_DTR)) {
|
|
if (!ISSET(sc->sc_mcr, MCR_RTS)) {
|
|
SET(sc->sc_mcr, MCR_RTS);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
}
|
|
} else {
|
|
if (ISSET(sc->sc_mcr, MCR_RTS)) {
|
|
CLR(sc->sc_mcr, MCR_RTS);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
}
|
|
}
|
|
sc->sc_dtr = MCR_DTR | MCR_RTS;
|
|
} else
|
|
sc->sc_dtr = MCR_DTR;
|
|
|
|
/* and copy to tty */
|
|
tp->t_ispeed = t->c_ispeed;
|
|
tp->t_ospeed = t->c_ospeed;
|
|
oldcflag = tp->t_cflag;
|
|
tp->t_cflag = t->c_cflag;
|
|
|
|
/*
|
|
* If DCD is off and MDMBUF is changed, ask the tty layer if we should
|
|
* stop the device.
|
|
*/
|
|
if (!ISSET(sc->sc_msr, MSR_DCD) &&
|
|
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
|
|
ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
|
|
(*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
|
|
CLR(sc->sc_mcr, sc->sc_dtr);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
}
|
|
|
|
/* Just to be sure... */
|
|
splx(s);
|
|
comstart(tp);
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
comstart(tp)
|
|
struct tty *tp;
|
|
{
|
|
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
int s;
|
|
|
|
s = spltty();
|
|
if (ISSET(tp->t_state, TS_BUSY))
|
|
goto out;
|
|
if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) ||
|
|
sc->sc_halt > 0)
|
|
goto stopped;
|
|
if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
|
|
goto stopped;
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
if (ISSET(tp->t_state, TS_ASLEEP)) {
|
|
CLR(tp->t_state, TS_ASLEEP);
|
|
wakeup(&tp->t_outq);
|
|
}
|
|
if (tp->t_outq.c_cc == 0)
|
|
goto stopped;
|
|
selwakeup(&tp->t_wsel);
|
|
}
|
|
SET(tp->t_state, TS_BUSY);
|
|
|
|
if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
|
|
SET(sc->sc_ier, IER_ETXRDY);
|
|
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
|
|
}
|
|
#ifdef COM_HAYESP
|
|
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
|
|
u_char buffer[1024], *cp = buffer;
|
|
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
|
|
do
|
|
bus_space_write_1(iot, ioh, com_data, *cp++);
|
|
while (--n);
|
|
}
|
|
else
|
|
#endif
|
|
if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
|
|
u_char buffer[16], *cp = buffer;
|
|
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
|
|
do {
|
|
bus_space_write_1(iot, ioh, com_data, *cp++);
|
|
} while (--n);
|
|
} else
|
|
bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq));
|
|
out:
|
|
splx(s);
|
|
return;
|
|
stopped:
|
|
if (ISSET(sc->sc_ier, IER_ETXRDY)) {
|
|
CLR(sc->sc_ier, IER_ETXRDY);
|
|
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Stop output on a line.
|
|
*/
|
|
void
|
|
comstop(tp, flag)
|
|
struct tty *tp;
|
|
int flag;
|
|
{
|
|
int s;
|
|
|
|
s = spltty();
|
|
if (ISSET(tp->t_state, TS_BUSY))
|
|
if (!ISSET(tp->t_state, TS_TTSTOP))
|
|
SET(tp->t_state, TS_FLUSH);
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
comdiag(arg)
|
|
void *arg;
|
|
{
|
|
struct com_softc *sc = arg;
|
|
int overflows, floods, failures;
|
|
int s;
|
|
|
|
s = spltty();
|
|
sc->sc_errors = 0;
|
|
overflows = sc->sc_overflows;
|
|
sc->sc_overflows = 0;
|
|
floods = sc->sc_floods;
|
|
sc->sc_floods = 0;
|
|
failures = sc->sc_failures;
|
|
sc->sc_failures = 0;
|
|
splx(s);
|
|
|
|
log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf overflow%s, %d uart failure%s\n",
|
|
sc->sc_dev.dv_xname,
|
|
overflows, overflows == 1 ? "" : "s",
|
|
floods, floods == 1 ? "" : "s",
|
|
failures, failures == 1 ? "" : "s");
|
|
}
|
|
|
|
void
|
|
comsoft(arg)
|
|
void *arg;
|
|
{
|
|
int unit;
|
|
struct com_softc *sc;
|
|
struct tty *tp;
|
|
register u_char *ibufp;
|
|
u_char *ibufend;
|
|
register int c;
|
|
int s;
|
|
static int lsrmap[8] = {
|
|
0, TTY_PE,
|
|
TTY_FE, TTY_PE|TTY_FE,
|
|
TTY_FE, TTY_PE|TTY_FE,
|
|
TTY_FE, TTY_PE|TTY_FE
|
|
};
|
|
|
|
s = spltty();
|
|
if (comevents == 0) {
|
|
splx(s);
|
|
goto out;
|
|
}
|
|
comevents = 0;
|
|
splx(s);
|
|
|
|
for (unit = 0; unit < com_cd.cd_ndevs; unit++) {
|
|
sc = com_cd.cd_devs[unit];
|
|
if (sc == 0 || sc->sc_ibufp == sc->sc_ibuf)
|
|
continue;
|
|
|
|
tp = sc->sc_tty;
|
|
|
|
s = spltty();
|
|
|
|
ibufp = sc->sc_ibuf;
|
|
ibufend = sc->sc_ibufp;
|
|
|
|
if (ibufp == ibufend) {
|
|
splx(s);
|
|
continue;
|
|
}
|
|
|
|
sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
|
|
sc->sc_ibufs[1] : sc->sc_ibufs[0];
|
|
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
|
|
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
|
|
|
|
if (tp == 0 || !ISSET(tp->t_state, TS_ISOPEN)) {
|
|
splx(s);
|
|
continue;
|
|
}
|
|
|
|
if (ISSET(tp->t_cflag, CRTSCTS) &&
|
|
!ISSET(sc->sc_mcr, MCR_RTS)) {
|
|
/* XXX */
|
|
SET(sc->sc_mcr, MCR_RTS);
|
|
bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr,
|
|
sc->sc_mcr);
|
|
}
|
|
|
|
splx(s);
|
|
|
|
while (ibufp < ibufend) {
|
|
c = *ibufp++;
|
|
if (*ibufp & LSR_OE) {
|
|
sc->sc_overflows++;
|
|
if (sc->sc_errors++ == 0)
|
|
timeout(comdiag, sc, 60 * hz);
|
|
}
|
|
/* This is ugly, but fast. */
|
|
c |= lsrmap[(*ibufp++ & (LSR_BI|LSR_FE|LSR_PE)) >> 2];
|
|
(*linesw[tp->t_line].l_rint)(c, tp);
|
|
}
|
|
}
|
|
|
|
out:
|
|
timeout(comsoft, NULL, 1);
|
|
}
|
|
|
|
int
|
|
comintr(arg)
|
|
void *arg;
|
|
{
|
|
struct com_softc *sc = arg;
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
struct tty *tp;
|
|
u_char iir, lsr, data, msr, delta;
|
|
#ifdef COM_DEBUG
|
|
int n;
|
|
struct {
|
|
u_char iir, lsr, msr;
|
|
} iter[32];
|
|
#endif
|
|
|
|
#ifdef COM_DEBUG
|
|
n = 0;
|
|
iter[n].iir =
|
|
#endif
|
|
iir = bus_space_read_1(iot, ioh, com_iir);
|
|
if (ISSET(iir, IIR_NOPEND))
|
|
return (0);
|
|
|
|
tp = sc->sc_tty;
|
|
|
|
for (;;) {
|
|
#ifdef COM_DEBUG
|
|
iter[n].lsr =
|
|
#endif
|
|
lsr = bus_space_read_1(iot, ioh, com_lsr);
|
|
|
|
if (ISSET(lsr, LSR_RXRDY)) {
|
|
register u_char *p = sc->sc_ibufp;
|
|
|
|
comevents = 1;
|
|
do {
|
|
data = bus_space_read_1(iot, ioh, com_data);
|
|
if (ISSET(lsr, LSR_BI)) {
|
|
#ifdef notdef
|
|
printf("break %02x %02x %02x %02x\n",
|
|
sc->sc_msr, sc->sc_mcr, sc->sc_lcr,
|
|
sc->sc_dtr);
|
|
#endif
|
|
#ifdef DDB
|
|
if (ISSET(sc->sc_hwflags,
|
|
COM_HW_CONSOLE)) {
|
|
Debugger();
|
|
goto next;
|
|
}
|
|
#endif
|
|
}
|
|
if (p >= sc->sc_ibufend) {
|
|
sc->sc_floods++;
|
|
if (sc->sc_errors++ == 0)
|
|
timeout(comdiag, sc, 60 * hz);
|
|
} else {
|
|
*p++ = data;
|
|
*p++ = lsr;
|
|
if (p == sc->sc_ibufhigh &&
|
|
ISSET(tp->t_cflag, CRTSCTS)) {
|
|
/* XXX */
|
|
CLR(sc->sc_mcr, MCR_RTS);
|
|
bus_space_write_1(iot, ioh,
|
|
com_mcr, sc->sc_mcr);
|
|
}
|
|
}
|
|
#ifdef DDB
|
|
next:
|
|
#endif
|
|
#ifdef COM_DEBUG
|
|
if (++n >= 32)
|
|
goto ohfudge;
|
|
iter[n].lsr =
|
|
#endif
|
|
lsr = bus_space_read_1(iot, ioh, com_lsr);
|
|
} while (ISSET(lsr, LSR_RXRDY));
|
|
|
|
sc->sc_ibufp = p;
|
|
} else {
|
|
#ifdef COM_DEBUG
|
|
if (ISSET(lsr, LSR_BI|LSR_FE|LSR_PE|LSR_OE))
|
|
printf("weird lsr %02x\n", lsr);
|
|
#endif
|
|
if ((iir & IIR_IMASK) == IIR_RXRDY) {
|
|
sc->sc_failures++;
|
|
if (sc->sc_errors++ == 0)
|
|
timeout(comdiag, sc, 60 * hz);
|
|
bus_space_write_1(iot, ioh, com_ier, 0);
|
|
delay(10);
|
|
bus_space_write_1(iot, ioh, com_ier,
|
|
sc->sc_ier);
|
|
iir = IIR_NOPEND;
|
|
continue;
|
|
}
|
|
}
|
|
|
|
#ifdef COM_DEBUG
|
|
iter[n].msr =
|
|
#endif
|
|
msr = bus_space_read_1(iot, ioh, com_msr);
|
|
|
|
if (msr != sc->sc_msr) {
|
|
delta = msr ^ sc->sc_msr;
|
|
sc->sc_msr = msr;
|
|
if (ISSET(delta, MSR_DCD) &&
|
|
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
|
|
(*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
|
|
CLR(sc->sc_mcr, sc->sc_dtr);
|
|
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
|
|
}
|
|
if (ISSET(delta & msr, MSR_CTS) &&
|
|
ISSET(tp->t_cflag, CRTSCTS)) {
|
|
/* the line is up and we want to do rts/cts flow control */
|
|
(*linesw[tp->t_line].l_start)(tp);
|
|
}
|
|
}
|
|
|
|
if (ISSET(lsr, LSR_TXRDY) && ISSET(tp->t_state, TS_BUSY)) {
|
|
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
|
|
if (sc->sc_halt > 0)
|
|
wakeup(&tp->t_outq);
|
|
(*linesw[tp->t_line].l_start)(tp);
|
|
}
|
|
|
|
#ifdef COM_DEBUG
|
|
if (++n >= 32)
|
|
goto ohfudge;
|
|
iter[n].iir =
|
|
#endif
|
|
iir = bus_space_read_1(iot, ioh, com_iir);
|
|
if (ISSET(iir, IIR_NOPEND))
|
|
return (1);
|
|
}
|
|
|
|
#ifdef COM_DEBUG
|
|
ohfudge:
|
|
printf("comintr: too many iterations");
|
|
for (n = 0; n < 32; n++) {
|
|
if ((n % 4) == 0)
|
|
printf("\ncomintr: iter[%02d]", n);
|
|
printf(" %02x %02x %02x", iter[n].iir, iter[n].lsr, iter[n].msr);
|
|
}
|
|
printf("\n");
|
|
printf("comintr: msr %02x mcr %02x lcr %02x ier %02x\n",
|
|
sc->sc_msr, sc->sc_mcr, sc->sc_lcr, sc->sc_ier);
|
|
printf("comintr: state %08x cc %d\n", sc->sc_tty->t_state,
|
|
sc->sc_tty->t_outq.c_cc);
|
|
return (1);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Following are all routines needed for COM to act as console
|
|
*/
|
|
#include <dev/cons.h>
|
|
|
|
void
|
|
comcnprobe(cp)
|
|
struct consdev *cp;
|
|
{
|
|
/* XXX NEEDS TO BE FIXED XXX */
|
|
bus_space_tag_t iot = 0;
|
|
bus_space_handle_t ioh;
|
|
int found;
|
|
|
|
if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) {
|
|
cp->cn_pri = CN_DEAD;
|
|
return;
|
|
}
|
|
found = comprobe1(iot, ioh, CONADDR);
|
|
bus_space_unmap(iot, ioh, COM_NPORTS);
|
|
if (!found) {
|
|
cp->cn_pri = CN_DEAD;
|
|
return;
|
|
}
|
|
|
|
/* locate the major number */
|
|
for (commajor = 0; commajor < nchrdev; commajor++)
|
|
if (cdevsw[commajor].d_open == comopen)
|
|
break;
|
|
|
|
/* initialize required fields */
|
|
cp->cn_dev = makedev(commajor, CONUNIT);
|
|
#ifdef COMCONSOLE
|
|
cp->cn_pri = CN_REMOTE; /* Force a serial port console */
|
|
#else
|
|
cp->cn_pri = CN_NORMAL;
|
|
#endif
|
|
}
|
|
|
|
void
|
|
comcninit(cp)
|
|
struct consdev *cp;
|
|
{
|
|
|
|
#if 0
|
|
XXX NEEDS TO BE FIXED XXX
|
|
comconstag = ???;
|
|
#endif
|
|
if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah))
|
|
panic("comcninit: mapping failed");
|
|
|
|
cominit(comconstag, comconsbah, comdefaultrate);
|
|
comconsaddr = CONADDR;
|
|
}
|
|
|
|
void
|
|
cominit(iot, ioh, rate)
|
|
bus_space_tag_t iot;
|
|
bus_space_handle_t ioh;
|
|
int rate;
|
|
{
|
|
int s = splhigh();
|
|
u_char stat;
|
|
|
|
bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
|
|
rate = comspeed(comdefaultrate);
|
|
bus_space_write_1(iot, ioh, com_dlbl, rate);
|
|
bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
|
|
bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
|
|
bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
|
|
bus_space_write_1(iot, ioh, com_fifo,
|
|
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
|
|
bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS);
|
|
DELAY(100);
|
|
stat = bus_space_read_1(iot, ioh, com_iir);
|
|
splx(s);
|
|
}
|
|
|
|
int
|
|
comcngetc(dev)
|
|
dev_t dev;
|
|
{
|
|
int s = splhigh();
|
|
bus_space_tag_t iot = comconstag;
|
|
bus_space_handle_t ioh = comconsbah;
|
|
u_char stat, c;
|
|
|
|
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
|
|
;
|
|
c = bus_space_read_1(iot, ioh, com_data);
|
|
stat = bus_space_read_1(iot, ioh, com_iir);
|
|
splx(s);
|
|
return c;
|
|
}
|
|
|
|
/*
|
|
* Console kernel output character routine.
|
|
*/
|
|
void
|
|
comcnputc(dev, c)
|
|
dev_t dev;
|
|
int c;
|
|
{
|
|
int s = splhigh();
|
|
bus_space_tag_t iot = comconstag;
|
|
bus_space_handle_t ioh = comconsbah;
|
|
u_char stat;
|
|
register int timo;
|
|
|
|
/* wait for any pending transmission to finish */
|
|
timo = 50000;
|
|
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
|
|
;
|
|
bus_space_write_1(iot, ioh, com_data, c);
|
|
/* wait for this transmission to complete */
|
|
timo = 1500000;
|
|
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
|
|
;
|
|
/* clear any interrupts generated by this transmission */
|
|
stat = bus_space_read_1(iot, ioh, com_iir);
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
comcnpollc(dev, on)
|
|
dev_t dev;
|
|
int on;
|
|
{
|
|
|
|
}
|