332 lines
9.0 KiB
C
332 lines
9.0 KiB
C
/* $NetBSD: sa11x0_irqhandler.c,v 1.3 2002/10/05 17:12:10 chs Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to the NetBSD Foundation
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* by IWAMOTO Toshihiro.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
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* Simulation Facility, NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include "opt_irqstats.h"
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <uvm/uvm_extern.h>
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#include <arm/sa11x0/sa11x0_reg.h>
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#include <arm/sa11x0/sa11x0_var.h>
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#include <machine/intr.h>
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#include <machine/cpu.h>
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irqhandler_t *irqhandlers[NIRQS];
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int current_intr_depth;
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u_int actual_mask;
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#ifdef hpcarm
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#define IPL_LEVELS (NIPL+1)
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u_int imask[NIPL];
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#else
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u_int spl_mask;
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u_int irqmasks[IPL_LEVELS];
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#endif
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u_int irqblock[NIRQS];
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extern void set_spl_masks(void);
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static int fakeintr(void *);
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#ifdef DEBUG
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static int dumpirqhandlers(void);
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#endif
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void intr_calculatemasks(void);
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const struct evcnt *sa11x0_intr_evcnt(sa11x0_chipset_tag_t, int);
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void stray_irqhandler(void *);
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/*
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* Recalculate the interrupt masks from scratch.
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* We could code special registry and deregistry versions of this function that
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* would be faster, but the code would be nastier, and we don't expect this to
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* happen very much anyway.
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*/
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void
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intr_calculatemasks(void)
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{
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int irq, level;
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struct irqhandler *q;
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int intrlevel[ICU_LEN];
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/* First, figure out which levels each IRQ uses. */
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for (irq = 0; irq < ICU_LEN; irq++) {
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int levels = 0;
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for (q = irqhandlers[irq]; q; q = q->ih_next)
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levels |= 1 << q->ih_level;
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intrlevel[irq] = levels;
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}
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/* Then figure out which IRQs use each level. */
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#ifdef hpcarm
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for (level = 0; level < NIPL; level++) {
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#else
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for (level = 0; level <= IPL_LEVELS; level++) {
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#endif
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int irqs = 0;
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for (irq = 0; irq < ICU_LEN; irq++)
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if (intrlevel[irq] & (1 << level))
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irqs |= 1 << irq;
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#ifdef hpcarm
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imask[level] = irqs;
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#else
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irqmasks[level] = irqs;
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#endif
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}
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/*
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* Enforce a hierarchy that gives slow devices a better chance at not
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* dropping data.
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*/
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#ifdef hpcarm
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for (level = NIPL - 1; level > 0; level--)
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imask[level - 1] |= imask[level];
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#else
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for (level = IPL_LEVELS; level > 0; level--)
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irqmasks[level - 1] |= irqmasks[level];
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#endif
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/*
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* Calculate irqblock[], which emulates hardware interrupt levels.
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*/
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for (irq = 0; irq < ICU_LEN; irq++) {
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int irqs = 1 << irq;
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for (q = irqhandlers[irq]; q; q = q->ih_next)
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#ifdef hpcarm
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irqs |= ~imask[q->ih_level];
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#else
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irqs |= ~irqmasks[q->ih_level];
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#endif
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irqblock[irq] = irqs;
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}
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}
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const struct evcnt *
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sa11x0_intr_evcnt(sa11x0_chipset_tag_t ic, int irq)
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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void *
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sa11x0_intr_establish(sa11x0_chipset_tag_t ic, int irq, int type, int level,
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int (*ih_fun)(void *), void *ih_arg)
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{
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int saved_cpsr;
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struct irqhandler **p, *q, *ih;
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static struct irqhandler fakehand = {fakeintr};
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/* no point in sleeping unless someone can free memory. */
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ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
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if (ih == NULL)
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panic("sa11x0_intr_establish: can't malloc handler info");
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if (irq < 0 || irq >= ICU_LEN || type == IST_NONE)
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panic("intr_establish: bogus irq or type");
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/* All interrupts are level intrs. */
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/*
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* Figure out where to put the handler.
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* This is O(N^2), but we want to preserve the order, and N is
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* generally small.
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*/
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for (p = &irqhandlers[irq]; (q = *p) != NULL; p = &q->ih_next)
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;
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/*
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* Actually install a fake handler momentarily, since we might be doing
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* this with interrupts enabled and don't want the real routine called
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* until masking is set up.
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*/
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fakehand.ih_level = level;
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*p = &fakehand;
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intr_calculatemasks();
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/*
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* Poke the real handler in now.
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*/
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ih->ih_func = ih_fun;
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ih->ih_arg = ih_arg;
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#ifdef hpcarm
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ih->ih_count = 0;
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#else
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ih->ih_num = 0;
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#endif
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ih->ih_next = NULL;
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ih->ih_level = level;
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#ifdef hpcarm
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ih->ih_irq = irq;
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#endif
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ih->ih_name = NULL; /* XXX */
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*p = ih;
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saved_cpsr = SetCPSR(I32_bit, I32_bit);
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set_spl_masks();
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irq_setmasks();
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SetCPSR(I32_bit, saved_cpsr & I32_bit);
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#ifdef DEBUG
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dumpirqhandlers();
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#endif
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return (ih);
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}
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#ifdef hpcarm
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/*
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* Deregister an interrupt handler.
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*/
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void
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sa11x0_intr_disestablish(sa11x0_chipset_tag_t ic, void *arg)
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{
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struct irqhandler *ih = arg;
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int irq = ih->ih_irq;
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int saved_cpsr;
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struct irqhandler **p, *q;
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#if DIAGNOSTIC
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if (irq < 0 || irq >= ICU_LEN)
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panic("intr_disestablish: bogus irq");
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#endif
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/*
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* Remove the handler from the chain.
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* This is O(n^2), too.
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*/
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for (p = &irqhandlers[irq]; (q = *p) != NULL && q != ih;
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p = &q->ih_next)
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;
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if (q)
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*p = q->ih_next;
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else
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panic("intr_disestablish: handler not registered");
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free(ih, M_DEVBUF);
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intr_calculatemasks();
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saved_cpsr = SetCPSR(I32_bit, I32_bit);
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set_spl_masks();
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irq_setmasks();
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SetCPSR(I32_bit, saved_cpsr & I32_bit);
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}
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#endif
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void
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stray_irqhandler(void *p)
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{
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printf("stray interrupt\n");
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}
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int
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fakeintr(void *p)
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{
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return 0;
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}
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#ifdef DEBUG
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int
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dumpirqhandlers()
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{
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int irq;
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struct irqhandler *p;
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for (irq = 0; irq < ICU_LEN; irq++) {
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printf("irq %d:", irq);
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p = irqhandlers[irq];
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for (; p; p = p->ih_next)
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printf("ih_func: 0x%lx, ", (unsigned long)p->ih_func);
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printf("\n");
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}
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return 0;
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}
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#endif
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/* End of irqhandler.c */
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