285 lines
8.1 KiB
C
285 lines
8.1 KiB
C
/* $NetBSD: siop_pci.c,v 1.6 2000/05/09 17:05:52 bouyer Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/* SYM53c8xx PCI-SCSI I/O Processors driver: PCI front-end */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/kernel.h>
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#include <machine/endian.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsipiconf.h>
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#include <dev/ic/siopvar.h>
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/* structure describing each chip */
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struct siop_product_desc {
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u_int32_t product;
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int revision;
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const char *name;
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int features; /* features are defined in siopvar.h */
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u_int8_t maxburst;
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u_int8_t maxoff; /* maximum supported offset */
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u_int8_t clock_div; /* clock divider to use for async. logic */
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u_int8_t clock_period; /* clock period (ns * 10) */
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};
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/* List (array, really :) of chips we know how to handle */
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const struct siop_product_desc siop_products[] = {
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{ PCI_PRODUCT_SYMBIOS_810,
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0x00,
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"Symbios Logic 53c810 (fast scsi)",
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SF_PCI_RL,
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4, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_810,
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0x10,
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"Symbios Logic 53c810a (fast scsi)",
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SF_PCI_RL | SF_PCI_BOF | SF_CHIP_PF,
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4, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_815,
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0x00,
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"Symbios Logic 53c815 (fast scsi)",
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SF_PCI_RL | SF_PCI_BOF,
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4, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_820,
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0x00,
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"Symbios Logic 53c820 (fast wide scsi)",
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SF_PCI_RL | SF_BUS_WIDE,
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4, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_825,
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0x00,
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"Symbios Logic 53c825 (fast wide scsi)",
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SF_PCI_RL | SF_PCI_BOF | SF_BUS_WIDE,
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4, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_825,
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0x10,
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"Symbios Logic 53c825a (fast wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM |
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SF_BUS_WIDE,
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7, 8, 3, 250
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},
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{ PCI_PRODUCT_SYMBIOS_860,
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0x00,
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"Symbios Logic 53c860 (ultra scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_PF |
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SF_BUS_ULTRA,
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4, 8, 5, 125
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},
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{ PCI_PRODUCT_SYMBIOS_875,
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0x00,
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"Symbios Logic 53c875 (ultra-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM |
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SF_BUS_ULTRA | SF_BUS_WIDE,
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7, 16, 5, 125
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},
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{ PCI_PRODUCT_SYMBIOS_875,
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0x02,
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"Symbios Logic 53c875 (ultra-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
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SF_BUS_ULTRA | SF_BUS_WIDE,
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7, 16, 5, 125
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},
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{ PCI_PRODUCT_SYMBIOS_875J,
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0x00,
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"Symbios Logic 53c875j (ultra-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
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SF_BUS_ULTRA | SF_BUS_WIDE,
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7, 16, 5, 125
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},
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{ PCI_PRODUCT_SYMBIOS_885,
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0x00,
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"Symbios Logic 53c885 (ultra-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
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SF_BUS_ULTRA | SF_BUS_WIDE,
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7, 16, 5, 125
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},
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{ PCI_PRODUCT_SYMBIOS_895,
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0x00,
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"Symbios Logic 53c895 (ultra2-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
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SF_BUS_ULTRA2 | SF_BUS_WIDE,
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7, 31, 7, 62
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},
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{ PCI_PRODUCT_SYMBIOS_896,
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0x00,
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"Symbios Logic 53c896 (ultra2-wide scsi)",
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SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
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SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
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SF_BUS_ULTRA2 | SF_BUS_WIDE,
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7, 31, 7, 62
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},
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{ 0,
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0x00,
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NULL,
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0x00,
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0, 0, 0, 0
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},
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};
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const struct siop_product_desc * siop_lookup_product __P((u_int32_t, int));
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const struct siop_product_desc *
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siop_lookup_product(id, rev)
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u_int32_t id;
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int rev;
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{
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const struct siop_product_desc *pp;
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const struct siop_product_desc *rp = NULL;
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if (PCI_VENDOR(id) != PCI_VENDOR_SYMBIOS)
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return NULL;
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for (pp = siop_products; pp->name != NULL; pp++) {
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if (PCI_PRODUCT(id) == pp->product && pp->revision <= rev)
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if (rp == NULL || pp->revision > rp->revision)
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rp = pp;
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}
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return rp;
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}
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/* Driver internal state */
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struct siop_pci_softc {
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struct siop_softc siop;
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pci_chipset_tag_t sc_pc; /* PCI registers info */
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pcitag_t sc_tag;
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void *sc_ih; /* PCI interrupt handle */
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const struct siop_product_desc *sc_pp; /* Adapter description */
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};
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int siop_pci_match __P((struct device *, struct cfdata *, void *));
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void siop_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach siop_pci_ca = {
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sizeof(struct siop_pci_softc), siop_pci_match, siop_pci_attach
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};
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int
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siop_pci_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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const struct siop_product_desc *pp;
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/* look if it's a known product */
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pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
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if (pp)
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return 1;
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return 0;
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}
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void
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siop_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pcitag_t tag = pa->pa_tag;
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struct siop_pci_softc *sc = (struct siop_pci_softc *)self;
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const char *intrstr;
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pci_intr_handle_t intrhandle;
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sc->sc_pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
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if (sc->sc_pp == NULL) {
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printf("sym: broken match/attach!!\n");
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return;
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}
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printf(": %s\n", sc->sc_pp->name);
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sc->sc_pc = pc;
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sc->sc_tag = tag;
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sc->siop.sc_dmat = pa->pa_dmat;
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if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0,
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&sc->siop.sc_rt, &sc->siop.sc_rh, &sc->siop.sc_raddr, NULL) != 0) {
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/* Try to map memory addr */
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if (pci_mapreg_map(pa, 0x14,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&sc->siop.sc_rt, &sc->siop.sc_rh,
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&sc->siop.sc_raddr, NULL) != 0) {
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printf("%s: unable to map device registers\n",
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sc->siop.sc_dev.dv_xname);
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return;
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}
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}
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if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &intrhandle) != 0) {
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printf("%s: couldn't map interrupt\n",
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sc->siop.sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, intrhandle);
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sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
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siop_intr, &sc->siop);
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if (sc->sc_ih != NULL) {
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printf("%s: interrupting at %s\n",
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sc->siop.sc_dev.dv_xname,
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intrstr ? intrstr : "unknown interrupt");
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} else {
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printf("%s: couldn't establish interrupt",
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sc->siop.sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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/* copy interesting infos about the chip */
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sc->siop.features = sc->sc_pp->features;
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sc->siop.maxburst = sc->sc_pp->maxburst;
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sc->siop.maxoff = sc->sc_pp->maxoff;
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sc->siop.clock_div = sc->sc_pp->clock_div;
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sc->siop.clock_period = sc->sc_pp->clock_period;
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/* attach generic code */
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siop_attach(&sc->siop);
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}
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