278 lines
7.5 KiB
C
278 lines
7.5 KiB
C
/* $NetBSD: ecc_plb.c,v 1.4 2002/09/27 20:35:01 thorpej Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "locators.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/properties.h>
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#include <machine/dcr.h>
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#include <machine/cpu.h>
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#include <powerpc/ibm4xx/dev/plbvar.h>
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struct ecc_plb_softc {
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struct device sc_dev;
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u_quad_t sc_ecc_tb;
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u_quad_t sc_ecc_iv; /* Interval */
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u_int32_t sc_ecc_cnt;
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u_int sc_memsize;
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int sc_irq;
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};
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static int ecc_plbmatch(struct device *, struct cfdata *, void *);
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static void ecc_plbattach(struct device *, struct device *, void *);
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static void ecc_plb_deferred(struct device *);
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static int ecc_plb_intr(void *);
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const struct cfattach ecc_plb_ca = {
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sizeof(struct ecc_plb_softc), ecc_plbmatch, ecc_plbattach
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};
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static int ecc_plb_found;
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static int
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ecc_plbmatch(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct plb_attach_args *paa = aux;
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if (strcmp(paa->plb_name, cf->cf_name) != 0)
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return (0);
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if (cf->cf_loc[PLBCF_IRQ] == PLBCF_IRQ_DEFAULT)
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panic("ecc_plbmatch: wildcard IRQ not allowed");
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paa->plb_irq = cf->cf_loc[PLBCF_IRQ];
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return (!ecc_plb_found);
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}
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static void
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ecc_plbattach(struct device *parent, struct device *self, void *aux)
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{
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struct ecc_plb_softc *sc = (struct ecc_plb_softc *)self;
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struct plb_attach_args *paa = aux;
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unsigned int processor_freq;
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unsigned int memsiz;
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ecc_plb_found++;
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if (board_info_get("processor-frequency",
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&processor_freq, sizeof(processor_freq)) == -1)
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panic("no processor-frequency");
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if (board_info_get("mem-size", &memsiz, sizeof(memsiz)) == -1)
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panic("no mem-size");
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printf(": ECC controller\n");
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sc->sc_ecc_tb = 0;
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sc->sc_ecc_cnt = 0;
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sc->sc_ecc_iv = processor_freq; /* Set interval */
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sc->sc_memsize = memsiz;
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sc->sc_irq = paa->plb_irq;
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/*
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* Defer hooking the interrupt until all PLB devices have attached
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* since the interrupt controller may well be one of those devices...
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*/
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config_defer(self, ecc_plb_deferred);
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}
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static void
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ecc_plb_deferred(struct device *self)
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{
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struct ecc_plb_softc *sc = (struct ecc_plb_softc *)self;
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intr_establish(sc->sc_irq, IST_LEVEL, IPL_SERIAL, ecc_plb_intr, NULL);
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}
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/*
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* ECC fault handler.
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*/
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static int
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ecc_plb_intr(void *arg)
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{
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struct ecc_plb_softc *sc = arg;
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u_int32_t esr, ear;
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int ce, ue;
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u_quad_t tb;
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u_long tmp, msr, dat;
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/* This code needs to be improved to handle double-bit errors */
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/* in some intelligent fashion. */
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_ECCESR);
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esr = mfdcr(DCR_SDRAM0_CFGDATA);
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_BEAR);
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ear = mfdcr(DCR_SDRAM0_CFGDATA);
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/* Always clear the error to stop the intr ASAP. */
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_ECCESR);
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mtdcr(DCR_SDRAM0_CFGDATA, 0xffffffff);
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if (esr == 0x00) {
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/* No current error. Could happen due to intr. nesting */
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return(1);
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}
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/*
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* Only report errors every once per second max. Do this using the TB,
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* because the system time (via microtime) may be adjusted when the
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* date is set and can't reliably be used to measure intervals.
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*/
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asm ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw %0,%1; bne 1b"
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: "=r"(tb), "=r"(tmp));
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sc->sc_ecc_cnt++;
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if ((tb - sc->sc_ecc_tb) < sc->sc_ecc_iv)
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return(1);
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ce = (esr & SDRAM0_ECCESR_CE) != 0x00;
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ue = (esr & SDRAM0_ECCESR_UE) != 0x00;
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printf("ECC: Error CNT=%d ESR=%x EAR=%x %s BKNE=%d%d%d%d "
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"BLCE=%d%d%d%d CBE=%d%d.\n",
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sc->sc_ecc_cnt, esr, ear,
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(ue) ? "Uncorrectable" : "Correctable",
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((esr & SDRAM0_ECCESR_BKEN(0)) != 0x00),
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((esr & SDRAM0_ECCESR_BKEN(1)) != 0x00),
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((esr & SDRAM0_ECCESR_BKEN(2)) != 0x00),
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((esr & SDRAM0_ECCESR_BKEN(3)) != 0x00),
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((esr & SDRAM0_ECCESR_BLCEN(0)) != 0x00),
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((esr & SDRAM0_ECCESR_BLCEN(1)) != 0x00),
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((esr & SDRAM0_ECCESR_BLCEN(2)) != 0x00),
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((esr & SDRAM0_ECCESR_BLCEN(3)) != 0x00),
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((esr & SDRAM0_ECCESR_CBEN(0)) != 0x00),
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((esr & SDRAM0_ECCESR_CBEN(1)) != 0x00));
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/* Should check for uncorrectable errors and panic... */
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if (sc->sc_ecc_cnt > 1000) {
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printf("ECC: Too many errors, recycling entire "
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"SDRAM (size = %d).\n", sc->sc_memsize);
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/*
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* Can this code be changed to run without disabling data MMU
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* and disabling intrs?
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* Does kernel always map all of physical RAM VA=PA? If so,
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* just loop over lowmem.
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*/
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asm volatile(
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"mfmsr %0;"
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"li %1, 0x00;"
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"ori %1, %1, 0x8010;"
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"andc %1, %0, %1;"
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"mtmsr %1;"
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"sync;isync;"
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"li %1, 0x00;"
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"1:"
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"dcbt 0, %1;"
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"sync;isync;"
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"lwz %2, 0(%1);"
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"stw %2, 0(%1);"
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"sync;isync;"
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"dcbf 0, %1;"
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"sync;isync;"
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"addi %1, %1, 0x20;"
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"addic. %3, %3, -0x20;"
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"bge 1b;"
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"mtmsr %0;"
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"sync;isync;"
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: "=&r" (msr), "=&r" (tmp), "=&r" (dat)
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: "r" (sc->sc_memsize) : "0" );
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_ECCESR);
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esr = mfdcr(DCR_SDRAM0_CFGDATA);
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_ECCESR);
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mtdcr(DCR_SDRAM0_CFGDATA, 0xffffffff);
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/*
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* Correctable errors here are OK, mem should be clean now.
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*
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* Should check for uncorrectable errors and panic...
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*/
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printf("ECC: Recycling complete, ESR=%x. "
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"Checking for persistent errors.\n", esr);
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asm volatile(
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"mfmsr %0;"
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"li %1, 0x00;"
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"ori %1, %1, 0x8010;"
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"andc %1, %0, %1;"
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"mtmsr %1;"
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"sync;isync;"
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"li %1, 0x00;"
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"1:"
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"dcbt 0, %1;"
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"sync;isync;"
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"lwz %2, 0(%1);"
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"stw %2, 0(%1);"
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"sync;isync;"
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"dcbf 0, %1;"
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"sync;isync;"
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"addi %1, %1, 0x20;"
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"addic. %3, %3, -0x20;"
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"bge 1b;"
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"mtmsr %0;"
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"sync;isync;"
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: "=&r" (msr), "=&r" (tmp), "=&r" (dat)
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: "r" (sc->sc_memsize) : "0" );
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mtdcr(DCR_SDRAM0_CFGADDR, DCR_SDRAM0_ECCESR);
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esr = mfdcr(DCR_SDRAM0_CFGDATA);
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/*
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* If esr is non zero here, we're screwed.
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* Should check this and panic.
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*/
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printf("ECC: Persistent error check complete, "
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"final ESR=%x.\n", esr);
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}
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sc->sc_ecc_tb = tb;
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sc->sc_ecc_cnt = 0;
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return(1);
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}
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