754 lines
17 KiB
C
754 lines
17 KiB
C
/* $OpenBSD: sisfb.c,v 1.2 2010/12/26 15:40:59 miod Exp $ */
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/*
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* Copyright (c) 2010 Miodrag Vallat.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Minimalistic driver for the SIS315 Pro frame buffer found on the
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* Lemote Fuloong 2F systems.
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* Does not support accelaration, mode change, secondary output, or
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* anything fancy.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sisfb.c,v 1.2 2012/01/30 19:41:23 drochner Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/bus.h>
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#include <uvm/uvm_extern.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciio.h>
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#include <dev/videomode/videomode.h>
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/wscons/wsconsio.h>
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#include <dev/wsfont/wsfont.h>
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#include <dev/rasops/rasops.h>
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#include <dev/wscons/wsdisplay_vconsvar.h>
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#include <dev/pci/wsdisplay_pci.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/pci/sisfb.h>
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struct sisfb_softc;
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/* minimal frame buffer information, suitable for early console */
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struct sisfb {
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struct sisfb_softc *sc;
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uint8_t cmap[256 * 3];
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bus_space_tag_t fbt;
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bus_space_handle_t fbh;
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bus_space_tag_t mmiot;
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bus_space_handle_t mmioh;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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struct vcons_screen vcs;
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struct wsscreen_descr wsd;
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int fb_depth;
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int fb_width;
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int fb_height;
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int fb_stride;
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void *fb_addr;
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};
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struct sisfb_softc {
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device_t sc_dev;
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struct sisfb *sc_fb;
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struct sisfb sc_fb_store;
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struct vcons_data vd;
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struct wsscreen_list sc_wsl;
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const struct wsscreen_descr *sc_scrlist[1];
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int sc_nscr;
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int sc_mode;
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};
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int sisfb_match(device_t, cfdata_t, void *);
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void sisfb_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(sisfb, sizeof(struct sisfb_softc),
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sisfb_match, sisfb_attach, NULL, NULL);
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int sisfb_alloc_screen(void *, const struct wsscreen_descr *, void **, int *,
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int *, long *);
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void sisfb_free_screen(void *, void *);
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int sisfb_ioctl(void *, void *, u_long, void *, int, struct lwp *);
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int sisfb_show_screen(void *, void *, int, void (*)(void *, int, int),
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void *);
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paddr_t sisfb_mmap(void *, void *, off_t, int);
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void sisfb_init_screen(void *, struct vcons_screen *, int, long *);
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struct wsdisplay_accessops sisfb_accessops = {
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sisfb_ioctl,
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sisfb_mmap,
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sisfb_alloc_screen,
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sisfb_free_screen,
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sisfb_show_screen,
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NULL, /* load_font */
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NULL, /* poolc */
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NULL /* scroll */
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};
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int sisfb_getcmap(uint8_t *, struct wsdisplay_cmap *);
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void sisfb_loadcmap(struct sisfb *, int, int);
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int sisfb_putcmap(uint8_t *, struct wsdisplay_cmap *);
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int sisfb_setup(struct sisfb *);
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static struct sisfb sisfbcn;
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/*
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* Control Register access
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*
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* These are 8 bit registers; the choice of larger width types is intentional.
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*/
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#define SIS_VGA_PORT_OFFSET 0x380
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#define SEQ_ADDR (0x3c4 - SIS_VGA_PORT_OFFSET)
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#define SEQ_DATA (0x3c5 - SIS_VGA_PORT_OFFSET)
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#define DAC_ADDR (0x3c8 - SIS_VGA_PORT_OFFSET)
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#define DAC_DATA (0x3c9 - SIS_VGA_PORT_OFFSET)
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#undef CRTC_ADDR
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#define CRTC_ADDR (0x3d4 - SIS_VGA_PORT_OFFSET)
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#define CRTC_DATA (0x3d5 - SIS_VGA_PORT_OFFSET)
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#define CRTC_HDISPLE 0x01 /* horizontal display end */
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#define CRTC_OVERFLL 0x07 /* overflow low */
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#define CRTC_STARTADRH 0x0C /* linear start address mid */
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#define CRTC_STARTADRL 0x0D /* linear start address low */
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#define CRTC_VDE 0x12 /* vertical display end */
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static inline uint sisfb_crtc_read(struct sisfb *, uint);
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static inline void sisfb_crtc_write(struct sisfb *, uint, uint);
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static inline uint sisfb_seq_read(struct sisfb *, uint);
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static inline void sisfb_seq_write(struct sisfb *, uint, uint);
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static inline uint
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sisfb_crtc_read(struct sisfb *fb, uint idx)
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{
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uint val;
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bus_space_write_1(fb->iot, fb->ioh, CRTC_ADDR, idx);
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val = bus_space_read_1(fb->iot, fb->ioh, CRTC_DATA);
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#ifdef SIS_DEBUG
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printf("CRTC %04x -> %02x\n", idx, val);
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#endif
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return val;
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}
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static inline void
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sisfb_crtc_write(struct sisfb *fb, uint idx, uint val)
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{
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#ifdef SIS_DEBUG
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printf("CRTC %04x <- %02x\n", idx, val);
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#endif
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bus_space_write_1(fb->iot, fb->ioh, CRTC_ADDR, idx);
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bus_space_write_1(fb->iot, fb->ioh, CRTC_DATA, val);
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}
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static inline uint
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sisfb_seq_read(struct sisfb *fb, uint idx)
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{
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uint val;
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bus_space_write_1(fb->iot, fb->ioh, SEQ_ADDR, idx);
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val = bus_space_read_1(fb->iot, fb->ioh, SEQ_DATA);
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#ifdef SIS_DEBUG
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printf("SEQ %04x -> %02x\n", idx, val);
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#endif
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return val;
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}
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static inline void
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sisfb_seq_write(struct sisfb *fb, uint idx, uint val)
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{
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#ifdef SIS_DEBUG
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printf("SEQ %04x <- %02x\n", idx, val);
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#endif
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bus_space_write_1(fb->iot, fb->ioh, SEQ_ADDR, idx);
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bus_space_write_1(fb->iot, fb->ioh, SEQ_DATA, val);
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}
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int
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sisfb_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY)
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return 0;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_SIS)
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return 0;
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if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SIS_315PRO_VGA)
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return 100;
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return (0);
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}
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void
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sisfb_attach(device_t parent, device_t self, void *aux)
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{
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struct sisfb_softc *sc = device_private(self);
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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struct rasops_info *ri;
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struct wsemuldisplaydev_attach_args waa;
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bus_size_t fbsize, mmiosize, iosize;
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struct sisfb *fb;
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int console;
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unsigned long defattr;
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sc->sc_dev = self;
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console = sisfbcn.vcs.scr_ri.ri_hw != NULL;
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if (console)
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fb = &sisfbcn;
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else {
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fb = &sc->sc_fb_store;
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}
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sc->sc_fb = fb;
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fb->sc = sc;
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pci_aprint_devinfo(pa, NULL);
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if (!console) {
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fb->fbt = pa->pa_memt;
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fb->mmiot = pa->pa_memt;
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fb->iot = pa->pa_iot;
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if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
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BUS_SPACE_MAP_LINEAR, &fb->fbt, &fb->fbh, NULL, &fbsize) != 0) {
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aprint_error_dev(self, ": can't map frame buffer\n");
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return;
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}
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if (pci_mapreg_map(pa, PCI_MAPREG_START + 4, PCI_MAPREG_TYPE_MEM,
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0, &fb->mmiot, &fb->mmioh, NULL, &mmiosize) != 0) {
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aprint_error_dev(self, ": can't map mmio area\n");
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goto fail1;
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}
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if (pci_mapreg_map(pa, PCI_MAPREG_START + 8, PCI_MAPREG_TYPE_IO,
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0, &fb->iot, &fb->ioh, NULL, &iosize) != 0) {
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aprint_error_dev(self, ": can't map registers\n");
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goto fail2;
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}
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if (sisfb_setup(sc->sc_fb) != 0) {
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aprint_error_dev(self, ": can't setup frame buffer\n");
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goto fail3;
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}
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}
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aprint_normal_dev(self, ": %dx%dx%d frame buffer\n",
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fb->vcs.scr_ri.ri_width, fb->vcs.scr_ri.ri_height, fb->vcs.scr_ri.ri_depth);
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fb->wsd = (struct wsscreen_descr){
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"default",
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0, 0,
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NULL,
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8, 16,
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WSSCREEN_WSCOLORS | WSSCREEN_HILIT,
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NULL
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};
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sc->sc_scrlist[0] = &fb->wsd;
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sc->sc_wsl = (struct wsscreen_list){1, sc->sc_scrlist};
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sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
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vcons_init(&sc->vd, sc, &fb->wsd, &sisfb_accessops);
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sc->vd.init_screen = sisfb_init_screen;
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ri = &fb->vcs.scr_ri;
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if (console) {
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vcons_init_screen(&sc->vd, &fb->vcs, 1, &defattr);
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fb->vcs.scr_flags |= VCONS_SCREEN_IS_STATIC;
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fb->wsd.textops = &ri->ri_ops;
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fb->wsd.capabilities = ri->ri_caps;
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fb->wsd.nrows = ri->ri_rows;
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fb->wsd.ncols = ri->ri_cols;
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wsdisplay_cnattach(&fb->wsd, ri, 0, 0, defattr);
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vcons_replay_msgbuf(&fb->vcs);
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} else {
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/*
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* since we're not the console we can postpone the rest
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* until someone actually allocates a screen for us
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*/
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(*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr);
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}
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waa.console = console;
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waa.scrdata = &sc->sc_wsl;
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waa.accessops = &sisfb_accessops;
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waa.accesscookie = &sc->vd;
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config_found(sc->sc_dev, &waa, wsemuldisplaydevprint);
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return;
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fail3:
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bus_space_unmap(fb->iot, fb->ioh, iosize);
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fail2:
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bus_space_unmap(fb->mmiot, fb->mmioh, mmiosize);
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fail1:
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bus_space_unmap(fb->fbt, fb->fbh, fbsize);
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}
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/*
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* wsdisplay accesops
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*/
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int
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sisfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep,
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int *curxp, int *curyp, long *attrp)
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{
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struct sisfb_softc *sc = (struct sisfb_softc *)v;
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struct rasops_info *ri = &sc->sc_fb->vcs.scr_ri;
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if (sc->sc_nscr > 0)
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return ENOMEM;
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*cookiep = ri;
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*curxp = *curyp = 0;
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ri->ri_ops.allocattr(ri, 0, 0, 0, attrp);
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sc->sc_nscr++;
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return 0;
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}
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void
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sisfb_free_screen(void *v, void *cookie)
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{
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struct sisfb_softc *sc = (struct sisfb_softc *)v;
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sc->sc_nscr--;
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}
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int
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sisfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flags,
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struct lwp *l)
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{
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struct vcons_data *vd = v;
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struct sisfb_softc *sc = vd->cookie;
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struct sisfb *fb = sc->sc_fb;
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struct rasops_info *ri = &fb->vcs.scr_ri;
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struct wsdisplay_cmap *cm;
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struct wsdisplay_fbinfo *wdf;
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int rc;
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switch (cmd) {
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case WSDISPLAYIO_GTYPE:
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*(uint *)data = WSDISPLAY_TYPE_PCIMISC;
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return 0;
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case WSDISPLAYIO_GINFO:
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wdf = (struct wsdisplay_fbinfo *)data;
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wdf->width = ri->ri_width;
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wdf->height = ri->ri_height;
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wdf->depth = ri->ri_depth;
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wdf->cmsize = 256;
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return 0;
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case WSDISPLAYIO_LINEBYTES:
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*(uint *)data = ri->ri_stride;
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break;
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case WSDISPLAYIO_GETCMAP:
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cm = (struct wsdisplay_cmap *)data;
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rc = sisfb_getcmap(fb->cmap, cm);
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return rc;
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case WSDISPLAYIO_PUTCMAP:
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cm = (struct wsdisplay_cmap *)data;
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rc = sisfb_putcmap(fb->cmap, cm);
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if (rc != 0)
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return rc;
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if (ri->ri_depth == 8)
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sisfb_loadcmap(fb, cm->index, cm->count);
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return 0;
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}
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return EPASSTHROUGH;
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}
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int
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sisfb_show_screen(void *v, void *cookie, int waitok,
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void (*cb)(void *, int, int), void *cbarg)
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{
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return 0;
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}
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paddr_t
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sisfb_mmap(void *v, void *vs, off_t offset, int prot)
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{
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struct vcons_data *vd = v;
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struct sisfb_softc *sc = vd->cookie;
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struct rasops_info *ri = &sc->sc_fb->vcs.scr_ri;
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if ((offset & PAGE_MASK) != 0)
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return -1;
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if (offset < 0 || offset >= ri->ri_stride * ri->ri_height)
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return -1;
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/*
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* Don't allow mmap if the frame buffer area is not page aligned.
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* XXX we should reprogram it to a page aligned boundary at attach
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* XXX time if this isn't the case.
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*/
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if (((paddr_t)ri->ri_bits & PAGE_MASK) != 0)
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return -1;
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/* return XKPHYS_TO_PHYS((paddr_t)ri->ri_bits) + offset; */
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/* XXX */ return -1;
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}
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void
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sisfb_init_screen(void *cookie, struct vcons_screen *scr,
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int existing, long *defattr)
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{
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struct sisfb_softc *sc = cookie;
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struct sisfb *fb = sc->sc_fb;
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struct rasops_info *ri = &scr->scr_ri;
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ri->ri_depth = fb->fb_depth;
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ri->ri_width = fb->fb_width;
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ri->ri_height = fb->fb_height;
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ri->ri_stride = fb->fb_stride;
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ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
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ri->ri_bits = fb->fb_addr;
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if (existing) {
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ri->ri_flg |= RI_CLEAR;
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}
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rasops_init(ri, fb->fb_height / 8, fb->fb_width / 8);
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ri->ri_caps = WSSCREEN_WSCOLORS;
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rasops_reconfig(ri, fb->fb_height / ri->ri_font->fontheight,
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fb->fb_width / ri->ri_font->fontwidth);
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ri->ri_hw = scr;
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}
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/*
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* Frame buffer initialization.
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*/
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int
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sisfb_setup(struct sisfb *fb)
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{
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struct rasops_info *ri = &fb->vcs.scr_ri;
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uint width, height, bpp;
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bus_size_t fbaddr;
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uint tmp;
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/*
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* Unlock access to extended registers.
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*/
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sisfb_seq_write(fb, 0x05, 0x86);
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/*
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* Try and figure out display settings.
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*/
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height = sisfb_crtc_read(fb, CRTC_VDE);
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tmp = sisfb_crtc_read(fb, CRTC_OVERFLL);
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if (ISSET(tmp, 1 << 1))
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height |= 1 << 8;
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if (ISSET(tmp, 1 << 6))
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height |= 1 << 9;
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tmp = sisfb_seq_read(fb, 0x0a);
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if (ISSET(tmp, 1 << 1))
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height |= 1 << 10;
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height++;
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width = sisfb_crtc_read(fb, CRTC_HDISPLE);
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tmp = sisfb_seq_read(fb, 0x0b);
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if (ISSET(tmp, 1 << 2))
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width |= 1 << 8;
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if (ISSET(tmp, 1 << 3))
|
|
width |= 1 << 9;
|
|
width++;
|
|
width <<= 3;
|
|
|
|
#ifdef SIS_DEBUG
|
|
printf("height %d width %d\n", height, width);
|
|
#endif
|
|
|
|
fbaddr = sisfb_crtc_read(fb, CRTC_STARTADRL) |
|
|
(sisfb_crtc_read(fb, CRTC_STARTADRH) << 8) |
|
|
(sisfb_seq_read(fb, 0x0d) << 16) |
|
|
((sisfb_seq_read(fb, 0x37) & 0x03) << 24);
|
|
fbaddr <<= 2;
|
|
#ifdef SIS_DEBUG
|
|
printf("FBADDR %lx\n", fbaddr);
|
|
#endif
|
|
|
|
tmp = sisfb_seq_read(fb, 0x06);
|
|
switch (tmp & 0x1c) {
|
|
case 0x00:
|
|
bpp = 8;
|
|
break;
|
|
case 0x04:
|
|
bpp = 15;
|
|
break;
|
|
case 0x08:
|
|
bpp = 16;
|
|
break;
|
|
case 0x10:
|
|
bpp = 32;
|
|
break;
|
|
default:
|
|
aprint_error("unknown bpp for 0x%x\n", tmp);
|
|
return EINVAL;
|
|
}
|
|
#ifdef SIS_DEBUG
|
|
printf("BPP %d\n", bpp);
|
|
#endif
|
|
|
|
fb->fb_width = ri->ri_width = width;
|
|
fb->fb_height = ri->ri_height = height;
|
|
fb->fb_depth = ri->ri_depth = bpp;
|
|
fb->fb_stride = ri->ri_stride = (ri->ri_width * ri->ri_depth) / 8;
|
|
ri->ri_flg = /* RI_CENTER | RI_CLEAR | RI_FULLCLEAR */ RI_CENTER | RI_NO_AUTO;
|
|
fb->fb_addr = ri->ri_bits =
|
|
(void *)((char *)bus_space_vaddr(fb->fbt, fb->fbh) + fbaddr);
|
|
ri->ri_hw = fb;
|
|
|
|
#ifdef SIS_DEBUG
|
|
printf("ri_bits %p\n", ri->ri_bits);
|
|
#endif
|
|
|
|
#ifdef __MIPSEL__
|
|
/* swap B and R */
|
|
switch (bpp) {
|
|
case 15:
|
|
ri->ri_rnum = 5;
|
|
ri->ri_rpos = 10;
|
|
ri->ri_gnum = 5;
|
|
ri->ri_gpos = 5;
|
|
ri->ri_bnum = 5;
|
|
ri->ri_bpos = 0;
|
|
break;
|
|
case 16:
|
|
ri->ri_rnum = 5;
|
|
ri->ri_rpos = 11;
|
|
ri->ri_gnum = 6;
|
|
ri->ri_gpos = 5;
|
|
ri->ri_bnum = 5;
|
|
ri->ri_bpos = 0;
|
|
break;
|
|
}
|
|
#endif
|
|
|
|
bcopy(rasops_cmap, fb->cmap, sizeof(fb->cmap));
|
|
if (bpp == 8) {
|
|
sisfb_loadcmap(fb, 0, 256);
|
|
}
|
|
|
|
rasops_init(ri, 30, 80);
|
|
rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight,
|
|
ri->ri_width / ri->ri_font->fontwidth);
|
|
|
|
fb->wsd.name = "std";
|
|
fb->wsd.ncols = ri->ri_cols;
|
|
fb->wsd.nrows = ri->ri_rows;
|
|
fb->wsd.textops = &ri->ri_ops;
|
|
fb->wsd.fontwidth = ri->ri_font->fontwidth;
|
|
fb->wsd.fontheight = ri->ri_font->fontheight;
|
|
fb->wsd.capabilities = ri->ri_caps;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Colormap handling routines.
|
|
*/
|
|
|
|
void
|
|
sisfb_loadcmap(struct sisfb *fb, int baseidx, int count)
|
|
{
|
|
uint8_t *cmap = fb->cmap + baseidx * 3;
|
|
|
|
bus_space_write_1(fb->iot, fb->ioh, DAC_ADDR, baseidx);
|
|
while (count-- != 0) {
|
|
bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2);
|
|
bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2);
|
|
bus_space_write_1(fb->iot, fb->ioh, DAC_DATA, *cmap++ >> 2);
|
|
}
|
|
}
|
|
|
|
int
|
|
sisfb_getcmap(uint8_t *cmap, struct wsdisplay_cmap *cm)
|
|
{
|
|
uint index = cm->index, count = cm->count, i;
|
|
uint8_t ramp[256], *dst, *src;
|
|
int rc;
|
|
|
|
if (index >= 256 || count > 256 - index)
|
|
return EINVAL;
|
|
|
|
index *= 3;
|
|
|
|
src = cmap + index;
|
|
dst = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst++ = *src, src += 3;
|
|
rc = copyout(ramp, cm->red, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
src = cmap + index + 1;
|
|
dst = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst++ = *src, src += 3;
|
|
rc = copyout(ramp, cm->green, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
src = cmap + index + 2;
|
|
dst = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst++ = *src, src += 3;
|
|
rc = copyout(ramp, cm->blue, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
sisfb_putcmap(uint8_t *cmap, struct wsdisplay_cmap *cm)
|
|
{
|
|
uint index = cm->index, count = cm->count, i;
|
|
uint8_t ramp[256], *dst, *src;
|
|
int rc;
|
|
|
|
if (index >= 256 || count > 256 - index)
|
|
return EINVAL;
|
|
|
|
index *= 3;
|
|
|
|
rc = copyin(cm->red, ramp, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
dst = cmap + index;
|
|
src = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst = *src++, dst += 3;
|
|
|
|
rc = copyin(cm->green, ramp, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
dst = cmap + index + 1;
|
|
src = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst = *src++, dst += 3;
|
|
|
|
rc = copyin(cm->blue, ramp, count);
|
|
if (rc != 0)
|
|
return rc;
|
|
dst = cmap + index + 2;
|
|
src = ramp;
|
|
for (i = 0; i < count; i++)
|
|
*dst = *src++, dst += 3;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Early console code
|
|
*/
|
|
|
|
int
|
|
sisfb_cnattach(bus_space_tag_t memt, bus_space_tag_t iot,
|
|
pci_chipset_tag_t pc, pcitag_t tag, pcireg_t id)
|
|
{
|
|
long defattr;
|
|
struct rasops_info * const ri = &sisfbcn.vcs.scr_ri;
|
|
pcireg_t bar;
|
|
int rc;
|
|
|
|
|
|
/* filter out unrecognized devices */
|
|
switch (id) {
|
|
default:
|
|
return ENODEV;
|
|
case PCI_ID_CODE(PCI_VENDOR_SIS, PCI_PRODUCT_SIS_315PRO_VGA):
|
|
break;
|
|
}
|
|
|
|
bar = pci_conf_read(pc, tag, PCI_MAPREG_START);
|
|
if (PCI_MAPREG_TYPE(bar) != PCI_MAPREG_TYPE_MEM)
|
|
return EINVAL;
|
|
sisfbcn.fbt = memt;
|
|
rc = bus_space_map(memt, PCI_MAPREG_MEM_ADDR(bar), 1 /* XXX */,
|
|
BUS_SPACE_MAP_LINEAR, &sisfbcn.fbh);
|
|
#ifdef SIS_DEBUG
|
|
printf("sisfb_cnattach(memt, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc);
|
|
#endif
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
bar = pci_conf_read(pc, tag, PCI_MAPREG_START + 4);
|
|
if (PCI_MAPREG_TYPE(bar) != PCI_MAPREG_TYPE_MEM)
|
|
return EINVAL;
|
|
sisfbcn.mmiot = memt;
|
|
rc = bus_space_map(memt, PCI_MAPREG_MEM_ADDR(bar), 1 /* XXX */,
|
|
BUS_SPACE_MAP_LINEAR, &sisfbcn.mmioh);
|
|
#ifdef SIS_DEBUG
|
|
printf("sisfb_cnattach(memt2, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc);
|
|
#endif
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
bar = pci_conf_read(pc, tag, PCI_MAPREG_START + 8);
|
|
if (PCI_MAPREG_TYPE(bar) != PCI_MAPREG_TYPE_IO)
|
|
return EINVAL;
|
|
sisfbcn.iot = iot;
|
|
rc = bus_space_map(iot, PCI_MAPREG_MEM_ADDR(bar), 1 /* XXX */,
|
|
0, &sisfbcn.ioh);
|
|
#ifdef SIS_DEBUG
|
|
printf("sisfb_cnattach(iot, 0x%x rc %d\n", PCI_MAPREG_MEM_ADDR(bar), rc);
|
|
#endif
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
rc = sisfb_setup(&sisfbcn);
|
|
#ifdef SIS_DEBUG
|
|
printf("sisfb_setup %d %p\n", rc, sisfbcn.vcs.scr_ri.ri_hw);
|
|
#endif
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
ri->ri_ops.allocattr(ri, 0, ri->ri_rows - 1, 0, &defattr);
|
|
wsdisplay_preattach(&sisfbcn.wsd, ri, 0, 0, defattr);
|
|
|
|
return 0;
|
|
}
|