328 lines
8.7 KiB
C
328 lines
8.7 KiB
C
/* $NetBSD: esp_podule.c,v 1.1 2013/07/11 13:44:50 kiyohara Exp $ */
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/*
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* Copyright (c) 2013 KIYOHARA Takashi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: esp_podule.c,v 1.1 2013/07/11 13:44:50 kiyohara Exp $");
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#include <sys/param.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/ic/ncr53c9xreg.h>
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#include <dev/ic/ncr53c9xvar.h>
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#include <dev/podulebus/podulebus.h>
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#include <dev/podulebus/podules.h>
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struct esp_podule_softc {
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struct ncr53c9x_softc sc_ncr53c9x;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct ncr53c9x_glue sc_esp_glue;
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int sc_active; /* Pseudo-DMA state vars */
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int sc_tc;
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int sc_datain;
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size_t sc_dmasize;
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size_t sc_dmatrans;
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uint8_t **sc_dmaaddr;
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size_t *sc_dmalen;
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};
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static int esp_podule_match(device_t, cfdata_t, void *);
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static void esp_podule_attach(device_t, device_t, void *);
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static int esp_podule_dma_isintr(struct ncr53c9x_softc *);
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static void esp_podule_dma_reset(struct ncr53c9x_softc *);
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static int esp_podule_dma_intr(struct ncr53c9x_softc *);
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static int esp_podule_dma_setup(struct ncr53c9x_softc *, uint8_t **, size_t *,
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int, size_t *);
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static void esp_podule_dma_go(struct ncr53c9x_softc *);
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static void esp_podule_dma_stop(struct ncr53c9x_softc *);
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static int esp_podule_dma_isactive(struct ncr53c9x_softc *);
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static uint8_t castle_read_reg(struct ncr53c9x_softc *, int);
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static void castle_write_reg(struct ncr53c9x_softc *, int, uint8_t);
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CFATTACH_DECL_NEW(esp_podule, sizeof(struct esp_podule_softc),
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esp_podule_match, esp_podule_attach, NULL, NULL);
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static struct ncr53c9x_glue esp_podule_glue = {
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NULL,
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NULL,
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esp_podule_dma_isintr,
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esp_podule_dma_reset,
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esp_podule_dma_intr,
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esp_podule_dma_setup,
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esp_podule_dma_go,
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esp_podule_dma_stop,
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esp_podule_dma_isactive,
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NULL
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};
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#define PODULE_DEVICE(m, p, read, write) \
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{ MANUFACTURER_ ## m, PODULE_ ## m ## _ ## p, read, write }
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static struct {
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int manufacturer;
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int product;
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uint8_t (*read_reg)(struct ncr53c9x_softc *, int);
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void (*write_reg)(struct ncr53c9x_softc *, int, uint8_t);
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} devices[] = {
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PODULE_DEVICE(CASTLE, SCSI16, castle_read_reg, castle_write_reg),
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};
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static int
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esp_podule_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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int i;
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for (i = 0; i < __arraycount(devices); i++)
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if (pa->pa_manufacturer == devices[i].manufacturer &&
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pa->pa_product == devices[i].product)
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return 1;
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return 0;
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}
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static void
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esp_podule_attach(device_t parent, device_t self, void *aux)
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{
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struct esp_podule_softc *esc = device_private(self);
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struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
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struct podulebus_attach_args *pa = aux;
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int i;
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for (i = 0; i < __arraycount(devices); i++)
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if (pa->pa_manufacturer == devices[i].manufacturer &&
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pa->pa_product == devices[i].product)
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break;
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if (i == __arraycount(devices)) {
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aprint_error(": lost manufacturer 0x%04x, product 0x%04x\n",
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pa->pa_manufacturer, pa->pa_product);
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return;
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}
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sc->sc_dev = self;
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esc->sc_esp_glue = esp_podule_glue;
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esc->sc_esp_glue.gl_read_reg = devices[i].read_reg;
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esc->sc_esp_glue.gl_write_reg = devices[i].write_reg;
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sc->sc_glue = &esc->sc_esp_glue;
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esc->sc_iot = pa->pa_slow_t;
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bus_space_map(esc->sc_iot, pa->pa_slow_base, 0x4000, 0, &esc->sc_ioh);
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sc->sc_freq = 2; /* XXXX ??? */
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/* Get current ID */
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sc->sc_id = NCR_READ_REG(sc, NCR_CFG1) & NCRCFG1_BUSID;
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sc->sc_cfg1 = sc->sc_id;
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sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_DREQ | NCRCFG2_FE;
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sc->sc_rev = NCR_VARIANT_NCR53C96; /* XXXX ??? */
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sc->sc_minsync = 1000 / sc->sc_freq;
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sc->sc_maxxfer = 64 * 1024;
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evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
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device_xname(self), "intr");
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podulebus_irq_establish(pa->pa_ih, IPL_BIO, ncr53c9x_intr, sc,
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&sc->sc_intrcnt);
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sc->sc_adapter.adapt_minphys = minphys;
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sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
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ncr53c9x_attach(sc);
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}
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static int
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esp_podule_dma_isintr(struct ncr53c9x_softc *sc)
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{
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return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT;
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}
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static void
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esp_podule_dma_reset(struct ncr53c9x_softc *sc)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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esc->sc_active = 0;
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esc->sc_tc = 0;
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}
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static int
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esp_podule_dma_intr(struct ncr53c9x_softc *sc)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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uint8_t *p;
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u_int espphase, espstat, espintr;
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int cnt;
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if (esc->sc_active == 0) {
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printf("%s: dma_intr--inactive DMA\n",
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device_xname(sc->sc_dev));
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return -1;
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}
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if ((sc->sc_espintr & NCRINTR_BS) == 0) {
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esc->sc_active = 0;
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return 0;
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}
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cnt = *esc->sc_dmalen;
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if (*esc->sc_dmalen == 0) {
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printf("%s: data interrupt, but no count left\n",
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device_xname(sc->sc_dev));
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}
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p = *esc->sc_dmaaddr;
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espphase = sc->sc_phase;
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espstat = (u_int)sc->sc_espstat;
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espintr = (u_int)sc->sc_espintr;
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do {
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if (esc->sc_datain) {
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*p++ = NCR_READ_REG(sc, NCR_FIFO);
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cnt--;
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if (espphase == DATA_IN_PHASE)
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NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS);
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else
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esc->sc_active = 0;
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} else {
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if ((espphase == DATA_OUT_PHASE) ||
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(espphase == MESSAGE_OUT_PHASE)) {
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NCR_WRITE_REG(sc, NCR_FIFO, *p++);
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cnt--;
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NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS);
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} else
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esc->sc_active = 0;
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}
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if (esc->sc_active) {
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while ((NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) == 0)
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;
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espstat = NCR_READ_REG(sc, NCR_STAT);
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espintr = NCR_READ_REG(sc, NCR_INTR);
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espphase = (espintr & NCRINTR_DIS) ?
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/* Disconnected */ BUSFREE_PHASE :
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espstat & PHASE_MASK;
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}
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} while (esc->sc_active && espintr);
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sc->sc_phase = espphase;
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sc->sc_espstat = (uint8_t)espstat;
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sc->sc_espintr = (uint8_t)espintr;
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*esc->sc_dmaaddr = p;
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*esc->sc_dmalen = cnt;
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if (*esc->sc_dmalen == 0)
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esc->sc_tc = NCRSTAT_TC;
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sc->sc_espstat |= esc->sc_tc;
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return 0;
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}
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static int
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esp_podule_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
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int datain, size_t *dmasize)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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esc->sc_dmaaddr = addr;
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esc->sc_dmalen = len;
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esc->sc_datain = datain;
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esc->sc_dmasize = *dmasize;
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esc->sc_tc = 0;
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return 0;
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}
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static void
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esp_podule_dma_go(struct ncr53c9x_softc *sc)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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if (esc->sc_datain == 0) {
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NCR_WRITE_REG(sc, NCR_FIFO, **esc->sc_dmaaddr);
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(*esc->sc_dmalen)--;
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(*esc->sc_dmaaddr)++;
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}
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esc->sc_active = 1;
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}
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static void
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esp_podule_dma_stop(struct ncr53c9x_softc *sc)
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{
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/* Nothing */
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}
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static int
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esp_podule_dma_isactive(struct ncr53c9x_softc *sc)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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return esc->sc_active;
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}
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/*
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* Functions for access to Castle SCSI registers.
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*/
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#define CASTLE_ESP_OFFSET 0xf00
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#define CASTLE_ESP_READ(sc, r) \
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bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, CASTLE_ESP_OFFSET + ((r) << 2))
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#define CASTLE_ESP_WRITE(sc, r, v) \
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bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, \
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CASTLE_ESP_OFFSET + ((r) << 2), (v))
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static uint8_t
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castle_read_reg(struct ncr53c9x_softc *sc, int reg)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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uint8_t val;
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val = CASTLE_ESP_READ(esc, reg);
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return val;
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}
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static void
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castle_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val)
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{
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struct esp_podule_softc *esc = (struct esp_podule_softc *)sc;
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if (reg == NCR_CMD && val == (NCRCMD_TRANS | NCRCMD_DMA))
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val &= ~NCRCMD_DMA; /* DMA not support */
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CASTLE_ESP_WRITE(esc, reg, val);
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}
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