140 lines
5.1 KiB
C
140 lines
5.1 KiB
C
/* $NetBSD: atapiconf.h,v 1.6 1998/02/13 08:28:23 enami Exp $ */
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/*
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* Copyright (c) 1996 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dev/scsipi/scsipiconf.h>
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struct atapi_identify {
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struct config_s {
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u_int8_t cmd_drq_rem;
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#define ATAPI_PACKET_SIZE_MASK 0x03
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#define ATAPI_PACKET_SIZE_12 0x00
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#define ATAPI_PACKET_SIZE_16 0x01
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#define ATAPI_DRQ_MASK 0x60
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#define ATAPI_MICROPROCESSOR_DRQ 0x00
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#define ATAPI_INTERRUPT_DRQ 0x20
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#define ATAPI_ACCELERATED_DRQ 0x40
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#define ATAPI_REMOVABLE 0x80
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u_int8_t device_type;
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#define ATAPI_DEVICE_TYPE_MASK 0x1f
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#define ATAPI_DEVICE_TYPE_DAD 0x00 /* direct access device */
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/* 0x1-0x4 reserved */
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#define ATAPI_DEVICE_TYPE_CD 0x05 /* CD-ROM */
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/* 0x6 reserved */
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#define ATAPI_DEVICE_TYPE_OMD 0x07 /* optical memory device */
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/* 0x8-0x1e reserved */
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#define ATAPI_DEVICE_TYPE_UNKNOWN 0x1f
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#define ATAPI_GC_PROTOCOL_MASK 0xc0 /* mask of protocol bits */
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/* 0x00 and 0x01 are ATA */
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#define ATAPI_GC_PROTO_TYPE_ATAPI 0x80
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#define ATAPI_GC_PROTO_TYPE_RESERVED 0xc0
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} config; /* general configuration */
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u_int8_t cylinders[2];
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u_int8_t reserved1[2];
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u_int8_t heads[2];
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u_int8_t unf_bytes_per_track[2];
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u_int8_t unf_bytes_per_sector[2];
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u_int8_t sectors_per_track[2];
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u_int8_t reserved2[6];
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char serial_number[20];
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u_int8_t buffer_type[2];
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u_int8_t buffer_size[2];
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u_int8_t ECC_bytes_available[2];
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char firmware_revision[8];
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char model[40];
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u_int8_t sector_count[2];
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u_int8_t double_word[2]; /* == 0 for CD-ROMs */
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struct capabilities_s {
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u_int8_t vendor;
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u_int8_t capflags;
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#define ATAPI_CAP_DMA 0x01 /* DMA supported */
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#define ATAPI_CAP_LBA 0x02 /* LBA supported */
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#define ATAPI_IORDY_DISABLE 0x04 /* IORDY can be disabled */
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#define ATAPI_IORDY 0x08 /* IORDY supported */
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} capabilities;
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u_int8_t reserved3[2];
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u_int8_t PIO_cycle_timing[2];
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u_int8_t DMA_cycle_timing[2];
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u_int8_t validity[2]; /* of words 54-58, 64-70 in this table */
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#define ATAPI_VALID_FIRST 0x0 /* == 1 => words 54-58 are valid */
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#define ATAPI_VALID_SECOND 0x1 /* == 1 => words 64-70 are valid */
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u_int8_t current_chs[6]; /* cylinder/head/sector */
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u_int8_t current_capacity[4];
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u_int8_t reserved4[2];
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u_int8_t user_addressable_sectors[4];
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u_int8_t singleword_DMA_mode[2];
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#define ATAPI_SW_DMA_MODE_AVAIL 0x00ff /* Mode 0 is supported */
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#define ATAPI_SW_DMA_MODE_ACTIVE 0xff00 /* which mode is active */
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u_int8_t multiword_DMA_mode[2];
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#define ATAPI_MW_DMA_MODE_AVAIL 0x00ff /* Mode 0 is supported */
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#define ATAPI_MW_DMA_MODE_ACTIVE 0xff00 /* which mode is active */
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u_int8_t enhanced_PIO_mode[2];
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#define ATAPI_ENHANCED_PIO_AVAIL 0x0001 /* PIO Mode 3 is supported */
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u_int8_t blind_PIO_minimum_cycles[2];
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u_int8_t mw_dma_tct[2]; /* multi-word DMA transfer cycle time */
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u_int8_t min_PIO_tct_no_flow_control[2];
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u_int8_t min_PIO_tct_with_flow_control[2];
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u_int8_t reserved5[4];
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u_int8_t reserved6[114];
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u_int8_t vendor[64]; /* vendor unique */
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u_int8_t reserved7[192];
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};
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struct atapibus_attach_args {
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struct scsipi_link *sa_sc_link;
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struct atapi_identify *sa_inqbuf;
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};
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int wdc_atapi_get_params __P((struct scsipi_link *, u_int8_t,
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struct atapi_identify *));
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void atapi_print_addr __P((struct scsipi_link *));
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int atapi_interpret_sense __P((struct scsipi_xfer *));
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int atapi_scsipi_cmd __P((struct scsipi_link *, struct scsipi_generic *,
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int, u_char *, int, int, int, struct buf *, int));
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int atapi_mode_select __P((struct scsipi_link *,
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struct atapi_mode_header *, int, int, int, int));
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int atapi_mode_sense __P((struct scsipi_link *, int,
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struct atapi_mode_header *, int, int, int, int));
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