150 lines
5.3 KiB
C
150 lines
5.3 KiB
C
/* $NetBSD: fwohci_pci.c,v 1.19 2004/04/23 21:13:06 itojun Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fwohci_pci.c,v 1.19 2004/04/23 21:13:06 itojun Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <sys/select.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ieee1394/ieee1394reg.h>
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#include <dev/ieee1394/ieee1394var.h>
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#include <dev/ieee1394/fwohcireg.h>
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#include <dev/ieee1394/fwohcivar.h>
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struct fwohci_pci_softc {
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struct fwohci_softc psc_sc;
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pci_chipset_tag_t psc_pc;
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void *psc_ih;
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};
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static int fwohci_pci_match __P((struct device *, struct cfdata *, void *));
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static void fwohci_pci_attach __P((struct device *, struct device *, void *));
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CFATTACH_DECL(fwohci_pci, sizeof(struct fwohci_pci_softc),
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fwohci_pci_match, fwohci_pci_attach, NULL, NULL);
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static int
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fwohci_pci_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *) aux;
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE &&
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PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
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return 1;
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return 0;
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}
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static void
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fwohci_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *) aux;
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struct fwohci_pci_softc *psc = (struct fwohci_pci_softc *) self;
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char devinfo[256];
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char const *intrstr;
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pci_intr_handle_t ih;
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u_int32_t csr;
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aprint_naive(": IEEE 1394 Controller\n");
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(pa->pa_class));
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psc->psc_sc.sc_dmat = pa->pa_dmat;
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psc->psc_pc = pa->pa_pc;
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/* Map I/O registers */
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if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0,
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&psc->psc_sc.sc_memt, &psc->psc_sc.sc_memh,
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NULL, &psc->psc_sc.sc_memsize)) {
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aprint_error("%s: can't map OHCI register space\n",
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self->dv_xname);
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return;
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}
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/* Disable interrupts, so we don't get any spurious ones. */
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OHCI_CSR_WRITE(&psc->psc_sc, OHCI_REG_IntMaskClear,
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OHCI_Int_MasterEnable);
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/* Enable the device. */
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr | PCI_COMMAND_MASTER_ENABLE);
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#if BYTE_ORDER == BIG_ENDIAN
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER,
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csr | PCI_GLOBAL_SWAP_BE);
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#endif
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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aprint_error("%s: couldn't map interrupt\n", self->dv_xname);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_intr,
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&psc->psc_sc);
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if (psc->psc_ih == NULL) {
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aprint_error("%s: couldn't establish interrupt",
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self->dv_xname);
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if (intrstr != NULL)
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aprint_normal(" at %s", intrstr);
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aprint_normal("\n");
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return;
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}
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aprint_normal("%s: interrupting at %s\n", self->dv_xname, intrstr);
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if (fwohci_init(&psc->psc_sc, pci_intr_evcnt(pa->pa_pc, ih)) != 0) {
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pci_intr_disestablish(pa->pa_pc, psc->psc_ih);
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bus_space_unmap(psc->psc_sc.sc_memt, psc->psc_sc.sc_memh,
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psc->psc_sc.sc_memsize);
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}
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}
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