422 lines
10 KiB
C
422 lines
10 KiB
C
/* $NetBSD: at24cxx.c,v 1.17 2014/03/16 05:20:27 dholland Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: at24cxx.c,v 1.17 2014/03/16 05:20:27 dholland Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/event.h>
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#include <sys/bus.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/at24cxxvar.h>
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/*
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* AT24Cxx EEPROM I2C address:
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* 101 0xxx
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* (and others depending on the exact model) The bigger 8-bit parts
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* decode multiple addresses. The bigger 16-bit parts do too (those
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* larger than 512kb). Be sure to check the datasheet of your EEPROM
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* because there's much variation between models.
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*/
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#define AT24CXX_ADDRMASK 0x3f8
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#define AT24CXX_ADDR 0x50
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#define AT24CXX_WRITE_CYCLE_MS 10
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#define AT24CXX_ADDR_HI(a) (((a) >> 8) & 0x1f)
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#define AT24CXX_ADDR_LO(a) ((a) & 0xff)
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#include "seeprom.h"
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#if NSEEPROM > 0
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struct seeprom_softc {
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device_t sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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int sc_size;
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int sc_cmdlen;
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int sc_open;
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};
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static int seeprom_match(device_t, cfdata_t, void *);
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static void seeprom_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(seeprom, sizeof(struct seeprom_softc),
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seeprom_match, seeprom_attach, NULL, NULL);
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extern struct cfdriver seeprom_cd;
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dev_type_open(seeprom_open);
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dev_type_close(seeprom_close);
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dev_type_read(seeprom_read);
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dev_type_write(seeprom_write);
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const struct cdevsw seeprom_cdevsw = {
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.d_open = seeprom_open,
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.d_close = seeprom_close,
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.d_read = seeprom_read,
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.d_write = seeprom_write,
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.d_ioctl = noioctl,
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.d_stop = nostop,
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.d_tty = notty,
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.d_poll = nopoll,
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.d_mmap = nommap,
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.d_kqfilter = nokqfilter,
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.d_flag = D_OTHER
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};
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static int seeprom_wait_idle(struct seeprom_softc *);
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static const char * seeprom_compats[] = {
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"i2c-at24c64",
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"i2c-at34c02",
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NULL
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};
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static int
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seeprom_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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if (ia->ia_name) {
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if (iic_compat_match(ia, seeprom_compats))
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return (1);
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} else {
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if ((ia->ia_addr & AT24CXX_ADDRMASK) == AT24CXX_ADDR)
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return (1);
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}
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return (0);
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}
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static void
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seeprom_attach(device_t parent, device_t self, void *aux)
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{
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struct seeprom_softc *sc = device_private(self);
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struct i2c_attach_args *ia = aux;
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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sc->sc_dev = self;
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if (ia->ia_name != NULL) {
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aprint_naive(": %s", ia->ia_name);
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aprint_normal(": %s", ia->ia_name);
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} else {
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aprint_naive(": EEPROM");
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aprint_normal(": AT24Cxx or compatible EEPROM");
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}
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/*
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* The AT24C01A/02/04/08/16 EEPROMs use a 1 byte command
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* word to select the offset into the EEPROM page. The
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* AT24C04/08/16 decode fewer of the i2c address bits,
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* using the bottom 1, 2, or 3 to select the 256-byte
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* super-page.
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*
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* The AT24C32/64/128/256/512 EEPROMs use a 2 byte command
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* word and decode all of the i2c address bits.
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*
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* The AT24C1024 EEPROMs use a 2 byte command and also do bank
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* switching to select the proper super-page. This isn't
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* supported by this driver.
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*/
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if (device_cfdata(self)->cf_flags)
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sc->sc_size = (device_cfdata(self)->cf_flags << 7);
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else
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sc->sc_size = ia->ia_size;
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switch (sc->sc_size) {
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case 128: /* 1Kbit */
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case 256: /* 2Kbit */
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case 512: /* 4Kbit */
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case 1024: /* 8Kbit */
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case 2048: /* 16Kbit */
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sc->sc_cmdlen = 1;
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aprint_normal(": size %d\n", sc->sc_size);
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break;
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case 4096: /* 32Kbit */
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case 8192: /* 64Kbit */
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case 16384: /* 128Kbit */
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case 32768: /* 256Kbit */
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case 65536: /* 512Kbit */
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sc->sc_cmdlen = 2;
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aprint_normal(": size %d\n", sc->sc_size);
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break;
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default:
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/*
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* Default to 2KB. If we happen to have a 2KB
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* EEPROM this will allow us to access it. If we
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* have a smaller one, the worst that can happen
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* is that we end up trying to read a different
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* EEPROM on the bus when accessing it.
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*
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* Obviously this will not work for 4KB or 8KB
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* EEPROMs, but them's the breaks.
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*/
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aprint_normal("\n");
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aprint_error_dev(self, "invalid size specified; "
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"assuming 2KB (16Kb)\n");
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sc->sc_size = 2048;
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sc->sc_cmdlen = 1;
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}
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sc->sc_open = 0;
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}
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/*ARGSUSED*/
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int
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seeprom_open(dev_t dev, int flag, int fmt, struct lwp *l)
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{
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struct seeprom_softc *sc;
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if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL)
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return (ENXIO);
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/* XXX: Locking */
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if (sc->sc_open)
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return (EBUSY);
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sc->sc_open = 1;
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return (0);
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}
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/*ARGSUSED*/
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int
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seeprom_close(dev_t dev, int flag, int fmt, struct lwp *l)
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{
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struct seeprom_softc *sc;
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if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL)
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return (ENXIO);
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sc->sc_open = 0;
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return (0);
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}
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/*ARGSUSED*/
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int
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seeprom_read(dev_t dev, struct uio *uio, int flags)
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{
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struct seeprom_softc *sc;
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i2c_addr_t addr;
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u_int8_t ch, cmdbuf[2];
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int a, error;
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if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= sc->sc_size)
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return (EINVAL);
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/*
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* Even though the AT24Cxx EEPROMs support sequential
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* reads within a page, some I2C controllers do not
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* support anything other than single-byte transfers,
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* so we're stuck with this lowest-common-denominator.
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*/
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while (uio->uio_resid > 0 && uio->uio_offset < sc->sc_size) {
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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a = (int)uio->uio_offset;
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if (sc->sc_cmdlen == 1) {
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addr = sc->sc_address + (a >> 8);
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cmdbuf[0] = a & 0xff;
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} else {
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addr = sc->sc_address;
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cmdbuf[0] = AT24CXX_ADDR_HI(a);
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cmdbuf[1] = AT24CXX_ADDR_LO(a);
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}
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if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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addr, cmdbuf, sc->sc_cmdlen,
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&ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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aprint_error_dev(sc->sc_dev,
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"seeprom_read: byte read failed at 0x%x\n", a);
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return (error);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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iic_release_bus(sc->sc_tag, 0);
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}
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return (0);
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}
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/*ARGSUSED*/
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int
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seeprom_write(dev_t dev, struct uio *uio, int flags)
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{
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struct seeprom_softc *sc;
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i2c_addr_t addr;
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u_int8_t ch, cmdbuf[2];
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int a, error;
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if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= sc->sc_size)
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return (EINVAL);
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/*
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* See seeprom_read() for why we don't use sequential
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* writes within a page.
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*/
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while (uio->uio_resid > 0 && uio->uio_offset < sc->sc_size) {
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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a = (int)uio->uio_offset;
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if (sc->sc_cmdlen == 1) {
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addr = sc->sc_address + (a >> 8);
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cmdbuf[0] = a & 0xff;
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} else {
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addr = sc->sc_address;
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cmdbuf[0] = AT24CXX_ADDR_HI(a);
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cmdbuf[1] = AT24CXX_ADDR_LO(a);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
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addr, cmdbuf, sc->sc_cmdlen,
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&ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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aprint_error_dev(sc->sc_dev,
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"seeprom_write: byte write failed at 0x%x\n", a);
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return (error);
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}
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/* Wait until the device commits the byte. */
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if ((error = seeprom_wait_idle(sc)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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iic_release_bus(sc->sc_tag, 0);
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}
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return (0);
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}
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static int
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seeprom_wait_idle(struct seeprom_softc *sc)
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{
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uint8_t cmdbuf[2] = { 0, 0 };
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int rv, timeout;
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u_int8_t dummy;
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timeout = (1000 / hz) / AT24CXX_WRITE_CYCLE_MS;
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if (timeout == 0)
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timeout = 1;
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delay(10);
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/*
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* Read the byte at address 0. This is just a dummy
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* read to wait for the EEPROM's write cycle to complete.
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*/
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while (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
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cmdbuf, sc->sc_cmdlen, &dummy, 1, 0)) {
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rv = tsleep(sc, PRIBIO | PCATCH, "seepromwr", timeout);
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if (rv != EWOULDBLOCK)
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return (rv);
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}
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return (0);
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}
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#endif /* NSEEPROM > 0 */
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int
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seeprom_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset, int devsize,
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u_int8_t *rvp, size_t len)
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{
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i2c_addr_t addr;
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int cmdlen;
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uint8_t cmdbuf[2];
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if (len == 0)
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return (0);
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/* We are very forgiving about devsize during bootstrap. */
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cmdlen = (devsize >= 4096) ? 2 : 1;
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if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
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return (-1);
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while (len) {
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if (cmdlen == 1) {
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addr = i2caddr + (offset >> 8);
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cmdbuf[0] = offset & 0xff;
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} else {
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addr = i2caddr;
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cmdbuf[0] = AT24CXX_ADDR_HI(offset);
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cmdbuf[1] = AT24CXX_ADDR_LO(offset);
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}
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/* Read a single byte. */
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if (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr,
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cmdbuf, cmdlen, rvp, 1, I2C_F_POLL)) {
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iic_release_bus(tag, I2C_F_POLL);
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return (-1);
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}
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len--;
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rvp++;
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offset++;
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}
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iic_release_bus(tag, I2C_F_POLL);
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return (0);
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}
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