1188 lines
27 KiB
C
1188 lines
27 KiB
C
/* $NetBSD: gpio.c,v 1.65 2021/04/24 23:36:54 thorpej Exp $ */
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/* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */
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/*
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* Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc@msys.ch>
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* Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.65 2021/04/24 23:36:54 thorpej Exp $");
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/*
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* General Purpose Input/Output framework.
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*/
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#include <sys/param.h>
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#include <sys/callout.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/fcntl.h>
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#include <sys/ioctl.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/vnode.h>
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#include <sys/kmem.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/queue.h>
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#include <sys/kauth.h>
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#include <sys/module.h>
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#include <dev/gpio/gpiovar.h>
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#include "ioconf.h"
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#include "locators.h"
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#ifdef GPIO_DEBUG
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#define DPRINTFN(n, x) do { if (gpiodebug > (n)) printf x; } while (0)
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int gpiodebug = 0;
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#else
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#define DPRINTFN(n, x)
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#endif
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#define DPRINTF(x) DPRINTFN(0, x)
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struct gpio_softc {
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device_t sc_dev;
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gpio_chipset_tag_t sc_gc; /* GPIO controller */
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gpio_pin_t *sc_pins; /* pins array */
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int sc_npins; /* number of pins */
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kmutex_t sc_mtx;
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kcondvar_t sc_ioctl; /* ioctl in progress */
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int sc_ioctl_busy; /* ioctl is busy */
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kcondvar_t sc_attach; /* attach/detach in progress */
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int sc_attach_busy;/* busy in attach/detach */
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#ifdef COMPAT_50
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LIST_HEAD(, gpio_dev) sc_devs; /* devices */
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#endif
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LIST_HEAD(, gpio_name) sc_names; /* named pins */
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};
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static int gpio_match(device_t, cfdata_t, void *);
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int gpio_submatch(device_t, cfdata_t, const int *, void *);
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static void gpio_attach(device_t, device_t, void *);
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static int gpio_rescan(device_t, const char *, const int *);
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static void gpio_childdetached(device_t, device_t);
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static bool gpio_resume(device_t, const pmf_qual_t *);
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static int gpio_detach(device_t, int);
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static int gpio_search(device_t, cfdata_t, const int *, void *);
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static int gpio_print(void *, const char *);
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static int gpio_pinbyname(struct gpio_softc *, char *);
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static int gpio_ioctl(struct gpio_softc *, u_long, void *, int,
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struct lwp *);
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#ifdef COMPAT_50
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/* Old API */
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static int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int,
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kauth_cred_t);
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#endif
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CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc),
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gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan,
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gpio_childdetached, DVF_DETACH_SHUTDOWN);
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dev_type_open(gpioopen);
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dev_type_close(gpioclose);
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dev_type_ioctl(gpioioctl);
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dev_type_ioctl(gpioioctl_locked);
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const struct cdevsw gpio_cdevsw = {
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.d_open = gpioopen,
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.d_close = gpioclose,
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.d_read = noread,
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.d_write = nowrite,
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.d_ioctl = gpioioctl,
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.d_stop = nostop,
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.d_tty = notty,
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.d_poll = nopoll,
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.d_mmap = nommap,
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.d_kqfilter = nokqfilter,
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.d_discard = nodiscard,
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.d_flag = D_OTHER | D_MPSAFE
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};
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static int
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gpio_match(device_t parent, cfdata_t cf, void *aux)
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{
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return 1;
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}
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int
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gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux)
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{
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struct gpio_attach_args *ga = aux;
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if (ga->ga_offset == -1)
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return 0;
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return strcmp(ga->ga_dvname, cf->cf_name) == 0;
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}
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static bool
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gpio_resume(device_t self, const pmf_qual_t *qual)
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{
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struct gpio_softc *sc = device_private(self);
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int pin;
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for (pin = 0; pin < sc->sc_npins; pin++) {
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gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags);
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gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state);
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}
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return true;
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}
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static void
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gpio_childdetached(device_t self, device_t child)
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{
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#ifdef COMPAT_50
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struct gpio_dev *gdev;
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struct gpio_softc *sc;
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int error;
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/*
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* gpio_childetached is serialized because it can be entered in
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* different ways concurrently, e.g. via the GPIODETACH ioctl and
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* drvctl(8) or modunload(8).
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*/
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sc = device_private(self);
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error = 0;
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mutex_enter(&sc->sc_mtx);
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while (sc->sc_attach_busy) {
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error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
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if (error)
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break;
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}
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if (!error)
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sc->sc_attach_busy = 1;
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mutex_exit(&sc->sc_mtx);
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if (error)
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return;
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LIST_FOREACH(gdev, &sc->sc_devs, sc_next)
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if (gdev->sc_dev == child) {
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LIST_REMOVE(gdev, sc_next);
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kmem_free(gdev, sizeof(struct gpio_dev));
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break;
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}
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mutex_enter(&sc->sc_mtx);
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sc->sc_attach_busy = 0;
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cv_signal(&sc->sc_attach);
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mutex_exit(&sc->sc_mtx);
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#endif
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}
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static int
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gpio_rescan(device_t self, const char *ifattr, const int *locators)
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{
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config_search(self, NULL,
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CFARG_SEARCH, gpio_search,
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CFARG_EOL);
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return 0;
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}
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static void
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gpio_attach(device_t parent, device_t self, void *aux)
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{
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struct gpio_softc *sc = device_private(self);
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struct gpiobus_attach_args *gba = aux;
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struct gpio_name *nm;
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int pin;
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sc->sc_dev = self;
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sc->sc_gc = gba->gba_gc;
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sc->sc_pins = gba->gba_pins;
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sc->sc_npins = gba->gba_npins;
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aprint_normal(": %d pins\n", sc->sc_npins);
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aprint_naive("\n");
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/* Configure default pin names */
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for (pin = 0; pin < sc->sc_npins; pin++) {
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if (sc->sc_pins[pin].pin_defname[0] == '\0')
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continue;
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nm = kmem_alloc(sizeof(*nm), KM_SLEEP);
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strlcpy(nm->gp_name, sc->sc_pins[pin].pin_defname,
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sizeof(nm->gp_name));
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nm->gp_pin = pin;
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LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
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}
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if (!pmf_device_register(self, NULL, gpio_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
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cv_init(&sc->sc_ioctl, "gpioctl");
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cv_init(&sc->sc_attach, "gpioatch");
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/*
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* Attach all devices that can be connected to the GPIO pins
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* described in the kernel configuration file.
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*/
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gpio_rescan(self, "gpio", NULL);
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}
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static int
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gpio_detach(device_t self, int flags)
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{
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struct gpio_softc *sc;
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int rc;
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sc = device_private(self);
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if ((rc = config_detach_children(self, flags)) != 0)
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return rc;
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mutex_destroy(&sc->sc_mtx);
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cv_destroy(&sc->sc_ioctl);
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#if 0
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int maj, mn;
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/* Locate the major number */
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for (maj = 0; maj < nchrdev; maj++)
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if (cdevsw[maj].d_open == gpioopen)
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break;
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/* Nuke the vnodes for any open instances (calls close) */
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mn = device_unit(self);
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vdevgone(maj, mn, mn, VCHR);
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#endif
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return 0;
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}
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static int
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gpio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
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{
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struct gpio_attach_args ga;
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size_t namlen;
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ga.ga_gpio = device_private(parent);
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ga.ga_offset = cf->cf_loc[GPIOCF_OFFSET];
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ga.ga_mask = cf->cf_loc[GPIOCF_MASK];
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ga.ga_flags = cf->cf_loc[GPIOCF_FLAG];
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namlen = strlen(cf->cf_name) + 1;
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ga.ga_dvname = kmem_alloc(namlen, KM_SLEEP);
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strcpy(ga.ga_dvname, cf->cf_name);
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if (config_probe(parent, cf, &ga))
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config_attach(parent, cf, &ga, gpio_print, CFARG_EOL);
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kmem_free(ga.ga_dvname, namlen);
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return 0;
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}
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int
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gpio_print(void *aux, const char *pnp)
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{
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struct gpio_attach_args *ga = aux;
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int i;
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aprint_normal(" pins");
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for (i = 0; i < 32; i++)
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if (ga->ga_mask & (1 << i))
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aprint_normal(" %d", ga->ga_offset + i);
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return UNCONF;
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}
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int
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gpiobus_print(void *aux, const char *pnp)
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{
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#if 0
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struct gpiobus_attach_args *gba = aux;
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#endif
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if (pnp != NULL)
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aprint_normal("gpiobus at %s", pnp);
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return UNCONF;
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}
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void *
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gpio_find_device(const char *name)
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{
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device_t gpio_dev;
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gpio_dev = device_find_by_xname(name);
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if (gpio_dev == NULL)
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return NULL;
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return device_private(gpio_dev);
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}
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const char *
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gpio_get_name(void *gpio)
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{
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struct gpio_softc *sc = gpio;
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return device_xname(sc->sc_dev);
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}
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/* return 1 if all pins can be mapped, 0 if not */
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int
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gpio_pin_can_map(void *gpio, int offset, uint32_t mask)
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{
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struct gpio_softc *sc = gpio;
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int npins, pin, i;
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npins = gpio_npins(mask);
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if (npins > sc->sc_npins)
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return 0;
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for (npins = 0, i = 0; i < 32; i++)
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if (mask & (1 << i)) {
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pin = offset + i;
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if (pin < 0 || pin >= sc->sc_npins)
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return 0;
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if (sc->sc_pins[pin].pin_mapped)
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return 0;
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}
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return 1;
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}
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int
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gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map)
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{
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struct gpio_softc *sc = gpio;
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int npins, pin, i;
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npins = gpio_npins(mask);
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if (npins > sc->sc_npins)
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return 1;
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for (npins = 0, i = 0; i < 32; i++)
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if (mask & (1 << i)) {
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pin = offset + i;
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if (pin < 0 || pin >= sc->sc_npins)
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return 1;
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if (sc->sc_pins[pin].pin_mapped)
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return 1;
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sc->sc_pins[pin].pin_mapped = 1;
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map->pm_map[npins++] = pin;
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}
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map->pm_size = npins;
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return 0;
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}
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void
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gpio_pin_unmap(void *gpio, struct gpio_pinmap *map)
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{
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struct gpio_softc *sc = gpio;
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int pin, i;
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for (i = 0; i < map->pm_size; i++) {
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pin = map->pm_map[i];
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sc->sc_pins[pin].pin_mapped = 0;
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}
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}
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int
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gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin)
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{
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struct gpio_softc *sc = gpio;
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return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]);
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}
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void
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gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value)
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{
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struct gpio_softc *sc = gpio;
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gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value);
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sc->sc_pins[map->pm_map[pin]].pin_state = value;
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}
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int
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gpio_pin_get_conf(void *gpio, struct gpio_pinmap *map, int pin)
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{
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struct gpio_softc *sc = gpio;
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int rv;
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mutex_enter(&sc->sc_mtx);
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rv = sc->sc_pins[map->pm_map[pin]].pin_flags;
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mutex_exit(&sc->sc_mtx);
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return (rv);
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}
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bool
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gpio_pin_set_conf(void *gpio, struct gpio_pinmap *map, int pin, int flags)
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{
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struct gpio_softc *sc = gpio;
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int checkflags = flags & GPIO_PIN_HWCAPS;
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if ((sc->sc_pins[map->pm_map[pin]].pin_caps & checkflags) != checkflags)
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return (false);
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gpio_pin_ctl(gpio, map, pin, flags);
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return (true);
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}
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void
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gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags)
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{
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struct gpio_softc *sc = gpio;
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/* loosey-goosey version of gpio_pin_set_conf(). */
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mutex_enter(&sc->sc_mtx);
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gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags);
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sc->sc_pins[map->pm_map[pin]].pin_flags = flags;
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mutex_exit(&sc->sc_mtx);
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}
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int
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gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin)
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{
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struct gpio_softc *sc = gpio;
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return sc->sc_pins[map->pm_map[pin]].pin_caps;
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}
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int
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gpio_pin_intrcaps(void *gpio, struct gpio_pinmap *map, int pin)
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{
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struct gpio_softc *sc = gpio;
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return sc->sc_pins[map->pm_map[pin]].pin_intrcaps;
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}
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static int
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gpio_irqmode_sanitize(int irqmode)
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{
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int has_edge, has_level;
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has_edge = irqmode & GPIO_INTR_EDGE_MASK;
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has_level = irqmode & GPIO_INTR_LEVEL_MASK;
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/* Must specify an interrupt mode. */
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if ((irqmode & GPIO_INTR_MODE_MASK) == 0)
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return (0);
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/* Can't specify edge and level together */
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if (has_level && has_edge)
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return (0);
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/* "Be liberal in what you accept..." */
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if (has_edge) {
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if (irqmode & GPIO_INTR_DOUBLE_EDGE) {
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/* if DOUBLE is set, just pass through DOUBLE */
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irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) |
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GPIO_INTR_DOUBLE_EDGE;
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} else if ((irqmode ^
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(GPIO_INTR_POS_EDGE | GPIO_INTR_NEG_EDGE)) == 0) {
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/* both POS and NEG set; treat as DOUBLE */
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irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) |
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GPIO_INTR_DOUBLE_EDGE;
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}
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} else {
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/* Can't specify both levels together. */
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if (has_level == GPIO_INTR_LEVEL_MASK)
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return (0);
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}
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return (irqmode);
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}
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bool
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gpio_pin_irqmode_issupported(void *gpio, struct gpio_pinmap *map,
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int pin, int irqmode)
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{
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struct gpio_softc *sc = gpio;
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int match;
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irqmode = gpio_irqmode_sanitize(irqmode) & GPIO_INTR_MODE_MASK;
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/* Make sure the pin can do what is being asked. */
|
|
match = sc->sc_pins[map->pm_map[pin]].pin_intrcaps & irqmode;
|
|
|
|
return (irqmode && irqmode == match);
|
|
}
|
|
|
|
void *
|
|
gpio_intr_establish(void *gpio, struct gpio_pinmap *map, int pin, int ipl,
|
|
int irqmode, int (*func)(void *), void *arg)
|
|
{
|
|
struct gpio_softc *sc = gpio;
|
|
|
|
if (sc->sc_gc->gp_intr_establish == NULL)
|
|
return (NULL);
|
|
|
|
irqmode = gpio_irqmode_sanitize(irqmode);
|
|
if (irqmode == 0)
|
|
return (NULL);
|
|
|
|
if (! gpio_pin_irqmode_issupported(gpio, map, pin, irqmode))
|
|
return (NULL);
|
|
|
|
/* XXX Right now, everything has to be at IPL_VM. */
|
|
if (ipl != IPL_VM)
|
|
return (NULL);
|
|
|
|
return ((*sc->sc_gc->gp_intr_establish)(sc->sc_gc->gp_cookie,
|
|
sc->sc_pins[map->pm_map[pin]].pin_num, ipl, irqmode, func, arg));
|
|
}
|
|
|
|
void
|
|
gpio_intr_disestablish(void *gpio, void *ih)
|
|
{
|
|
struct gpio_softc *sc = gpio;
|
|
|
|
if (sc->sc_gc->gp_intr_disestablish != NULL && ih != NULL)
|
|
(*sc->sc_gc->gp_intr_disestablish)(sc->sc_gc->gp_cookie, ih);
|
|
}
|
|
|
|
bool
|
|
gpio_intr_str(void *gpio, struct gpio_pinmap *map, int pin, int irqmode,
|
|
char *intrstr, size_t intrstrlen)
|
|
{
|
|
struct gpio_softc *sc = gpio;
|
|
const char *mode;
|
|
char hwstr[64];
|
|
|
|
if (sc->sc_gc->gp_intr_str == NULL)
|
|
return (false);
|
|
|
|
irqmode = gpio_irqmode_sanitize(irqmode);
|
|
if (irqmode == 0)
|
|
return (false);
|
|
|
|
if (irqmode & GPIO_INTR_DOUBLE_EDGE)
|
|
mode = "double edge";
|
|
else if (irqmode & GPIO_INTR_POS_EDGE)
|
|
mode = "positive edge";
|
|
else if (irqmode & GPIO_INTR_NEG_EDGE)
|
|
mode = "negative edge";
|
|
else if (irqmode & GPIO_INTR_HIGH_LEVEL)
|
|
mode = "high level";
|
|
else if (irqmode & GPIO_INTR_LOW_LEVEL)
|
|
mode = "low level";
|
|
else
|
|
return (false);
|
|
|
|
if (! (*sc->sc_gc->gp_intr_str)(sc->sc_gc->gp_cookie,
|
|
sc->sc_pins[map->pm_map[pin]].pin_num,
|
|
irqmode, hwstr, sizeof(hwstr)))
|
|
return (false);
|
|
|
|
(void) snprintf(intrstr, intrstrlen, "%s (%s)", hwstr, mode);
|
|
|
|
return (true);
|
|
}
|
|
|
|
int
|
|
gpio_npins(uint32_t mask)
|
|
{
|
|
int npins, i;
|
|
|
|
for (npins = 0, i = 0; i < 32; i++)
|
|
if (mask & (1 << i))
|
|
npins++;
|
|
|
|
return npins;
|
|
}
|
|
|
|
int
|
|
gpio_lock(void *data)
|
|
{
|
|
struct gpio_softc *sc;
|
|
int error;
|
|
|
|
error = 0;
|
|
sc = data;
|
|
mutex_enter(&sc->sc_mtx);
|
|
while (sc->sc_ioctl_busy) {
|
|
error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx);
|
|
if (error)
|
|
break;
|
|
}
|
|
if (!error)
|
|
sc->sc_ioctl_busy = 1;
|
|
mutex_exit(&sc->sc_mtx);
|
|
return error;
|
|
}
|
|
|
|
void
|
|
gpio_unlock(void *data)
|
|
{
|
|
struct gpio_softc *sc;
|
|
|
|
sc = data;
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_ioctl_busy = 0;
|
|
cv_signal(&sc->sc_ioctl);
|
|
mutex_exit(&sc->sc_mtx);
|
|
}
|
|
|
|
int
|
|
gpioopen(dev_t dev, int flag, int mode, struct lwp *l)
|
|
{
|
|
struct gpio_softc *sc;
|
|
|
|
sc = device_lookup_private(&gpio_cd, minor(dev));
|
|
if (sc == NULL)
|
|
return ENXIO;
|
|
|
|
return gpiobus_open(sc->sc_gc, sc->sc_dev);
|
|
}
|
|
|
|
int
|
|
gpioclose(dev_t dev, int flag, int mode, struct lwp *l)
|
|
{
|
|
struct gpio_softc *sc;
|
|
|
|
sc = device_lookup_private(&gpio_cd, minor(dev));
|
|
return gpiobus_close(sc->sc_gc, sc->sc_dev);
|
|
}
|
|
|
|
static int
|
|
gpio_pinbyname(struct gpio_softc *sc, char *gp_name)
|
|
{
|
|
struct gpio_name *nm;
|
|
|
|
LIST_FOREACH(nm, &sc->sc_names, gp_next)
|
|
if (!strcmp(nm->gp_name, gp_name))
|
|
return nm->gp_pin;
|
|
return -1;
|
|
}
|
|
|
|
int
|
|
gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
|
|
{
|
|
int error;
|
|
struct gpio_softc *sc;
|
|
|
|
sc = device_lookup_private(&gpio_cd, minor(dev));
|
|
|
|
error = gpio_lock(sc);
|
|
if (error)
|
|
return error;
|
|
|
|
error = gpio_ioctl(sc, cmd, data, flag, l);
|
|
gpio_unlock(sc);
|
|
return error;
|
|
}
|
|
|
|
static int
|
|
gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag,
|
|
struct lwp *l)
|
|
{
|
|
gpio_chipset_tag_t gc;
|
|
struct gpio_info *info;
|
|
struct gpio_attach *attach;
|
|
struct gpio_attach_args ga;
|
|
struct gpio_req *req;
|
|
struct gpio_name *nm;
|
|
struct gpio_set *set;
|
|
#ifdef COMPAT_50
|
|
struct gpio_dev *gdev;
|
|
#endif
|
|
device_t dv;
|
|
cfdata_t cf;
|
|
kauth_cred_t cred;
|
|
int locs[GPIOCF_NLOCS];
|
|
int error, pin, value, flags, npins;
|
|
|
|
gc = sc->sc_gc;
|
|
ga.ga_flags = 0;
|
|
|
|
if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) {
|
|
DPRINTF(("%s: device is not active\n",
|
|
device_xname(sc->sc_dev)));
|
|
return EBUSY;
|
|
}
|
|
|
|
cred = kauth_cred_get();
|
|
|
|
switch (cmd) {
|
|
case GPIOINFO:
|
|
info = data;
|
|
if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
info->gpio_npins = sc->sc_npins;
|
|
else {
|
|
for (pin = npins = 0; pin < sc->sc_npins; pin++)
|
|
if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)
|
|
++npins;
|
|
info->gpio_npins = npins;
|
|
}
|
|
break;
|
|
case GPIOREAD:
|
|
req = data;
|
|
|
|
if (req->gp_name[0] != '\0')
|
|
req->gp_pin = gpio_pinbyname(sc, req->gp_name);
|
|
pin = req->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
/* return read value */
|
|
req->gp_value = gpiobus_pin_read(gc, pin);
|
|
LIST_FOREACH(nm, &sc->sc_names, gp_next)
|
|
if (nm->gp_pin == pin) {
|
|
strlcpy(req->gp_name, nm->gp_name, GPIOMAXNAME);
|
|
break;
|
|
}
|
|
break;
|
|
case GPIOWRITE:
|
|
if ((flag & FWRITE) == 0)
|
|
return EBADF;
|
|
|
|
req = data;
|
|
|
|
if (req->gp_name[0] != '\0')
|
|
pin = gpio_pinbyname(sc, req->gp_name);
|
|
else
|
|
pin = req->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
value = req->gp_value;
|
|
if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
|
|
return EINVAL;
|
|
|
|
/* return old value */
|
|
req->gp_value = gpiobus_pin_read(gc, pin);
|
|
gpiobus_pin_write(gc, pin, value);
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_state = value;
|
|
break;
|
|
case GPIOTOGGLE:
|
|
if ((flag & FWRITE) == 0)
|
|
return EBADF;
|
|
|
|
req = data;
|
|
|
|
if (req->gp_name[0] != '\0')
|
|
pin = gpio_pinbyname(sc, req->gp_name);
|
|
else
|
|
pin = req->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
|
|
GPIO_PIN_HIGH : GPIO_PIN_LOW);
|
|
gpiobus_pin_write(gc, pin, value);
|
|
/* return old value */
|
|
req->gp_value = sc->sc_pins[pin].pin_state;
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_state = value;
|
|
break;
|
|
case GPIOATTACH:
|
|
attach = data;
|
|
ga.ga_flags = attach->ga_flags;
|
|
#ifdef COMPAT_50
|
|
/* FALLTHROUGH */
|
|
case GPIOATTACH50:
|
|
/*
|
|
* The double assignment to 'attach' in case of GPIOATTACH
|
|
* and COMPAT_50 is on purpose. It ensures backward
|
|
* compatability in case we are called through the old
|
|
* GPIOATTACH50 ioctl(2), which had not the ga_flags field
|
|
* in struct gpio_attach.
|
|
*/
|
|
attach = data;
|
|
#endif
|
|
if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
/* do not try to attach if the pins are already mapped */
|
|
if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask))
|
|
return EBUSY;
|
|
|
|
error = 0;
|
|
mutex_enter(&sc->sc_mtx);
|
|
while (sc->sc_attach_busy) {
|
|
error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
|
|
if (error)
|
|
break;
|
|
}
|
|
if (!error)
|
|
sc->sc_attach_busy = 1;
|
|
mutex_exit(&sc->sc_mtx);
|
|
if (error)
|
|
return EBUSY;
|
|
|
|
ga.ga_gpio = sc;
|
|
/* Don't access attach->ga_flags here. */
|
|
ga.ga_dvname = attach->ga_dvname;
|
|
ga.ga_offset = attach->ga_offset;
|
|
ga.ga_mask = attach->ga_mask;
|
|
DPRINTF(("%s: attach %s with offset %d, mask "
|
|
"0x%02x, and flags 0x%02x\n", device_xname(sc->sc_dev),
|
|
ga.ga_dvname, ga.ga_offset, ga.ga_mask, ga.ga_flags));
|
|
|
|
locs[GPIOCF_OFFSET] = ga.ga_offset;
|
|
locs[GPIOCF_MASK] = ga.ga_mask;
|
|
locs[GPIOCF_FLAG] = ga.ga_flags;
|
|
|
|
cf = config_search(sc->sc_dev, &ga,
|
|
CFARG_LOCATORS, locs,
|
|
CFARG_EOL);
|
|
if (cf != NULL) {
|
|
dv = config_attach(sc->sc_dev, cf, &ga,
|
|
gpiobus_print,
|
|
CFARG_LOCATORS, locs,
|
|
CFARG_EOL);
|
|
#ifdef COMPAT_50
|
|
if (dv != NULL) {
|
|
gdev = kmem_alloc(sizeof(struct gpio_dev),
|
|
KM_SLEEP);
|
|
gdev->sc_dev = dv;
|
|
LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next);
|
|
} else
|
|
error = EINVAL;
|
|
#else
|
|
if (dv == NULL)
|
|
error = EINVAL;
|
|
#endif
|
|
} else
|
|
error = EINVAL;
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_attach_busy = 0;
|
|
cv_signal(&sc->sc_attach);
|
|
mutex_exit(&sc->sc_mtx);
|
|
return error;
|
|
case GPIOSET:
|
|
if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
set = data;
|
|
|
|
if (set->gp_name[0] != '\0')
|
|
pin = gpio_pinbyname(sc, set->gp_name);
|
|
else
|
|
pin = set->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
flags = set->gp_flags;
|
|
|
|
/* check that the controller supports all requested flags */
|
|
if ((flags & sc->sc_pins[pin].pin_caps) != flags)
|
|
return ENODEV;
|
|
flags = set->gp_flags;
|
|
|
|
set->gp_caps = sc->sc_pins[pin].pin_caps;
|
|
/* return old value */
|
|
set->gp_flags = sc->sc_pins[pin].pin_flags;
|
|
|
|
if (flags > 0) {
|
|
flags |= GPIO_PIN_SET;
|
|
gpiobus_pin_ctl(gc, pin, flags);
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_flags = flags;
|
|
}
|
|
|
|
/* rename pin or new pin? */
|
|
if (set->gp_name2[0] != '\0') {
|
|
struct gpio_name *gnm;
|
|
|
|
gnm = NULL;
|
|
LIST_FOREACH(nm, &sc->sc_names, gp_next) {
|
|
if (!strcmp(nm->gp_name, set->gp_name2) &&
|
|
nm->gp_pin != pin)
|
|
return EINVAL; /* duplicate name */
|
|
if (nm->gp_pin == pin)
|
|
gnm = nm;
|
|
}
|
|
if (gnm != NULL)
|
|
strlcpy(gnm->gp_name, set->gp_name2,
|
|
sizeof(gnm->gp_name));
|
|
else {
|
|
nm = kmem_alloc(sizeof(struct gpio_name),
|
|
KM_SLEEP);
|
|
strlcpy(nm->gp_name, set->gp_name2,
|
|
sizeof(nm->gp_name));
|
|
nm->gp_pin = set->gp_pin;
|
|
LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
|
|
}
|
|
}
|
|
break;
|
|
case GPIOUNSET:
|
|
if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
set = data;
|
|
if (set->gp_name[0] != '\0')
|
|
pin = gpio_pinbyname(sc, set->gp_name);
|
|
else
|
|
pin = set->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET))
|
|
return EINVAL;
|
|
|
|
LIST_FOREACH(nm, &sc->sc_names, gp_next) {
|
|
if (nm->gp_pin == pin) {
|
|
LIST_REMOVE(nm, gp_next);
|
|
kmem_free(nm, sizeof(struct gpio_name));
|
|
break;
|
|
}
|
|
}
|
|
sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET;
|
|
break;
|
|
default:
|
|
#ifdef COMPAT_50
|
|
/* Try the old API */
|
|
DPRINTF(("%s: trying the old API\n", device_xname(sc->sc_dev)));
|
|
return gpio_ioctl_oapi(sc, cmd, data, flag, cred);
|
|
#else
|
|
return ENOTTY;
|
|
#endif
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#ifdef COMPAT_50
|
|
static int
|
|
gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag,
|
|
kauth_cred_t cred)
|
|
{
|
|
gpio_chipset_tag_t gc;
|
|
struct gpio_pin_op *op;
|
|
struct gpio_pin_ctl *ctl;
|
|
struct gpio_attach *attach;
|
|
struct gpio_dev *gdev;
|
|
|
|
int error, pin, value, flags;
|
|
|
|
gc = sc->sc_gc;
|
|
|
|
switch (cmd) {
|
|
case GPIOPINREAD:
|
|
op = data;
|
|
|
|
pin = op->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
/* return read value */
|
|
op->gp_value = gpiobus_pin_read(gc, pin);
|
|
break;
|
|
case GPIOPINWRITE:
|
|
if ((flag & FWRITE) == 0)
|
|
return EBADF;
|
|
|
|
op = data;
|
|
|
|
pin = op->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
value = op->gp_value;
|
|
if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
|
|
return EINVAL;
|
|
|
|
gpiobus_pin_write(gc, pin, value);
|
|
/* return old value */
|
|
op->gp_value = sc->sc_pins[pin].pin_state;
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_state = value;
|
|
break;
|
|
case GPIOPINTOGGLE:
|
|
if ((flag & FWRITE) == 0)
|
|
return EBADF;
|
|
|
|
op = data;
|
|
|
|
pin = op->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
|
|
if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
|
|
kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
|
|
GPIO_PIN_HIGH : GPIO_PIN_LOW);
|
|
gpiobus_pin_write(gc, pin, value);
|
|
/* return old value */
|
|
op->gp_value = sc->sc_pins[pin].pin_state;
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_state = value;
|
|
break;
|
|
case GPIOPINCTL:
|
|
ctl = data;
|
|
|
|
if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
pin = ctl->gp_pin;
|
|
|
|
if (pin < 0 || pin >= sc->sc_npins)
|
|
return EINVAL;
|
|
if (sc->sc_pins[pin].pin_mapped)
|
|
return EBUSY;
|
|
flags = ctl->gp_flags;
|
|
|
|
/* check that the controller supports all requested flags */
|
|
if ((flags & sc->sc_pins[pin].pin_caps) != flags)
|
|
return ENODEV;
|
|
|
|
ctl->gp_caps = sc->sc_pins[pin].pin_caps;
|
|
/* return old value */
|
|
ctl->gp_flags = sc->sc_pins[pin].pin_flags;
|
|
if (flags > 0) {
|
|
gpiobus_pin_ctl(gc, pin, flags);
|
|
/* update current value */
|
|
sc->sc_pins[pin].pin_flags = flags;
|
|
}
|
|
break;
|
|
case GPIODETACH50:
|
|
/* FALLTHOUGH */
|
|
case GPIODETACH:
|
|
if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
|
|
NULL, NULL, NULL, NULL))
|
|
return EPERM;
|
|
|
|
error = 0;
|
|
mutex_enter(&sc->sc_mtx);
|
|
while (sc->sc_attach_busy) {
|
|
error = cv_wait_sig(&sc->sc_attach, &sc->sc_mtx);
|
|
if (error)
|
|
break;
|
|
}
|
|
if (!error)
|
|
sc->sc_attach_busy = 1;
|
|
mutex_exit(&sc->sc_mtx);
|
|
if (error)
|
|
return EBUSY;
|
|
|
|
attach = data;
|
|
LIST_FOREACH(gdev, &sc->sc_devs, sc_next) {
|
|
if (strcmp(device_xname(gdev->sc_dev),
|
|
attach->ga_dvname) == 0) {
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_attach_busy = 0;
|
|
cv_signal(&sc->sc_attach);
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
if (config_detach(gdev->sc_dev, 0) == 0)
|
|
return 0;
|
|
break;
|
|
}
|
|
}
|
|
if (gdev == NULL) {
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_attach_busy = 0;
|
|
cv_signal(&sc->sc_attach);
|
|
mutex_exit(&sc->sc_mtx);
|
|
}
|
|
return EINVAL;
|
|
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
return 0;
|
|
}
|
|
#endif /* COMPAT_50 */
|
|
|
|
MODULE(MODULE_CLASS_DRIVER, gpio, NULL);
|
|
|
|
#ifdef _MODULE
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
static int
|
|
gpio_modcmd(modcmd_t cmd, void *opaque)
|
|
{
|
|
#ifdef _MODULE
|
|
devmajor_t cmajor = NODEVMAJOR, bmajor = NODEVMAJOR;
|
|
int error;
|
|
#endif
|
|
switch (cmd) {
|
|
case MODULE_CMD_INIT:
|
|
#ifdef _MODULE
|
|
error = config_init_component(cfdriver_ioconf_gpio,
|
|
cfattach_ioconf_gpio, cfdata_ioconf_gpio);
|
|
if (error) {
|
|
aprint_error("%s: unable to init component\n",
|
|
gpio_cd.cd_name);
|
|
return error;
|
|
}
|
|
error = devsw_attach(gpio_cd.cd_name, NULL, &bmajor,
|
|
&gpio_cdevsw, &cmajor);
|
|
if (error) {
|
|
aprint_error("%s: unable to register devsw\n",
|
|
gpio_cd.cd_name);
|
|
return config_fini_component(cfdriver_ioconf_gpio,
|
|
cfattach_ioconf_gpio, cfdata_ioconf_gpio);
|
|
}
|
|
#endif
|
|
return 0;
|
|
case MODULE_CMD_FINI:
|
|
#ifdef _MODULE
|
|
config_fini_component(cfdriver_ioconf_gpio,
|
|
cfattach_ioconf_gpio, cfdata_ioconf_gpio);
|
|
devsw_detach(NULL, &gpio_cdevsw);
|
|
#endif
|
|
return 0;
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
}
|