102 lines
3.7 KiB
C
102 lines
3.7 KiB
C
/* $NetBSD: sysfpgavar.h,v 1.6 2002/10/14 14:19:29 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH5_SYSFPGAVAR_H
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#define _SH5_SYSFPGAVAR_H
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struct sysfpga_attach_args {
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const char *sa_name;
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bus_space_tag_t sa_bust;
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bus_dma_tag_t sa_dmat;
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bus_addr_t sa_offset;
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bus_addr_t _sa_base;
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};
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/*
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* Interrupt groups managed by the System FPGA
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*/
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#define SYSFPGA_IGROUP_SUPERIO 0 /* Output to CPU's IRL1 pin */
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#define SYSFPGA_IGROUP_FEMI 1 /* Output to CPU's IRL0 pin */
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#define SYSFPGA_IGROUP_PCI1 2 /* Output to CPU's IRL2 pin */
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#define SYSFPGA_IGROUP_PCI2 3 /* Output to CPU's IRL3 pin */
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#define SYSFPGA_NGROUPS 4
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/*
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* Super IO generates the following interrupts
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*/
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#define SYSFPGA_SUPERIO_INUM_DCD 0 /* XXX: Not strictly SuperIO! */
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#define SYSFPGA_SUPERIO_INUM_LAN 1 /* XXX: Not strictly SuperIO! */
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#define SYSFPGA_SUPERIO_INUM_KBD 2
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#define SYSFPGA_SUPERIO_INUM_UART2 3
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#define SYSFPGA_SUPERIO_INUM_UART1 4
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#define SYSFPGA_SUPERIO_INUM_LPT 5
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#define SYSFPGA_SUPERIO_INUM_MOUSE 6
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#define SYSFPGA_SUPERIO_INUM_IDE 7
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#define SYSFPGA_SUPERIO_NINTR 8
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/*
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* PCI1 generates the following interrupts
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*/
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#define SYSFPGA_PCI1_INTA 0
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#define SYSFPGA_PCI1_INTB 1
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#define SYSFPGA_PCI1_INTC 2
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#define SYSFPGA_PCI1_INTD 3
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#define SYSFPGA_PCI1_NINTR 4
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/*
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* PCI2 generates the following interrupts
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*/
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#define SYSFPGA_PCI2_INTA 0
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#define SYSFPGA_PCI2_INTB 1
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#define SYSFPGA_PCI2_INTC 2
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#define SYSFPGA_PCI2_INTD 3
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#define SYSFPGA_PCI2_FAL 4 /* XXX: cPCI form-factor only */
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#define SYSFPGA_PCI2_DEG 5 /* XXX: cPCI form-factor only */
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#define SYSFPGA_PCI2_INTP 6 /* XXX: cPCI form-factor only */
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#define SYSFPGA_PCI2_INTS 7 /* XXX: cPCI form-factor only */
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#define SYSFPGA_PCI2_NINTR 8
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struct evcnt;
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extern void *sysfpga_intr_establish(int, int, int, int (*)(void *), void *);
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extern void sysfpga_intr_disestablish(void *);
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extern struct evcnt *sysfpga_intr_evcnt(int, int);
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extern void sysfpga_nmi_clear(void);
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extern void sysfpga_sreset(void);
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#endif /* _SH5_SYSFPGAVAR_H */
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