0062f2f291
from CradlePoint Technology.
354 lines
12 KiB
C
354 lines
12 KiB
C
/* $NetBSD: ralink_gpio.h,v 1.2 2011/07/28 15:38:49 matt Exp $ */
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/*-
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* Copyright (c) 2011 CradlePoint Technology, Inc.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY CRADLEPOINT TECHNOLOGY, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RALINK_GPIO_H_
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#define _RALINK_GPIO_H_
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/* ra_gpio.h -- Ralink 3052 gpio driver public defines */
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/* Board-specific details */
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#if defined(TABLEROCK) || defined(SPOT2) || defined(PUCK) || defined(MOAB)
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/*
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* Enable pins: UART Full, and GPIO0 pins 0-23
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* Rising edge: three buttons & dock sense
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* Falling edge: three buttons & dock sense
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*/
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#define GPIO_TR_PIN_MASK 0x017f81
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#define GPIO_TR_OUTPUT_PIN_MASK 0x003b80
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#define GPIO_TR_INT_PIN_MASK 0x014401
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#define GPIO_TR_INT_FEDGE_PIN_MASK 0x014401
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#define GPIO_TR_POL_MASK 0x000000
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/*
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* Enable pins: RGMII, and SDRAM GPIO pins 24-51
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* Rising edge: IN_5V, DOCK_SENSE and LAN_WAN_SWITCH
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* Falling edge: IN_5V, DOCK_SENSE and LAN_WAN_SWITCH
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*/
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#define GPIO_TR_PIN_MASK_24_51 0x0affff3f
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#define GPIO_TR_OUTPUT_PIN_MASK_24_51 0x00ffff07
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#define GPIO_TR_INT_PIN_MASK_24_51 0x02000010
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#define GPIO_TR_INT_FEDGE_PIN_MASK_24_51 0x02000010
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#define GPIO_TR_POL_MASK_24_51 0x00000000
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#define WPS_BUTTON 0 /* input, interrupt */
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/* UARTF Block */
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#define POWER_EN_3G 7
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#define POWER_EN_WIMAX 8
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#define POWER_ON 9
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#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */
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#define NC_4 11
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#define USB_SW1 12
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#define USB_SW2 13
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#define POWER_OFF_BUTTON 14 /* input, interrupt */
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/* UARTL Block */
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#define NC_6 15
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#define DOCK_SENSE 16 /* input, interrupt */
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/* SDRAM block */
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#define DOCK_5V_ENA 24
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#define USB5V_EN 25
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#define CHARGER_OFF 26 /* 1 : charger on, 0 : charger off */
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#define PA_OR_PC_IN 27 /* input */
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#define IN_5V 28 /* input, interrupt */
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#define CHRGB 29 /* input, NI for P1 board */
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#define NC_1 30
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#define NC_2 31
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#define LED_BATT_7 32
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#define LED_BATT_8 33
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#define LED_BATT_9 34
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#define LED_BATT_10 35
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#define LED_SS_11 36
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#define LED_SS_12 37
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#define LED_SS_13 38
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#define LED_SS_14 39
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/* RGMII block */
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#define LED_WPS 40
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#define LED_WIFI 41
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#define LED_CHARGE 42
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#define LED_POWER 43
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#define LED_WIMAX 44
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#define LED_3G 45
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#define POWER_ON_LATCH 46
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#define HUB_RST 47
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#define NC_3 48
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#define LAN_WAN_SW 49 /* input, interrupt */
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#define NC_5 50
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#define PUCK_BATTERY_LOW 51
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/*
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* Debounced pins:
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* WPS_BUTTON, POWER_OFF_BUTTON, DOCK_SENSE, IN_5V, LAN_WAN_SW
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*/
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#define DEBOUNCED_PINS 5
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#define GPIO_PIN_MASK GPIO_TR_PIN_MASK
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#define GPIO_OUTPUT_PIN_MASK GPIO_TR_OUTPUT_PIN_MASK
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#define GPIO_INT_PIN_MASK GPIO_TR_INT_PIN_MASK
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#define GPIO_INT_FEDGE_PIN_MASK GPIO_TR_INT_FEDGE_PIN_MASK
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#define GPIO_POL_MASK GPIO_TR_POL_MASK
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#define GPIO_PIN_MASK_24_51 GPIO_TR_PIN_MASK_24_51
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#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_TR_OUTPUT_PIN_MASK_24_51
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#define GPIO_INT_PIN_MASK_24_51 GPIO_TR_INT_PIN_MASK_24_51
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#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_TR_INT_FEDGE_PIN_MASK_24_51
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#define GPIO_POL_MASK_24_51 GPIO_TR_POL_MASK_24_51
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#define GPIO_PIN_MASK_72_95 0
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#define GPIO_OUTPUT_PIN_MASK_72_95 0
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#define GPIO_INT_PIN_MASK_72_95 0
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#define GPIO_INT_FEDGE_PIN_MASK_72_95 0
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#define GPIO_POL_MASK_72_95 0
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#endif /* !TABLEROCK */
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#if defined(PEBBLES500) || defined(PEBBLES35)
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/*
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* Enable pins: I2C, UART Full, and GPIO0 pins 0-23
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* Rising edge: ?
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* Falling edge: buttons
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*/
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#define GPIO_PB500_PIN_MASK 0x005d83
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#define GPIO_PB500_OUTPUT_PIN_MASK 0x000083
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#define GPIO_PB500_INT_PIN_MASK 0x005c00
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#define GPIO_PB500_INT_FEDGE_PIN_MASK 0x000500
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#define GPIO_PB500_POL_MASK 0x000000
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/* Enable RGMII */
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#define P3_HARDWARE
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#if defined(P3_HARDWARE)
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#define GPIO_PB500_PIN_MASK_24_51 0x03cafe00
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#define GPIO_PB500_OUTPUT_PIN_MASK_24_51 0x03c8fe00
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#else
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#define GPIO_PB500_PIN_MASK_24_51 0x0fff0000
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#define GPIO_PB500_OUTPUT_PIN_MASK_24_51 0x0ffd0000
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#endif
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#define GPIO_PB500_INT_PIN_MASK_24_51 0x00020000 /* rising edge ints */
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#define GPIO_PB500_INT_FEDGE_PIN_MASK_24_51 0x00020000
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#define GPIO_PB500_POL_MASK_24_51 0x00000000
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/* I2C block */
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#define POWER_EN_EXCARD1_3_3v 1
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#define POWER_EN_EXCARD1_1_5v 2
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/* UARTF Block */
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#define VBUS_EN 7
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#define WPS_BUTTON 8 /* input, interrupt */
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#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */
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#define CURRENT_LIMIT_FLAG1_3_3v 11 /* input, interrupt */
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#define CURRENT_LIMIT_FLAG_USB1 12 /* input, interrupt */
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#define CURRENT_LIMIT_FLAG1_1_5v 14 /* input, interrupt */
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/* SDRAM block */
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#if defined(P3_HARDWARE)
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#define LAN_WAN 33
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#define LED_WIFI 34
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#define LED_WPS 35
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#define LED_USB 36
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#define LED_USB_RED 37
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#if defined(PEBBLES500)
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#define LED_EXP 38
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#define LED_EXP_RED 39
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#endif
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#else /* P3_HARDWARE */
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#define LED_WPS 45
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#define LED_WIFI 42
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#define LED_USB 40
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#define LED_USB_RED 44
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#if defined(PEBBLES500)
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#define LED_EXP 50
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#define LED_EXP_RED 51
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#endif
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#endif /* P3_HARDWARE */
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/* RGMII block */
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#define EXCARD_ATTACH 41 /* input, interrupt */
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#define POWER_EN_USB 43
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#if defined(PEBBLES500)
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#define LED_SS_13 46
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#define LED_SS_12 47
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#define LED_SS_11 48
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#define LED_SS_10 49
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#endif
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/*
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* Debounced Pins:
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* WPS_BUTTON, SOFT_RST_IN_BUTTON, CURRENT_LIMIT_FLAG_USB,
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* CURRENT_LIMIT_FLAG3_3, CURRENT_LIMIT_FLAG1_5, EXCARD_ATTACH
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*/
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#define DEBOUNCED_PINS 6
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#define GPIO_PIN_MASK GPIO_PB500_PIN_MASK
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#define GPIO_OUTPUT_PIN_MASK GPIO_PB500_OUTPUT_PIN_MASK
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#define GPIO_INT_PIN_MASK GPIO_PB500_INT_PIN_MASK
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#define GPIO_INT_FEDGE_PIN_MASK GPIO_PB500_INT_FEDGE_PIN_MASK
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#define GPIO_POL_MASK GPIO_PB500_POL_MASK
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#define GPIO_PIN_MASK_24_51 GPIO_PB500_PIN_MASK_24_51
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#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_PB500_OUTPUT_PIN_MASK_24_51
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#define GPIO_INT_PIN_MASK_24_51 GPIO_PB500_INT_PIN_MASK_24_51
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#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_PB500_INT_FEDGE_PIN_MASK_24_51
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#define GPIO_POL_MASK_24_51 GPIO_PB500_POL_MASK_24_51
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#define GPIO_PIN_MASK_72_95 0
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#define GPIO_OUTPUT_PIN_MASK_72_95 0
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#define GPIO_INT_PIN_MASK_72_95 0
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#define GPIO_INT_FEDGE_PIN_MASK_72_95 0
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#define GPIO_POL_MASK_72_95 0
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#endif /* TABLEROCK || SPOT2 || PUCK || MOAB */
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#if defined(SLICKROCK)
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/*
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* Enable: I2C, UART Full, and GPIO0 pins 0-23
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* Rising edge: buttons, overcurrent, switch
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* Falling edge: buttons, overcurrent, switch
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*/
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#define GPIO_SR_PIN_MASK 0x007fcf
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#define GPIO_SR_OUTPUT_PIN_MASK 0x00128d
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#define GPIO_SR_INT_PIN_MASK 0x006d42
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#define GPIO_SR_INT_FEDGE_PIN_MASK 0x006c42
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#define GPIO_SR_POL_MASK 0x000002
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/* Enable RGMII */
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#define GPIO_SR_PIN_MASK_24_51 0x0000387f
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#define GPIO_SR_OUTPUT_PIN_MASK_24_51 0x0000387b
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#define GPIO_SR_INT_PIN_MASK_24_51 0x0004
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#define GPIO_SR_INT_FEDGE_PIN_MASK_24_51 0x0004
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#define GPIO_SR_POL_MASK_24_51 0x00000000
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#define GPIO_SR_PIN_MASK_72_95 0x00000fff
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#define GPIO_SR_OUTPUT_PIN_MASK_72_95 0x00000ff7
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#define GPIO_SR_INT_PIN_MASK_72_95 0x0008
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#define GPIO_SR_INT_FEDGE_PIN_MASK_72_95 0x0008
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#define GPIO_SR_POL_MASK_72_95 0x00000000
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#define LED_USB2_G 0
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/* I2C block */
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#define WIFI_ENABLE 1
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#define EX2_CPUSB_RST 2
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/* SPI block */
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#define POWER_EN_USB3 3
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#define CURRENT_LIMIT_FLAG_USB3 6 /* input, interrupt */
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/* UARTF Block */
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#define EX1_CPUSB_RST 7
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#define SS_BUTTON 8 /* input, interrupt */
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#define POWER_EN_USB1 9
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#define SOFT_RST_IN_BUTTON 10 /* input, interrupt */
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#define CURRENT_LIMIT_FLAG_USB2 11 /* input, interrupt */
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#define POWER_EN_USB2 12
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#define CURRENT_LIMIT_FLAG_EX2 13 /* input, interrupt */
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/* (pin 76 on P1 boards) */
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#define CURRENT_LIMIT_FLAG_USB1 14 /* input, interrupt */
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/* GPIO */
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#define LED_USB1_G 24
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#define LED_USB1_R 25
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#define WPS_BUTTON 26
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#define LED_EX1_R 27
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#define LED_EX2_G 28
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#define LED_EX2_R 29
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#define LED_WIFI_RED 30
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/* LNA_PE_Gx */
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#define LED_USB3_G 35
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#define LED_USB3_R 36
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#define LED_EX1_G 37
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/* RGMII2 */
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#define POWER_EN_EX1 74
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#define CURRENT_LIMIT_FLAG_EX1 75 /* input, interrupt */
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#define LED_USB2_R 76
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#define POWER_EN_EX2 77
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#define LED_POWER 78
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#define LED_WPS 79
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#define LED_WIFI_BLUE 82
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#define LED_WIFI 83
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#define LED_SS_10 73
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#define LED_SS_11 80
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#define LED_SS_12 81
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#define LED_SS_13 72
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/* Debounced Pins:
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* WPS_BUTTON, SOFT_RST_IN_BUTTON, SS_BUTTON
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* CURRENT_LIMIT_FLAG USB * 3 + EXP * 2
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*/
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#define DEBOUNCED_PINS 9
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#define GPIO_PIN_MASK GPIO_SR_PIN_MASK
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#define GPIO_OUTPUT_PIN_MASK GPIO_SR_OUTPUT_PIN_MASK
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#define GPIO_INT_PIN_MASK GPIO_SR_INT_PIN_MASK
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#define GPIO_INT_FEDGE_PIN_MASK GPIO_SR_INT_FEDGE_PIN_MASK
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#define GPIO_POL_MASK GPIO_SR_POL_MASK
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#define GPIO_PIN_MASK_24_51 GPIO_SR_PIN_MASK_24_51
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#define GPIO_OUTPUT_PIN_MASK_24_51 GPIO_SR_OUTPUT_PIN_MASK_24_51
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#define GPIO_INT_PIN_MASK_24_51 GPIO_SR_INT_PIN_MASK_24_51
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#define GPIO_INT_FEDGE_PIN_MASK_24_51 GPIO_SR_INT_FEDGE_PIN_MASK_24_51
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#define GPIO_POL_MASK_24_51 GPIO_SR_POL_MASK_24_51
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#define GPIO_PIN_MASK_72_95 GPIO_SR_PIN_MASK_72_95
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#define GPIO_OUTPUT_PIN_MASK_72_95 GPIO_SR_OUTPUT_PIN_MASK_72_95
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#define GPIO_INT_PIN_MASK_72_95 GPIO_SR_INT_PIN_MASK_72_95
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#define GPIO_INT_FEDGE_PIN_MASK_72_95 GPIO_SR_INT_FEDGE_PIN_MASK_72_95
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#define GPIO_POL_MASK_72_95 GPIO_SR_POL_MASK_72_95
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#endif /* SLICKROCK */
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/* Exported functions */
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extern int ra_gpio_pin_read(void *arg, int pin);
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extern void ra_gpio_pin_write(void *arg, int pin, int value);
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/* Kernel Events (platform-neutral) */
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#define WPS_BUTTON_EVT 1
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#define RESET_BUTTON_EVT 2
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#define POWER_BUTTON_EVT 3
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#define IN_5V_EVT 4
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#if 0
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#define PWR_FLAG_3G_EVT 5
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#endif
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#define DOCK_SENSE_EVT 6
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#define LAN_WAN_SW_EVT 7
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#define WIFI_ENABLE_EVT 8
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#define SS_BUTTON_EVT 9
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#define CURRENT_LIMIT_EVT 10
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#define EXCARD_ATTACH_EVT 11
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#endif /* _RALINK_GPIO_H_ */
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