pk 8a5023e38c After writing to the IOMMU flush registers, read something back from
IOMMU control space to a flush register to drain internal write buffers (?).
This avoids utter lossage on some machines (SS4s & SS5s) where our caller
would see some of its local (`%lx') registers trashed. This is probably
caused by a silicon bug allowing interference on internal data paths..
1998-01-24 16:22:47 +00:00
..
1998-01-13 02:26:06 +00:00
1998-01-23 19:27:44 +00:00
1998-01-20 12:34:35 +00:00