94 lines
4.3 KiB
C
94 lines
4.3 KiB
C
/* $NetBSD: inphyreg.h,v 1.5 2008/04/28 20:23:53 martin Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_MII_INPHYREG_H_
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#define _DEV_MII_INPHYREG_H_
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/*
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* Intel 82555 registers.
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*/
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#define MII_INPHY_SCR 0x10 /* Status and Control */
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#define SCR_FLOWCTL 0x8000 /* PHY Base flow control enabled */
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#define SCR_CSDC 0x2000 /* Carrier sense disconnect control */
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#define SCR_TFCD 0x1000 /* Transmit flow control disable */
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#define SCR_RDSI 0x0800 /* Receive deserializer in-sync */
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#define SCR_100TXPD 0x0400 /* 100baseTX is powered down */
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#define SCR_10TPD 0x0200 /* 10baseT is powered down */
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#define SCR_POLARITY 0x0100 /* reverse 10baseT polarity */
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#define SCR_T4 0x0004 /* autoneg resulted in 100baseT4 */
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#define SCR_S100 0x0002 /* autoneg resulted in 100baseTX */
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#define SCR_FDX 0x0001 /* autoneg resulted in full-duplex */
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#define MII_INPHY_SCTRL 0x11 /* Special Control Bit */
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#define SCTRL_SCRBYPASS 0x8000 /* scrambler bypass */
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#define SCTRL_4B5BNYPASS 0x4000 /* 4bit to 5bit bypass */
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#define SCTRL_FTHP 0x2000 /* force transmit H-pattern */
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#define SCTRL_F34TP 0x1000 /* force 34 transmit patter */
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#define SCTRL_GOODLINK 0x0800 /* 100baseTX link good */
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#define SCTRL_TCSD 0x0200 /* transmit carrier sense disable */
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#define SCTRL_DDPD 0x0100 /* disable dynamic power-down */
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#define SCTRL_ANEGLOOP 0x0080 /* autonegotiation loopback */
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#define SCTRL_MDITRISTATE 0x0040 /* MDI Tri-state */
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#define SCTRL_FILTERBYPASS 0x0020 /* Filter bypass */
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#define SCTRL_AUTOPOLDIS 0x0010 /* auto-polarity disable */
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#define SCTRL_SQUELCHDIS 0x0008 /* squlch test disable */
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#define SCTRL_EXTSQUELCH 0x0004 /* extended sequelch enable */
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#define SCTRL_LINKINTDIS 0x0002 /* link integrity disable */
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#define SCTRL_JABBERDIS 0x0001 /* jabber disabled */
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#define MII_INPHY_100TXRDC 0x14 /* 100baseTX Receive Disconnect Cntr */
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#define MII_INPHY_100TXREFC 0x15 /* 100baseTX Receive Error Frame Ctr */
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#define MII_INPHY_RSEC 0x16 /* Receive Symbol Error Counter */
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#define MII_INPHY_100TXRPEOFC 0x17 /* 100baseTX Rcv Premature EOF Ctr */
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#define MII_INPHY_10TREOFC 0x18 /* 10baseT Rcv EOF Ctr */
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#define MII_INPHY_10TTJDC 0x19 /* 10baseT Tx Jabber Detect Ctr */
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#define MII_INPHY_SCTRL2 0x1b /* 82555 Special Control */
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#define SCTRL2_LEDMASK 0x0007 /* mask of LEDs control: see below */
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#define LEDMASK_ACTLINK 0x0000 /* A = Activity, L = Link */
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#define LEDMASK_SPDCOLL 0x0001 /* A = Speed, L = Collision */
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#define LEDMASK_SPDLINK 0x0002 /* A = Speed, L = Link */
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#define LEDMASK_ACTCOLL 0x0003 /* A = Activity, L = Collision */
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#define LEDMASK_OFFOFF 0x0004 /* A = off, L = off */
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#define LEDMASK_OFFON 0x0005 /* A = off, L = on */
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#define LEDMASK_ONOFF 0x0006 /* A = on, L = off */
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#define LESMASK_ONON 0x0007 /* A = on, L = on */
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#endif /* _DEV_MII_INPHYREG_H_ */
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