60 lines
2.4 KiB
C
60 lines
2.4 KiB
C
/* $NetBSD: s3c2800_intr.h,v 1.3 2003/08/04 12:34:08 bsh Exp $ */
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/*
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* Copyright (c) 2002 Fujitsu Component Limited
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* Copyright (c) 2002 Genetec Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of The Fujitsu Component Limited nor the name of
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* Genetec corporation may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
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* CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
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* CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _S3C2800_INTR_H_
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#define _S3C2800_INTR_H_
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#define ARM_IRQ_HANDLER _C_LABEL(s3c2800_irq_handler)
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#ifndef _LOCORE
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#include <arm/s3c2xx0/s3c2800reg.h>
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/*
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* on S3C2800's interrupt controller, interrupt source bits 9, and 29..31 are
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* reserved. we map software interrupts to those unused bits.
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*/
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#define SI_TO_IRQBIT(si) ((si)==SI_SOFTSERIAL? (1<<9) : (1U<<(ICU_LEN+(si))))
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#define get_pending_softint() (softint_pending & intr_mask)
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#define update_softintr_mask() /* empty */
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#define s3c2xx0_update_hw_mask() \
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(*s3c2xx0_intr_mask_reg = intr_mask & global_intr_mask)
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#include <arm/s3c2xx0/s3c2xx0_intr.h>
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#endif /* ! _LOCORE */
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#endif /* _S3C2800_INTR_H_ */
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