245 lines
7.2 KiB
C
245 lines
7.2 KiB
C
/* $NetBSD: nvram.h,v 1.8 2012/10/27 17:18:08 chs Exp $ */
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/*-
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* Copyright (c) 2006 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Tim Rightnour
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Based on the PowerPC Reference Platform NVRAM Specification.
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* Document Number: PPS-AR-FW0002
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* Jan 22, 1996
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* Version 0.3
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*/
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#ifndef _MACHINE_NVRAM_H
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#define _MACHINE_NVRAM_H
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#if defined(_KERNEL)
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/* for the motorola machines */
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#include <dev/ic/mk48txxvar.h>
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#endif
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#define MAX_PREP_NVRAM 0x8000 /* maxmum size of the nvram */
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#define NVSIZE 4096 /* standard nvram size */
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#define OSAREASIZE 512 /* size of OSArea space */
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#define CONFSIZE 1024 /* guess at size of configuration area */
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/*
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* The security fields are maintained by the firmware, and should be
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* considered read-only.
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*/
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typedef struct _SECURITY {
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uint32_t BootErrCnt; /* count of boot password errors */
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uint32_t ConfigErrCnt; /* count of config password errors */
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uint32_t BootErrorDT[2];/* Date&Time from RTC of last error in pw */
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uint32_t ConfigErrorDT[2]; /* last config pw error */
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uint32_t BootCorrectDT[2]; /* last correct boot pw */
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uint32_t ConfigCorrectDT[2]; /* last correct config pw */
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uint32_t BootSetDT[2]; /* last set of boot pw */
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uint32_t ConfigSetDT[2]; /* last set of config pw */
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uint8_t Serial[16]; /* Box serial number */
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} SECURITY;
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typedef enum _ERROR_STATUS {
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Clear = 0, /* empty entry */
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Pending = 1,
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DiagnosedOK = 2,
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DiagnosedFail = 3,
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Overrun = 4,
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Logged = 5,
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} ERROR_STATUS;
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typedef enum _OS_ID {
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Unknown = 0,
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Firmware = 1,
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AIX = 2,
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NT = 3,
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WPOS2 = 4,
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WPX = 5,
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Taligent = 6,
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Solaris = 7,
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Netware = 8,
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USL = 9,
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Low_End_Client = 10,
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SCO = 11,
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MK = 12, /* from linux ?? */
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} OS_ID;
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/*
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* According to IBM, if severity is severe, the OS should not boot. It should
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* instead run diags. Umm.. whatever.
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*/
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typedef struct _ERROR_LOG {
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uint8_t Status; /* ERROR_STATUS */
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uint8_t Os; /* OS_ID */
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uint8_t Type; /* H=hardware S=software */
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uint8_t Severity; /* S=servere E=Error */
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uint32_t ErrDT[2]; /* date and time from RTC */
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uint8_t code[8]; /* error code */
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union {
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uint8_t detail[20]; /* detail of error */
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} data;
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} ERROR_LOG;
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typedef enum _BOOT_STATUS {
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BootStarted = 0x01,
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BootFinished = 0x02,
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RestartStarted = 0x04,
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RestartFinished = 0x08,
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PowerFailStarted = 0x10,
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PowerFailFinished = 0x20,
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ProcessorReady = 0x40,
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ProcessorRunning = 0x80,
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ProcessorStart = 0x0100
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} BOOT_STATUS;
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/*
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* If the OS decided to store data in the os area of NVRAM, this tells us
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* the last user, so we can decide if we want to re-use it or nuke it.
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* I'm not sure what all of these do yet.
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*/
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typedef struct _RESTART_BLOCK {
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uint16_t Version;
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uint16_t Revision;
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uint32_t BootMasterId;
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uint32_t ProcessorId;
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volatile uint32_t BootStatus;
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uint32_t CheckSum; /* Checksum of RESTART_BLOCK */
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void *RestartAddress;
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void *SaveAreaAddr;
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uint32_t SaveAreaLength;
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} RESTART_BLOCK;
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typedef enum _OSAREA_USAGE {
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Empty = 0,
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Used = 1,
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} OSAREA_USAGE;
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typedef enum _PM_MODE {
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Suspend = 0x80, /* part of state is in memory */
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DirtyBit = 0x01, /* used to decide if pushbutton needs to be checked */
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Hibernate = 0, /* nothing is in memory */
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} PMMODE;
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typedef struct _HEADER {
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uint16_t Size; /* NVRAM size in K(1024) */
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uint8_t Version; /* Structure map different */
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uint8_t Revision; /* Structure map same */
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uint16_t Crc1; /* checksum from beginning of nvram to OSArea*/
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uint16_t Crc2; /* cksum of config */
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uint8_t LastOS; /* OS_ID */
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uint8_t Endian; /* B if BE L if LE */
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uint8_t OSAreaUSage; /* OSAREA_USAGE */
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uint8_t PMMode; /* Shutdown mode */
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RESTART_BLOCK RestartBlock;
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SECURITY Security;
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ERROR_LOG ErrorLog[2];
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/* Global Environment info */
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void *GEAddress;
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uint32_t GELength;
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uint32_t GELastWRiteDT[2]; /* last change to GE area */
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/* Configuration info */
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void *ConfigAddress;
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uint32_t ConfigLength;
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uint32_t ConfigLastWriteDT[2]; /* last change to config area */
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uint32_t ConfigCount; /* count of entries in configuration */
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/* OS Dependent temp area */
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void *OSAreaAddress;
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uint32_t OSAreaLength;
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uint32_t OSAreaLastWriteDT[2]; /* last change to OSArea */
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} HEADER;
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typedef struct _NVRAM_MAP {
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HEADER Header;
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uint8_t GEArea[NVSIZE - CONFSIZE - OSAREASIZE - sizeof(HEADER)];
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uint8_t OSArea[OSAREASIZE];
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uint8_t ConfigArea[CONFSIZE];
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} NVRAM_MAP;
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struct pnviocdesc {
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int pnv_namelen; /* len of pnv_name */
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char *pnv_name; /* node name */
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int pnv_buflen; /* len of pnv_bus */
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char *pnv_buf; /* option value result */
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int pnv_num; /* number of something */
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};
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#define DEV_NVRAM 0
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#define DEV_RESIDUAL 1
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#if defined(_KERNEL)
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struct prep_mk48txx_softc {
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device_t *sc_dev;
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bus_space_tag_t sc_bst; /* bus tag & handle */
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bus_space_handle_t sc_bsh; /* */
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struct todr_chip_handle sc_handle; /* TODR handle */
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const char *sc_model; /* chip model name */
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bus_size_t sc_nvramsz; /* Size of NVRAM on the chip */
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bus_size_t sc_clkoffset; /* Offset in NVRAM to clock bits */
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u_int sc_year0; /* What year is represented on
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the system by the chip's year
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counter at 0 */
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u_int sc_flag;
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#define MK48TXX_NO_CENT_ADJUST 0x0001
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mk48txx_nvrd_t sc_nvrd; /* NVRAM/RTC read function */
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mk48txx_nvwr_t sc_nvwr; /* NVRAM/RTC write function */
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bus_space_tag_t sc_data;
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bus_space_handle_t sc_datah;
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};
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struct nvram_pnpbus_softc {
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bus_space_tag_t sc_iot; /* io space tag */
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bus_space_tag_t sc_as; /* addr line */
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bus_space_handle_t sc_ash;
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bus_space_handle_t sc_ashs[2];
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bus_space_tag_t sc_data; /* data line */
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bus_space_handle_t sc_datah;
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/* clock bits for mk48txx */
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struct prep_mk48txx_softc sc_mksc; /* mk48txx softc */
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u_char sc_open; /* single use device */
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};
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#endif /* _KERNEL */
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#define PNVIOCGET _IOWR('O', 1, struct pnviocdesc) /* get var contents */
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#define PNVIOCGETNEXTNAME _IOWR('O', 2, struct pnviocdesc) /* get next var */
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#define PNVIOCGETNUMGE _IOWR('O', 3, struct pnviocdesc) /* get nrof vars */
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#define PNVIOCSET _IOW('O', 4, struct pnviocdesc) /* set nvram var */
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#endif /* _MACHINE_NVRAM_H */
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