335 lines
8.9 KiB
C
335 lines
8.9 KiB
C
/* $NetBSD: obio.c,v 1.10 2011/07/01 20:42:37 dyoung Exp $ */
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/*
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* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec Corporation may not be used to endorse or
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* promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* TODO: dispatch interrupt to SOFTSERIAL or SOFTNET according to requested
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* interrupt level.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.10 2011/07/01 20:42:37 dyoung Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/reboot.h>
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#include <machine/cpu.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <arm/cpufunc.h>
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#include <arm/mainbus/mainbus.h>
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#include <arm/xscale/pxa2x0reg.h>
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#include <arm/xscale/pxa2x0var.h>
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#include <arm/xscale/pxa2x0_gpio.h>
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#include <arm/sa11x0/sa11x0_var.h>
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#include <evbarm/lubbock/lubbock_reg.h>
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#include <evbarm/lubbock/lubbock_var.h>
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#include "locators.h"
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/* prototypes */
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static int obio_match(device_t, cfdata_t, void *);
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static void obio_attach(device_t, device_t, void *);
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static int obio_search(device_t, cfdata_t, const int *, void *);
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static int obio_print(void *, const char *);
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/* attach structures */
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CFATTACH_DECL_NEW(obio, sizeof(struct obio_softc), obio_match, obio_attach,
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NULL, NULL);
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uint32_t obio_intr_mask;
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static int
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obio_spurious(void *arg)
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{
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int irqno = (int)arg;
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aprint_normal("Spurious interrupt %d on On-board peripheral", irqno);
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return 1;
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}
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/*
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* interrupt handler for GPIO0 (on-board peripherals)
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*
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* On Lubbock, 8 interrupts are ORed through on-board logic,
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* and routed to GPIO0 of PXA250 processor.
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*/
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static int
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obio_intr(void *arg)
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{
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int irqno, pending, mask;
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struct obio_softc *sc = (struct obio_softc *)arg;
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int psw;
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mask = sc->sc_obio_intr_mask; /* real irq mask for obio */
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psw = disable_interrupts(I32_bit|F32_bit);
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pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRCTL);
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/* Here is a chance to lose some interrupts.
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* You need to modify FPGA program to avoid it
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*/
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bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRCTL, 0);
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restore_interrupts(psw);
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pending &= mask;
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while (pending) {
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irqno = 0;
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for ( ;pending; ++irqno) {
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if (0 == (pending & (1U<<irqno)))
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continue;
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pending &= ~(1U<<irqno);
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#ifdef notyet
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/* if ipl of this irq is higher than current spl level,
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call the handler directly instead of dispatching it to
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software interrupt. */
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if (sc->sc_handler[irqno].level > curcpl()) {
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(* sc->sc_handler[irqno].func)(
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sc->sc_handler[irqno].arg );
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}
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else
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#endif
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{
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/* mask this interrupt until software
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interrupt is handled. */
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sc->sc_obio_intr_pending |= (1U<<irqno);
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mask &= ~(1U<<irqno);
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bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRMASK, mask);
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/* handle it later */
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softint_schedule(sc->sc_si);
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}
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}
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psw = disable_interrupts(I32_bit|F32_bit);
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pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRCTL);
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bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRCTL,0);
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restore_interrupts(psw);
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pending &= mask;
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}
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/* GPIO interrupt is edge triggered. make a pulse
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to let Cotulla notice when other interrupts are
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still pending */
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bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, mask);
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return 1;
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}
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static void
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obio_softintr(void *arg)
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{
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struct obio_softc *sc = (struct obio_softc *)arg;
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int irqno;
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int psw;
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int spl_save = curcpl();
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psw = disable_interrupts(I32_bit);
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while ((irqno = find_first_bit(sc->sc_obio_intr_pending)) >= 0) {
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sc->sc_obio_intr_pending &= ~(1U<<irqno);
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restore_interrupts(psw);
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_splraise(sc->sc_handler[irqno].level);
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(* sc->sc_handler[irqno].func)(
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sc->sc_handler[irqno].arg);
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splx(spl_save);
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psw = disable_interrupts(I32_bit);
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}
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bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
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restore_interrupts(psw);
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}
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/*
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* int obio_print(void *aux, const char *name)
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* print configuration info for children
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*/
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static int
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obio_print(void *aux, const char *name)
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{
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struct obio_attach_args *oba = (struct obio_attach_args*)aux;
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if (oba->oba_addr != OBIOCF_ADDR_DEFAULT)
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aprint_normal(" addr 0x%lx", oba->oba_addr);
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if (oba->oba_intr > 0)
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aprint_normal(" intr %d", oba->oba_intr);
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return (UNCONF);
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}
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int
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obio_match(device_t parent, cfdata_t match, void *aux)
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{
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return 1;
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}
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void
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obio_attach(device_t parent, device_t self, void *aux)
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{
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struct obio_softc *sc = device_private(self);
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int system_id, baseboard_id, expansion_id, processor_card_id;
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struct pxaip_attach_args *sa = (struct pxaip_attach_args *)aux;
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const char *processor_card_name;
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int i;
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/* Map on-board FPGA registers */
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sc->sc_dev = self;
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sc->sc_iot = &pxa2x0_bs_tag;
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if (bus_space_map(sc->sc_iot, LUBBOCK_OBIO_PBASE, LUBBOCK_OBIO_SIZE,
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0, &(sc->sc_obioreg_ioh))) {
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aprint_normal_dev(self, "can't map FPGA registers\n");
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}
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system_id = bus_space_read_4(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_SYSTEMID);
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baseboard_id = (system_id>>8) & 0x0f;
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expansion_id = (system_id>>4) & 0x0f;
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processor_card_id = system_id & 0x0f;
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switch (processor_card_id) {
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case 0: processor_card_name = "Cotulla"; break;
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case 1: processor_card_name = "Sabinal"; break;
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default: processor_card_name = "(unknown)";
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}
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printf(" : baseboard=%d (%s), expansion card=%d, processor card=%d (%s)\n",
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baseboard_id,
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baseboard_id==8 ? "DBPXA250(lubbock)" : "(unknown)",
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expansion_id,
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processor_card_id, processor_card_name );
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/*
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* Mask all interrupts.
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* They are later unmasked at each device's attach routine.
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*/
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bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRMASK,0);
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sc->sc_intr = sa->pxa_intr; /* irq no. on ICU. */
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sc->sc_obio_intr_mask = 0; /* No interrupt used */
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sc->sc_obio_intr_pending = 0;
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sc->sc_ipl = IPL_BIO;
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for (i=0; i < N_OBIO_IRQ; ++i) {
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sc->sc_handler[i].func = obio_spurious;
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sc->sc_handler[i].arg = (void *)i;
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}
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/*
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* establish interrupt handler.
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*/
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#if 0
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/*
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* level is lowest at first, and changed when
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* sub-interrupt handlers are established
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*/
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sc->sc_ipl = IPL_BIO;
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#else
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/*
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* level is very high to allow high priority sub-interrupts.
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*/
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sc->sc_ipl = IPL_AUDIO;
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#endif
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sc->sc_ih = pxa2x0_gpio_intr_establish(0, IST_EDGE_FALLING, sc->sc_ipl,
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obio_intr, sc);
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sc->sc_si = softint_establish(SOFTINT_NET, obio_softintr, sc);
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/*
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* Attach each devices
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*/
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config_search_ia(obio_search, self, "obio", NULL);
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}
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int
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obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
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{
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struct obio_softc *sc = device_private(parent);
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struct obio_attach_args oba;
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oba.oba_sc = sc;
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oba.oba_iot = sc->sc_iot;
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oba.oba_addr = cf->cf_loc[OBIOCF_ADDR];
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oba.oba_intr = cf->cf_loc[OBIOCF_INTR];
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if (config_match(parent, cf, &oba))
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config_attach(parent, cf, &oba, obio_print);
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return 0;
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}
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void *
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obio_intr_establish(struct obio_softc *sc,
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int irq, int ipl, int (*func)(void *), void *arg)
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{
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int psw;
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if (irq < 0 || N_OBIO_IRQ <= irq)
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panic("Bad irq no for obio");
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psw = disable_interrupts(I32_bit);
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sc->sc_handler[irq].func = func;
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sc->sc_handler[irq].arg = arg;
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sc->sc_handler[irq].level = ipl;
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#ifdef notyet
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if (ipl > sc->sc_ipl) {
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pxa2x0_update_intr_masks(sc->sc_intr, ipl);
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sc->sc_ipl = ipl;
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}
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#endif
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sc->sc_obio_intr_mask |= (1U << irq);
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bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
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LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
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enable_interrupts(psw);
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return &sc->sc_handler[irq];
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}
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