1472 lines
43 KiB
C
1472 lines
43 KiB
C
/* $NetBSD: rpc_machdep.c,v 1.7 1998/06/09 01:57:42 tv Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* machdep.c
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*
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* Machine dependant functions for kernel setup
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*
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* This file needs a lot of work.
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*
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* Created : 17/09/94
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/reboot.h>
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#include <sys/callout.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/kernel.h>
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#include <sys/mbuf.h>
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#include <sys/msgbuf.h>
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#include <sys/buf.h>
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#include <sys/map.h>
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#include <sys/exec.h>
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#include <sys/mount.h>
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#include <sys/vnode.h>
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#include <sys/device.h>
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#include <sys/syscallargs.h>
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#ifdef SYSVMSG
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#include <sys/msg.h>
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#endif
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#ifdef SYSVSEM
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#include <sys/sem.h>
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#endif
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#ifdef SYSVSHM
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#include <sys/shm.h>
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#endif
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#include <dev/cons.h>
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#include <machine/db_machdep.h>
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#include <ddb/db_sym.h>
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#include <ddb/db_extern.h>
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#include <vm/vm_kern.h>
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#include <machine/signal.h>
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#include <machine/frame.h>
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#include <machine/bootconfig.h>
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#include <machine/cpu.h>
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#include <machine/io.h>
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#include <machine/irqhandler.h>
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#include <machine/katelib.h>
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#include <machine/pte.h>
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#include <machine/vidc.h>
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#include <machine/vconsole.h>
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#include <machine/undefined.h>
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#include <machine/rtc.h>
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#include <arm32/iomd/iomdreg.h>
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#include "ipkdb.h"
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#ifdef HYDRA
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#include "hydrabus.h"
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#endif /* HYDRA */
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/*
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* Address to call from cpu_reset() to reset the machine.
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* This is machine architecture dependant as it varies depending
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* on where the ROM appears when you turn the MMU off.
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*/
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u_int cpu_reset_address = 0;
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BootConfig bootconfig; /* Boot config storage */
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videomemory_t videomemory; /* Video memory descriptor */
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vm_offset_t physical_start;
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vm_offset_t physical_freestart;
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vm_offset_t physical_freeend;
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vm_offset_t physical_end;
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int physical_memoryblock;
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u_int free_pages;
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vm_offset_t pagetables_start;
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int physmem = 0;
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#ifndef PMAP_STATIC_L1S
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int max_processes = 64; /* Default number */
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#endif /* !PMAP_STATIC_L1S */
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u_int videodram_size = 0; /* Amount of DRAM to reserve for video */
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vm_offset_t videodram_start;
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vm_offset_t physical_pt_start;
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vm_offset_t virtual_pt_end;
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typedef struct {
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vm_offset_t physical;
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vm_offset_t virtual;
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} pv_addr_t;
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pv_addr_t systempage;
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pv_addr_t irqstack;
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pv_addr_t undstack;
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pv_addr_t abtstack;
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pv_addr_t kernelstack;
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#if NHYDRABUS > 0
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pv_addr_t hydrascratch;
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#endif /* NHYDRABUS */
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pt_entry_t kernel_pt_table[15];
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char *boot_args;
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vm_offset_t msgbufphys;
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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#ifdef PMAP_DEBUG
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extern int pmap_debug_level;
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#endif /* PMAP_DEBUG */
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#define KERNEL_PT_PAGEDIR 0 /* Page table for mapping proc0 pagetables */
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#define KERNEL_PT_PDE 1 /* Page table for mapping L1 page dirs */
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#define KERNEL_PT_PTE 2 /* */
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#define KERNEL_PT_VMEM 3 /* Page table for mapping video memory */
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#define KERNEL_PT_SYS 4 /* Page table for mapping proc0 zero page */
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#define KERNEL_PT_KERNEL 5 /* Page table for mapping kernel */
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#define KERNEL_PT_VMDATA0 6 /* Page tables for mapping kernel VM */
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#define KERNEL_PT_VMDATA1 7
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#define KERNEL_PT_VMDATA2 8
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#define KERNEL_PT_VMDATA3 9
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#define KERNEL_PT_VMDATA4 10
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#define KERNEL_PT_VMDATA5 11
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#define KERNEL_PT_VMDATA6 12
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#define KERNEL_PT_VMDATA7 13
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#define NUM_KERNEL_PTS 14
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struct user *proc0paddr;
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/* Prototypes */
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void physcon_display_base __P((u_int addr));
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extern void consinit __P((void));
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void map_section __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
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int cacheable));
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void map_pagetable __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
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void map_entry __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
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void map_entry_nc __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
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void map_entry_ro __P((vm_offset_t pt, vm_offset_t va, vm_offset_t pa));
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void pmap_bootstrap __P((vm_offset_t kernel_l1pt, pt_entry_t kernel_ptpt));
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void process_kernel_args __P((void));
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caddr_t allocsys __P((caddr_t v));
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void data_abort_handler __P((trapframe_t *frame));
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void prefetch_abort_handler __P((trapframe_t *frame));
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void undefinedinstruction_bounce __P((trapframe_t *frame));
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void zero_page_readonly __P((void));
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void zero_page_readwrite __P((void));
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extern void dump_spl_masks __P((void));
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extern pt_entry_t *pmap_pte __P((pmap_t pmap, vm_offset_t va));
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extern void db_machine_init __P((void));
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extern void console_flush __P((void));
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extern void vidcconsole_reinit __P((void));
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extern int vidcconsole_blank __P((struct vconsole *vc, int type));
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void rpc_sa110_cc_setup __P((void));
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extern void parse_mi_bootargs __P((char *args));
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void parse_rpc_bootargs __P((char *args));
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extern void dumpsys __P((void));
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extern void hydrastop __P((void));
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extern int cold;
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/*
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* void cpu_reboot(int howto, char *bootstr)
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*
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* Reboots the system
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*
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* Deal with any syncing, unmounting, dumping and shutdown hooks,
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* then reset the CPU.
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*/
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/* NOTE: These variables will be removed, well some of them */
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extern u_int spl_mask;
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extern u_int current_mask;
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extern u_int arm700bugcount;
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void
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cpu_reboot(howto, bootstr)
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int howto;
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char *bootstr;
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{
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#if NHYDRABUS > 0
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/*
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* If we are halting the master then we should halt the slaves :-)
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* otherwise it can get a bit disconcerting to have 4 other
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* processors still tearing away doing things.
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*/
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hydrastop();
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#endif /* NHYDRABUS */
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#ifdef DIAGNOSTIC
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/* info */
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printf("boot: howto=%08x curproc=%p\n", howto, curproc);
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printf("current_mask=%08x spl_mask=%08x\n", current_mask, spl_mask);
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printf("ipl_bio=%08x ipl_net=%08x ipl_tty=%08x ipl_clock=%08x ipl_imp=%08x\n",
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irqmasks[IPL_BIO], irqmasks[IPL_NET], irqmasks[IPL_TTY],
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irqmasks[IPL_CLOCK], irqmasks[IPL_IMP]);
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dump_spl_masks();
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/* Did we encounter the ARM700 bug we discovered ? */
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if (arm700bugcount > 0)
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printf("ARM700 PREFETCH/SWI bug count = %d\n", arm700bugcount);
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#endif /* DIAGNOSTIC */
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/*
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* If we are still cold then hit the air brakes
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* and crash to earth fast
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*/
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if (cold) {
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doshutdownhooks();
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printf("Halted while still in the ICE age.\n");
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printf("The operating system has halted.\n");
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printf("Please press any key to reboot.\n\n");
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cngetc();
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printf("rebooting...\n");
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cpu_reset();
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/*NOTREACHED*/
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}
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/* Disable console buffering */
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cnpollc(1);
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/*
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* If RB_NOSYNC was not specified sync the discs.
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* Note: Unless cold is set to 1 here, syslogd will die during the unmount.
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* It looks like syslogd is getting woken up only to find that it cannot
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* page part of the binary in as the filesystem has been unmounted.
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*/
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if (!(howto & RB_NOSYNC))
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bootsync();
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/* Say NO to interrupts */
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splhigh();
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/* Do a dump if requested. */
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if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
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dumpsys();
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/*
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* Auto reboot overload protection
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*
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* This code stops the kernel entering an endless loop of reboot
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* - panic cycles. This will have the effect of stopping further
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* reboots after it has rebooted 8 times after panics. A clean
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* halt or reboot will reset the counter.
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*/
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/*
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* Have we done 8 reboots in a row ? If so halt rather than reboot
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* since 8 panics in a row without 1 clean halt means something is
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* seriously wrong.
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*/
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if (cmos_read(RTC_ADDR_REBOOTCNT) > 8)
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howto |= RB_HALT;
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/*
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* If we are rebooting on a panic then up the reboot count
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* otherwise reset.
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* This will thus be reset if the kernel changes the boot action from
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* reboot to halt due to too any reboots.
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*/
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if (((howto & RB_HALT) == 0) && panicstr)
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cmos_write(RTC_ADDR_REBOOTCNT,
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cmos_read(RTC_ADDR_REBOOTCNT) + 1);
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else
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cmos_write(RTC_ADDR_REBOOTCNT, 0);
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/*
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* If we need a RiscBSD reboot, request it buy setting a bit in
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* the CMOS RAM. This can be detected by the RiscBSD boot loader
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* during a RISCOS boot. No other way to do this as RISCOS is in ROM.
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*/
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if ((howto & RB_HALT) == 0)
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cmos_write(RTC_ADDR_BOOTOPTS,
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cmos_read(RTC_ADDR_BOOTOPTS) | 0x02);
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/* Run any shutdown hooks */
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doshutdownhooks();
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/* Make sure IRQ's are disabled */
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IRQdisable;
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if (howto & RB_HALT) {
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printf("The operating system has halted.\n");
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printf("Please press any key to reboot.\n\n");
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cngetc();
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}
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printf("rebooting...\n");
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cpu_reset();
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/*NOTREACHED*/
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}
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/*
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* u_int initarm(BootConfig *bootconf)
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*
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* Initial entry point on startup. This gets called before main() is
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* entered.
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* It should be responcible for setting up everything that must be
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* in place when main is called.
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* This includes
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* Taking a copy of the boot configuration structure.
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* Initialising the physical console so characters can be printed.
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* Setting up page tables for the kernel
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* Relocating the kernel to the bottom of physical memory
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*/
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/* This routine is frightening mess ! This is what my mind looks like -mark */
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/*
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* This code is looking even worse these days ...
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* This is the problem you get when you are booting from another Operating System
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* without a proper boot loader
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* Made even worse by the fact that if the machine does not have VRAM
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* the video memory tends to be physically sitting where we relocate the
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* kernel to.
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*/
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u_int
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initarm(bootconf)
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BootConfig *bootconf;
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{
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int loop;
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int loop1;
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u_int logical;
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u_int physical;
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u_int kerneldatasize;
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u_int l1pagetable;
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u_int l2pagetable;
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extern char page0[], page0_end[];
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struct exec *kernexec = (struct exec *)KERNEL_BASE;
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int id;
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/*
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* Heads up ... Setup the CPU / MMU / TLB functions
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*/
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set_cpufuncs();
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/* Copy the boot configuration structure */
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bootconfig = *bootconf;
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/*
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* Initialise the video memory descriptor
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*
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* Note: all references to the video memory virtual/physical address
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* should go via this structure.
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*/
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/*
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* In the future ...
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*
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* All console output will be postponed until the primary bootstrap
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* has been completed so that we have had a chance to reserve some
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* memory for the video system if we do not have separate VRAM.
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*/
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/* Hardwire it in case we have an old boot loader */
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videomemory.vidm_vbase = bootconfig.display_start;
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videomemory.vidm_pbase = VRAM_BASE;
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videomemory.vidm_type = VIDEOMEM_TYPE_VRAM;
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videomemory.vidm_size = bootconfig.display_size;
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if (bootconfig.magic == BOOTCONFIG_MAGIC) {
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videomemory.vidm_vbase = bootconfig.display_start;
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videomemory.vidm_pbase = bootconfig.display_phys;
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videomemory.vidm_size = bootconfig.display_size;
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if (bootconfig.vram[0].pages)
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videomemory.vidm_type = VIDEOMEM_TYPE_VRAM;
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else
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videomemory.vidm_type = VIDEOMEM_TYPE_DRAM;
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}
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/*
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* Initialise the physical console
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* This is done in main() but for the moment we do it here so that
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* we can use printf in initarm() before main() has been called.
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*/
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consinit();
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/* Talk to the user */
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printf("initarm...\n");
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/* Tell the user if his boot loader is too old */
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if (bootconfig.magic != BOOTCONFIG_MAGIC) {
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printf("\nNO MAGIC NUMBER IN BOOTCONFIG. PLEASE UPGRADE YOUR BOOT LOADER\n\n");
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delay(5000000);
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}
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printf("Kernel loaded from file %s\n", bootconfig.kernelname);
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printf("Kernel arg string %s\n", (char *)bootconfig.argvirtualbase);
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printf("\nBoot configuration structure reports the following memory\n");
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printf(" DRAM block 0a at %08x size %08x DRAM block 0b at %08x size %08x\n\r",
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bootconfig.dram[0].address,
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bootconfig.dram[0].pages * bootconfig.pagesize,
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bootconfig.dram[1].address,
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bootconfig.dram[1].pages * bootconfig.pagesize);
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printf(" DRAM block 1a at %08x size %08x DRAM block 1b at %08x size %08x\n\r",
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bootconfig.dram[2].address,
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bootconfig.dram[2].pages * bootconfig.pagesize,
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bootconfig.dram[3].address,
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bootconfig.dram[3].pages * bootconfig.pagesize);
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printf(" VRAM block 0 at %08x size %08x\n\r",
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bootconfig.vram[0].address,
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bootconfig.vram[0].pages * bootconfig.pagesize);
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/* printf(" videomem: VA=%08x PA=%08x\n", videomemory.vidm_vbase, videomemory.vidm_pbase);*/
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/* Check to make sure the page size is correct */
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if (NBPG != bootconfig.pagesize)
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panic("Page size is not %d bytes\n", NBPG);
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/*
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* Ok now we have the hard bit.
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* We have the kernel allocated up high. The rest of the memory map is
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* available. We are still running on RISC OS page tables.
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*
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* We need to construct new page tables move the kernel in physical
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* memory and switch to them.
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*
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* The booter will have left us 6 pages at the top of memory.
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* Two of these are used as L2 page tables and the other 4 form the L1
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* page table.
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*/
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/*
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* Ok we must construct own own page table tables.
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* Once we have these we can reorganise the memory as required
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*/
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/*
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* We better check to make sure the booter has set up the scratch
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* area for us correctly. We use this area to create temporary pagetables
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* while we reorganise the memory map.
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*/
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if ((bootconfig.scratchphysicalbase & 0x3fff) != 0)
|
|
panic("initarm: Scratch area not aligned on 16KB boundry\n");
|
|
|
|
if ((bootconfig.scratchsize < 0xc000) != 0)
|
|
panic("initarm: Scratch area too small (need >= 48KB)\n");
|
|
|
|
/*
|
|
* Ok start the primary bootstrap.
|
|
* The primary bootstrap basically replaces the booter page tables with
|
|
* new ones that it creates in the boot scratch area. These page tables
|
|
* map the rest of the physical memory into the virtaul memory map.
|
|
* This allows low physical memory to be accessed to create the
|
|
* kernels page tables, relocate the kernel code from high physical
|
|
* memory to low physical memory etc.
|
|
*/
|
|
|
|
printf("initarm: Primary bootstrap ... ");
|
|
|
|
kerneldatasize = bootconfig.kernsize + bootconfig.argsize;
|
|
|
|
l2pagetable = bootconfig.scratchvirtualbase;
|
|
l1pagetable = l2pagetable + 0x4000;
|
|
|
|
if (bootconfig.vram[0].pages > 0) {
|
|
/*
|
|
* Now we construct a L2 pagetables for the VRAM
|
|
*/
|
|
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry(l2pagetable + 0x1000, logical,
|
|
bootconfig.vram[0].address + logical);
|
|
map_entry(l2pagetable + 0x1000, logical + 0x200000,
|
|
bootconfig.vram[0].address + logical);
|
|
}
|
|
|
|
/*
|
|
* Update the videomemory structure to reflect the mapping changes
|
|
*/
|
|
|
|
videomemory.vidm_vbase = VMEM_VBASE;
|
|
videomemory.vidm_pbase = VRAM_BASE;
|
|
videomemory.vidm_type = VIDEOMEM_TYPE_VRAM;
|
|
videomemory.vidm_size = bootconfig.vram[0].pages * NBPG;
|
|
} else {
|
|
if (bootconfig.display_phys != bootconfig.dram[0].address)
|
|
panic("video DRAM is being unpredictable\n");
|
|
|
|
/*
|
|
* Now we construct a L2 pagetables for the DRAM
|
|
*/
|
|
|
|
for (logical = 0; logical < bootconfig.display_size; logical += NBPG) {
|
|
map_entry(l2pagetable + 0x1000, logical,
|
|
bootconfig.display_phys + logical);
|
|
}
|
|
|
|
/*
|
|
* Update the videomemory structure to reflect the mapping changes
|
|
*/
|
|
|
|
videomemory.vidm_vbase = VMEM_VBASE;
|
|
videomemory.vidm_pbase = bootconfig.display_phys;
|
|
videomemory.vidm_type = VIDEOMEM_TYPE_DRAM;
|
|
videomemory.vidm_size = bootconfig.display_size;
|
|
}
|
|
|
|
/*
|
|
* Now map L2 page tables for the current kernel memory
|
|
* and the new kernel memory
|
|
*/
|
|
|
|
for (logical = 0; logical < kerneldatasize + bootconfig.scratchsize;
|
|
logical += NBPG) {
|
|
map_entry(l2pagetable + 0x3000, logical,
|
|
bootconfig.kernphysicalbase + logical);
|
|
}
|
|
|
|
#if NHYDRABUS > 0
|
|
/*
|
|
* If we have the hydra nick the first physical page for hydra booting
|
|
* Needs to be 2MB aligned
|
|
*/
|
|
|
|
for (logical = 0; logical < 0x400000; logical += NBPG) {
|
|
map_entry(l2pagetable + 0x2000, logical,
|
|
bootconfig.dram[0].address + logical + NBPG);
|
|
}
|
|
#else /* NHYDRABUS */
|
|
for (logical = 0; logical < 0x400000; logical += NBPG) {
|
|
map_entry(l2pagetable + 0x2000, logical,
|
|
bootconfig.dram[0].address + logical);
|
|
}
|
|
#endif /* NHYDRABUS */
|
|
|
|
/*
|
|
* Now we construct the L1 pagetable. This only needs the minimum to
|
|
* keep us going until we can contruct the proper kernel L1 page table.
|
|
*/
|
|
|
|
map_section(l1pagetable, VIDC_BASE, VIDC_HW_BASE, 0);
|
|
map_section(l1pagetable, IOMD_BASE, IOMD_HW_BASE, 0);
|
|
|
|
map_pagetable(l1pagetable, 0x00000000,
|
|
bootconfig.scratchphysicalbase + 0x2000);
|
|
map_pagetable(l1pagetable, KERNEL_BASE,
|
|
bootconfig.scratchphysicalbase + 0x3000);
|
|
map_pagetable(l1pagetable, VMEM_VBASE,
|
|
bootconfig.scratchphysicalbase + 0x1000);
|
|
|
|
/* Print some debugging info */
|
|
|
|
/*
|
|
printf("page tables look like this ...\n");
|
|
printf("V0x00000000 - %08x\n", ReadWord(l1pagetable + 0x0000));
|
|
printf("V0x03500000 - %08x\n", ReadWord(l1pagetable + 0x00d4));
|
|
printf("V0x00200000 - %08x\n", ReadWord(l1pagetable + 0x0080));
|
|
printf("V0xf4000000 - %08x\n", ReadWord(l1pagetable + 0x3d00));
|
|
printf("V0xf0000000 - %08x\n", ReadWord(l1pagetable + 0x3c00));
|
|
printf("page dir = P%08x\n", bootconfig.scratchphysicalbase + 0x4000);
|
|
printf("l1= V%08x\n", l1pagetable);
|
|
*/
|
|
|
|
/* Grind to a halt if no VRAM */
|
|
|
|
/* if (bootconfig.vram[0].pages == 0) {
|
|
printf("Switching to bootstrap pagetables\n");
|
|
printf("[Hit a key top continue]\n");
|
|
cngetc();
|
|
}*/
|
|
|
|
/* If no VRAM kill the VIDC DAC's until the end of the bootstrap */
|
|
|
|
if (bootconfig.vram[0].pages == 0)
|
|
vidcconsole_blank(vconsole_current, BLANK_OFF);
|
|
|
|
/* If we don't have VRAM ..
|
|
* Ahhhhhhhhhhhhhhhhhhhhhh
|
|
* We have just mapped the kernel across the video DRAM from RISCOS.
|
|
* Better block all printing until we complete the secondary
|
|
* bootstrap and have allocate new video DRAM.
|
|
*/
|
|
|
|
/*
|
|
* Pheww right we are ready to switch page tables !!!
|
|
* The L1 table is at bootconfig.scratchphysicalbase + 0x4000
|
|
*/
|
|
|
|
/* Switch tables */
|
|
|
|
setttb(bootconfig.scratchphysicalbase + 0x4000);
|
|
|
|
/*
|
|
* Since we have mapped the VRAM up into kernel space we must now update the
|
|
* the bootconfig and display structures by hand.
|
|
*/
|
|
|
|
if (bootconfig.vram[0].pages != 0) {
|
|
bootconfig.display_start = VMEM_VBASE;
|
|
physcon_display_base(VMEM_VBASE);
|
|
}
|
|
|
|
if (bootconfig.vram[0].pages != 0)
|
|
printf("done.\n");
|
|
|
|
id = ReadByte(IOMD_BASE + (IOMD_ID0 << 2))
|
|
| (ReadByte(IOMD_BASE + (IOMD_ID1 << 2)) << 8);
|
|
switch (id) {
|
|
case ARM7500_IOC_ID:
|
|
#ifndef CPU_ARM7500
|
|
panic("Encountered ARM7500 IOMD but no ARM7500 kernel support");
|
|
#endif /* CPU_ARM7500 */
|
|
break;
|
|
case RPC600_IOMD_ID:
|
|
#ifdef CPU_ARM7500
|
|
panic("Encountered ARM6/7 IOMD and ARM7500 kernel support");
|
|
#endif /* CPU_ARM7500 */
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Ok we have finished the primary boot strap. All this has done is to
|
|
* allow us to access all the physical memory from known virtual
|
|
* location. We also now know that all the used pages are at the top
|
|
* of the physical memory and where they are in the virtual memory map.
|
|
*
|
|
* This should be the stage we are at at the end of the bootstrap when
|
|
* we have a two stage booter.
|
|
*
|
|
* The secondary bootstrap has the responcibility to sort locating the
|
|
* kernel to the correct address and for creating the kernel page tables.
|
|
* It must also set up various memory pointers that are used by pmap etc.
|
|
*/
|
|
|
|
process_kernel_args();
|
|
|
|
if (bootconfig.vram[0].pages != 0)
|
|
printf("initarm: Secondary bootstrap ... ");
|
|
|
|
/* Zero down the memory we mapped in for the secondary bootstrap */
|
|
|
|
bzero(0x00000000, 0x400000); /* XXX */
|
|
|
|
/* Set up the variables that define the availablilty of physcial memory */
|
|
|
|
physical_start = bootconfig.dram[0].address;
|
|
physical_freestart = physical_start;
|
|
physical_end = bootconfig.dram[bootconfig.dramblocks - 1].address
|
|
+ bootconfig.dram[bootconfig.dramblocks - 1].pages * NBPG;
|
|
physical_freeend = physical_end;
|
|
physical_memoryblock = 0;
|
|
free_pages = bootconfig.drampages;
|
|
|
|
for (loop = 0; loop < bootconfig.dramblocks; ++loop)
|
|
physmem += bootconfig.dram[loop].pages;
|
|
|
|
/*
|
|
* Reserve some pages at the top of the memory for later use
|
|
*
|
|
* This area is not currently used but could be used for the allocation
|
|
* of L1 page tables for each process.
|
|
* The size of this memory would be determined by the maximum number of
|
|
* processes.
|
|
*
|
|
* For the moment we just reserve a few pages just to make sure the
|
|
* system copes.
|
|
*/
|
|
|
|
physical_freeend -= videodram_size;
|
|
free_pages -= (videodram_size / NBPG);
|
|
videodram_start = physical_freeend;
|
|
|
|
if (videodram_size) {
|
|
videomemory.vidm_vbase = VMEM_VBASE;
|
|
videomemory.vidm_pbase = videodram_start;
|
|
videomemory.vidm_type = VIDEOMEM_TYPE_DRAM;
|
|
videomemory.vidm_size = videodram_size;
|
|
}
|
|
|
|
/* Right We have the bottom meg of memory mapped to 0x00000000
|
|
* so was can get at it. The kernel will ocupy the start of it.
|
|
* After the kernel/args we allocate some the the fixed page tables
|
|
* we need to get the system going.
|
|
* We allocate one page directory and 8 page tables and store the
|
|
* physical addresses in the kernel_pt_table array.
|
|
* Must remember that neither the page L1 or L2 page tables are the same
|
|
* size as a page !
|
|
*
|
|
* Ok the next bit of physical allocate may look complex but it is
|
|
* simple really. I have done it like this so that no memory gets wasted
|
|
* during the allocate of various pages and tables that are all different
|
|
* sizes.
|
|
* The start address will be page aligned.
|
|
* We allocate the kernel page directory on the first free 16KB boundry
|
|
* we find.
|
|
* We allocate the kernel page tables on the first 1KB boundry we find.
|
|
* We allocate 9 PT's. This means that in the process we
|
|
* KNOW that we will encounter at least 1 16KB boundry.
|
|
*
|
|
* Eventually if the top end of the memory gets used for process L1 page
|
|
* tables the kernel L1 page table may be moved up there.
|
|
*/
|
|
|
|
/*
|
|
* The Simtec Hydra board needs a 2MB aligned page for bootstrapping.
|
|
* Simplest thing is to nick the bottom page of physical memory.
|
|
*/
|
|
|
|
#if NHYDRABUS > 0
|
|
hydrascratch.physical = physical_start;
|
|
physical_start += NBPG;
|
|
--free_pages;
|
|
#endif /* NHYDRABUS */
|
|
|
|
physical = physical_start + kerneldatasize;
|
|
/* printf("physical=%08x next_phys=%08x\n", physical, pmap_next_phys_page(physical - NBPG));*/
|
|
loop1 = 1;
|
|
kernel_pt_table[0] = 0;
|
|
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
|
|
if ((physical & (PD_SIZE-1)) == 0 && kernel_pt_table[0] == 0) {
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] = physical;
|
|
bzero((char *)physical - physical_start, PD_SIZE);
|
|
physical += PD_SIZE;
|
|
} else {
|
|
kernel_pt_table[loop1] = physical;
|
|
bzero((char *)physical - physical_start, PT_SIZE);
|
|
physical += PT_SIZE;
|
|
++loop1;
|
|
}
|
|
}
|
|
|
|
/* This should never be able to happen but better confirm that. */
|
|
|
|
if ((kernel_pt_table[0] & (PD_SIZE-1)) != 0)
|
|
panic("initarm: Failed to align the kernel page directory\n");
|
|
|
|
/* Update the address of the first free page of physical memory */
|
|
|
|
physical_freestart = physical;
|
|
free_pages -= (physical - physical_start) / NBPG;
|
|
|
|
/* Allocate a page for the system page mapped to 0x00000000 */
|
|
|
|
systempage.physical = physical_freestart;
|
|
physical_freestart += NBPG;
|
|
--free_pages;
|
|
bzero((char *)systempage.physical - physical_start, NBPG);
|
|
|
|
/* Allocate another 3 pages for the stacks in different CPU modes. */
|
|
|
|
irqstack.physical = physical_freestart;
|
|
physical_freestart += NBPG;
|
|
abtstack.physical = physical_freestart;
|
|
physical_freestart += NBPG;
|
|
undstack.physical = physical_freestart;
|
|
#if NIPKDB > 0
|
|
/* Use a bigger UND32 stack when running with ipkdb */
|
|
|
|
physical_freestart += 2*NBPG;
|
|
bzero((char *)irqstack.physical - physical_start, 4*NBPG);
|
|
free_pages -= 4;
|
|
#else /* NIPKDB */
|
|
physical_freestart += NBPG;
|
|
bzero((char *)irqstack.physical - physical_start, 3*NBPG);
|
|
free_pages -= 3;
|
|
#endif /* NIPKDB */
|
|
irqstack.virtual = KERNEL_BASE + irqstack.physical-physical_start;
|
|
abtstack.virtual = KERNEL_BASE + abtstack.physical-physical_start;
|
|
undstack.virtual = KERNEL_BASE + undstack.physical-physical_start;
|
|
|
|
kernelstack.physical = physical_freestart;
|
|
physical_freestart += UPAGES * NBPG;
|
|
bzero((char *)kernelstack.physical - physical_start, UPAGES * NBPG);
|
|
free_pages -= UPAGES;
|
|
|
|
kernelstack.virtual = KERNEL_BASE + kernelstack.physical
|
|
- physical_start;
|
|
|
|
msgbufphys = physical_freestart;
|
|
physical_freestart += round_page(MSGBUFSIZE);
|
|
free_pages -= round_page(MSGBUFSIZE) / NBPG;
|
|
|
|
/* Ok we have allocated physical pages for the primary kernel page tables */
|
|
|
|
/* Now we fill in the L2 pagetable for the kernel code/data */
|
|
|
|
l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL] - physical_start;
|
|
|
|
if (N_GETMAGIC(kernexec[0]) == ZMAGIC) {
|
|
/* printf("[ktext read-only] ");
|
|
printf("[%08x %08x %08x] \n", (u_int)kerneldatasize, (u_int)kernexec->a_text,
|
|
(u_int)(kernexec->a_text+kernexec->a_data+kernexec->a_bss));*/
|
|
for (logical = 0; logical < 0x00/*kernexec->a_text*/;
|
|
logical += NBPG)
|
|
map_entry_ro(l2pagetable, logical, physical_start
|
|
+ logical);
|
|
for (; logical < kerneldatasize; logical += NBPG)
|
|
map_entry(l2pagetable, logical, physical_start
|
|
+ logical);
|
|
} else
|
|
for (logical = 0; logical < kerneldatasize; logical += NBPG)
|
|
map_entry(l2pagetable, logical, physical_start
|
|
+ logical);
|
|
|
|
/* Map the stack pages */
|
|
|
|
map_entry(l2pagetable, irqstack.physical-physical_start,
|
|
irqstack.physical);
|
|
map_entry(l2pagetable, abtstack.physical-physical_start,
|
|
abtstack.physical);
|
|
map_entry(l2pagetable, undstack.physical-physical_start,
|
|
undstack.physical);
|
|
#if NIPKDB > 0
|
|
/* Use a bigger UND32 stack when running with ipkdb */
|
|
|
|
map_entry(l2pagetable, NBPG+undstack.physical-physical_start,
|
|
NBPG+undstack.physical);
|
|
#endif /* NIPKDB */
|
|
map_entry(l2pagetable, kernelstack.physical - physical_start,
|
|
kernelstack.physical);
|
|
map_entry(l2pagetable, kernelstack.physical + NBPG - physical_start,
|
|
kernelstack.physical + NBPG);
|
|
|
|
/* Now we fill in the L2 pagetable for the VRAM */
|
|
|
|
/*
|
|
* Current architectures mean that the VRAM is always in 1 continuous
|
|
* bank.
|
|
* This means that we can just map the 2 meg that the VRAM would occupy.
|
|
* In theory we don't need a page table for VRAM, we could section map
|
|
* it but we would need the page tables if DRAM was in use.
|
|
*/
|
|
|
|
l2pagetable = kernel_pt_table[KERNEL_PT_VMEM] - physical_start;
|
|
|
|
if (videodram_size > 0) {
|
|
for (logical = 0; logical < videomemory.vidm_size; logical += NBPG) {
|
|
map_entry(l2pagetable, logical, videomemory.vidm_pbase
|
|
+ logical);
|
|
map_entry(l2pagetable, logical + videomemory.vidm_size,
|
|
videomemory.vidm_pbase + logical);
|
|
}
|
|
} else {
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry(l2pagetable, logical, bootconfig.vram[0].address
|
|
+ logical);
|
|
map_entry(l2pagetable, logical + 0x200000,
|
|
bootconfig.vram[0].address + logical);
|
|
}
|
|
}
|
|
|
|
/* Map entries in the page table used to map PDE's */
|
|
|
|
l2pagetable = kernel_pt_table[KERNEL_PT_PDE] - physical_start;
|
|
map_entry_nc(l2pagetable, 0x0000000,
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR]);
|
|
map_entry_nc(l2pagetable, 0x0001000,
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x1000);
|
|
map_entry_nc(l2pagetable, 0x0002000,
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x2000);
|
|
map_entry_nc(l2pagetable, 0x0003000,
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x3000);
|
|
|
|
/*
|
|
* Map entries in the page table used to map PTE's
|
|
* Basically every kernel page table gets mapped here
|
|
*/
|
|
|
|
l2pagetable = kernel_pt_table[KERNEL_PT_PTE] - physical_start;
|
|
map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_KERNEL]);
|
|
map_entry_nc(l2pagetable, (PAGE_DIRS_BASE >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PDE]);
|
|
map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PTE]);
|
|
map_entry_nc(l2pagetable, (VMEM_VBASE >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMEM]);
|
|
map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_SYS]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x00000000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA0]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x00400000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA1]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x00800000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA2]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x00c00000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA3]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x01000000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA4]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x01400000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA5]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x01800000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA6]);
|
|
map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 0x01c00000) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA7]);
|
|
|
|
map_entry_nc(l2pagetable, (0xf5000000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x0000);
|
|
map_entry_nc(l2pagetable, (0xf5400000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x1000);
|
|
map_entry_nc(l2pagetable, (0xf5800000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x2000);
|
|
map_entry_nc(l2pagetable, (0xf5c00000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_PAGEDIR] + 0x3000);
|
|
|
|
/*
|
|
* Map the system page in the kernel page table for the bottom 1Meg
|
|
* of the virtual memory map.
|
|
*/
|
|
|
|
l2pagetable = kernel_pt_table[KERNEL_PT_SYS] - physical_start;
|
|
map_entry(l2pagetable, 0x0000000, systempage.physical);
|
|
|
|
/* Now we construct the L1 pagetable */
|
|
|
|
l1pagetable = kernel_pt_table[KERNEL_PT_PAGEDIR] - physical_start;
|
|
|
|
/* Map the VIDC20, IOMD, COMBO and podules */
|
|
|
|
/* Map the VIDC20 */
|
|
|
|
map_section(l1pagetable, VIDC_BASE, VIDC_HW_BASE, 0);
|
|
|
|
/* Map the IOMD (and SLOW and MEDIUM simple podules) */
|
|
|
|
map_section(l1pagetable, IOMD_BASE, IOMD_HW_BASE, 0);
|
|
|
|
/* Map the COMBO (and module space) */
|
|
|
|
map_section(l1pagetable, IO_BASE, IO_HW_BASE, 0);
|
|
|
|
/* Map the L2 pages tables in the L1 page table */
|
|
|
|
map_pagetable(l1pagetable, 0x00000000,
|
|
kernel_pt_table[KERNEL_PT_SYS]);
|
|
map_pagetable(l1pagetable, KERNEL_BASE,
|
|
kernel_pt_table[KERNEL_PT_KERNEL]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x00000000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA0]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x00400000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA1]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x00800000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA2]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x00c00000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA3]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x01000000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA4]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x01400000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA5]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x01800000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA6]);
|
|
map_pagetable(l1pagetable, KERNEL_VM_BASE + 0x01c00000,
|
|
kernel_pt_table[KERNEL_PT_VMDATA7]);
|
|
map_pagetable(l1pagetable, PAGE_DIRS_BASE,
|
|
kernel_pt_table[KERNEL_PT_PDE]);
|
|
map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
|
|
kernel_pt_table[KERNEL_PT_PTE]);
|
|
map_pagetable(l1pagetable, VMEM_VBASE,
|
|
kernel_pt_table[KERNEL_PT_VMEM]);
|
|
|
|
/* Bit more debugging info */
|
|
|
|
/* printf("page tables look like this ...\n");
|
|
printf("V0x00000000 - %08x\n", ReadWord(l1pagetable + 0x0000));
|
|
printf("V0x03200000 - %08x\n", ReadWord(l1pagetable + 0x00c8));
|
|
printf("V0x03500000 - %08x\n", ReadWord(l1pagetable + 0x00d4));
|
|
printf("V0xf0000000 - %08x\n", ReadWord(l1pagetable + 0x3c00));
|
|
printf("V0xf1000000 - %08x\n", ReadWord(l1pagetable + 0x3c40));
|
|
printf("V0xf2000000 - %08x\n", ReadWord(l1pagetable + 0x3c80));
|
|
printf("V0xf3000000 - %08x\n", ReadWord(l1pagetable + 0x3cc0));
|
|
printf("V0xf3300000 - %08x\n", ReadWord(l1pagetable + 0x3ccc));
|
|
printf("V0xf4000000 - %08x\n", ReadWord(l1pagetable + 0x3d00));
|
|
printf("V0xf6000000 - %08x\n", ReadWord(l1pagetable + 0x3d80));
|
|
*/
|
|
/* printf("V0xefc00000 - %08x\n", ReadWord(l1pagetable + 0x3bf8));
|
|
printf("V0xef800000 - %08x\n", ReadWord(l1pagetable + 0x3bfc));*/
|
|
|
|
/*
|
|
* Now we have the real page tables in place so we can switch to them.
|
|
* Once this is done we will be running with the REAL kernel page tables.
|
|
*/
|
|
|
|
/*
|
|
* The last thing we must do is copy the kernel down to the new memory.
|
|
* This copies all our kernel data structures and variables as well
|
|
* which is why it is left to the last moment.
|
|
*/
|
|
|
|
if (bootconfig.vram[0].pages != 0)
|
|
printf("mapping ... ");
|
|
|
|
bcopy((char *)KERNEL_BASE, (char *)0x00000000, kerneldatasize);
|
|
|
|
/* Switch tables */
|
|
|
|
setttb(kernel_pt_table[KERNEL_PT_PAGEDIR]);
|
|
|
|
if (videodram_size != 0) {
|
|
bootconfig.display_start = VMEM_VBASE;
|
|
physcon_display_base(VMEM_VBASE);
|
|
vidcconsole_reinit();
|
|
|
|
/* Turn the VIDC DAC's on again. */
|
|
|
|
vidcconsole_blank(vconsole_current, BLANK_NONE);
|
|
printf("\x0cSecondary bootstrap: ");
|
|
}
|
|
|
|
printf("done.\n");
|
|
|
|
/* Right set up the vectors at the bottom of page 0 */
|
|
|
|
bcopy(page0, (char *)0x00000000, page0_end - page0);
|
|
|
|
/* We have modified a text page so sync the icache */
|
|
cpu_cache_syncI_rng(0, page0_end - page0);
|
|
|
|
/*
|
|
* Pages were allocated during the secondary bootstrap for the
|
|
* stacks for different CPU modes.
|
|
* We must now set the r13 registers in the different CPU modes to
|
|
* point to these stacks.
|
|
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
|
|
* of the stack memory.
|
|
*/
|
|
|
|
#if defined(DIAGNOSTIC) && 0
|
|
printf("IRQ stack V%08x P%08x\n", (u_int) irqstack.virtual,
|
|
(u_int) irqstack.physical);
|
|
printf("ABT stack V%08x P%08x\n", (u_int) abtstack.virtual,
|
|
(u_int) abtstack.physical);
|
|
printf("UND stack V%08x P%08x\n", (u_int) undstack.virtual,
|
|
(u_int) undstack.physical);
|
|
#endif
|
|
|
|
printf("init subsystems: stacks ");
|
|
console_flush();
|
|
|
|
set_stackptr(PSR_IRQ32_MODE, irqstack.virtual + NBPG);
|
|
set_stackptr(PSR_ABT32_MODE, abtstack.virtual + NBPG);
|
|
#if NIPKDB > 0
|
|
/* Use a bigger UND32 stack when running with ipkdb */
|
|
set_stackptr(PSR_UND32_MODE, undstack.virtual + 2*NBPG);
|
|
#else /* NIPKDB */
|
|
set_stackptr(PSR_UND32_MODE, undstack.virtual + NBPG);
|
|
#endif /* NIPKDB */
|
|
#ifdef PMAP_DEBUG
|
|
if (pmap_debug_level >= 0)
|
|
printf("kstack V%08x P%08x\n", (int) kernelstack.virtual,
|
|
(int) kernelstack.physical);
|
|
#endif /* PMAP_DEBUG */
|
|
|
|
/*
|
|
* Well we should set a data abort handler.
|
|
* Once things get going this will change as we will need a proper handler.
|
|
* Until then we will use a handler that just panics but tells us
|
|
* why.
|
|
* Initialisation of the vectors will just panic on a data abort.
|
|
* This just fills in a slighly better one.
|
|
*/
|
|
|
|
printf("vectors ");
|
|
data_abort_handler_address = (u_int)data_abort_handler;
|
|
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
|
|
undefined_handler_address = (u_int)undefinedinstruction_bounce;
|
|
console_flush();
|
|
|
|
/* Diagnostic stuff. while writing the boot code */
|
|
|
|
/* for (loop = 0x0; loop < 0x1000; ++loop) {
|
|
if (ReadWord(PAGE_DIRS_BASE + loop * 4) != 0)
|
|
printf("Pagetable for V%08x = %08x\n", loop << 20,
|
|
ReadWord(0xf2000000 + loop * 4));
|
|
}*/
|
|
|
|
/* Diagnostic stuff. while writing the boot code */
|
|
|
|
/* for (loop = 0x0; loop < 0x400; ++loop) {
|
|
if (ReadWord(kernel_pt_table[KERNEL_PT_PTE] + loop * 4) != 0)
|
|
printf("Pagetable for V%08x P%08x = %08x\n",
|
|
loop << 22, kernel_pt_table[KERNEL_PT_PTE]+loop*4,
|
|
ReadWord(kernel_pt_table[KERNEL_PT_PTE]+loop * 4));
|
|
}*/
|
|
|
|
/* At last !
|
|
* We now have the kernel in physical memory from the bottom upwards.
|
|
* Kernel page tables are physically above this.
|
|
* The kernel is mapped to 0xf0000000
|
|
* The kernel data PTs will handle the mapping of 0xf1000000-0xf1ffffff
|
|
* 2Meg of VRAM is mapped to 0xf4000000
|
|
* The kernel page directory is mapped to 0xf3000000
|
|
* The page tables are mapped to 0xefc00000
|
|
* The IOMD is mapped to 0xf6000000
|
|
* The VIDC is mapped to 0xf6100000
|
|
*/
|
|
|
|
/* Initialise the undefined instruction handlers */
|
|
|
|
printf("undefined ");
|
|
undefined_init();
|
|
console_flush();
|
|
|
|
/* Boot strap pmap telling it where the kernel page table is */
|
|
|
|
printf("pmap ");
|
|
pmap_bootstrap(PAGE_DIRS_BASE, kernel_pt_table[2]);
|
|
console_flush();
|
|
|
|
/* Setup the IRQ system */
|
|
|
|
printf("irq ");
|
|
console_flush();
|
|
irq_init();
|
|
printf("done.\n");
|
|
|
|
if (cmos_read(RTC_ADDR_REBOOTCNT) > 0)
|
|
printf("Warning: REBOOTCNT = %d\n",
|
|
cmos_read(RTC_ADDR_REBOOTCNT));
|
|
|
|
#ifdef CPU_SA110
|
|
if (cputype == ID_SA110)
|
|
rpc_sa110_cc_setup();
|
|
#endif /* CPU_SA110 */
|
|
|
|
#if NIPKDB > 0
|
|
/* Initialise ipkdb */
|
|
ipkdb_init();
|
|
if (boothowto & RB_KDB)
|
|
ipkdb_connect(0);
|
|
#endif /* NIPKDB */
|
|
|
|
#ifdef DDB
|
|
printf("ddb: ");
|
|
db_machine_init();
|
|
{
|
|
extern int end;
|
|
extern int *esym;
|
|
|
|
ddb_init(*(int *)&end, ((int *)&end) + 1, esym);
|
|
}
|
|
|
|
if (boothowto & RB_KDB)
|
|
Debugger();
|
|
#endif /* DDB */
|
|
|
|
/* We return the new stack pointer address */
|
|
return(kernelstack.virtual + USPACE_SVC_STACK_TOP);
|
|
}
|
|
|
|
void
|
|
process_kernel_args()
|
|
{
|
|
char *args;
|
|
|
|
/* Ok now we will check the arguments for interesting parameters. */
|
|
|
|
args = (char *)bootconfig.argvirtualbase;
|
|
boothowto = 0;
|
|
|
|
/* Skip the first parameter (the boot loader filename) */
|
|
|
|
while (*args != ' ' && *args != 0)
|
|
++args;
|
|
|
|
while (*args == ' ')
|
|
++args;
|
|
|
|
/* Skip the kernel image filename */
|
|
|
|
while (*args != ' ' && *args != 0)
|
|
++args;
|
|
|
|
while (*args == ' ')
|
|
++args;
|
|
|
|
boot_args = args;
|
|
parse_mi_bootargs(boot_args);
|
|
parse_rpc_bootargs(boot_args);
|
|
}
|
|
|
|
|
|
void
|
|
parse_rpc_bootargs(args)
|
|
char *args;
|
|
{
|
|
int integer;
|
|
|
|
if (get_bootconf_option(args, "videodram", BOOTOPT_TYPE_INT, &integer)) {
|
|
videodram_size = integer;
|
|
/* Round to 4K page */
|
|
videodram_size *= 1024;
|
|
videodram_size = round_page(videodram_size);
|
|
if (videodram_size > 1024*1024)
|
|
videodram_size = 1024*1024;
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Ok these are some development functions. They map blocks of memory
|
|
* into the video ram virtual memory.
|
|
* The idea is to follow this with a call to the vidc device to
|
|
* reinitialise the vidc20 for the new video ram.
|
|
* Only meaning full if was support VRAM.
|
|
*/
|
|
|
|
/* Map DRAM into the video memory */
|
|
|
|
int
|
|
vmem_mapdram()
|
|
{
|
|
u_int l2pagetable;
|
|
u_int logical;
|
|
|
|
if (videodram_start == 0 || videodram_size == 0)
|
|
return(ENOMEM);
|
|
|
|
/* flush existing video data */
|
|
|
|
cpu_cache_purgeD();
|
|
|
|
/* Get the level 2 pagetable for the video memory */
|
|
|
|
l2pagetable = (u_int)pmap_pte(kernel_pmap,
|
|
(vm_offset_t)videomemory.vidm_vbase);
|
|
|
|
/* Map a block of DRAM into the video memory area */
|
|
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry(l2pagetable, logical, videodram_start
|
|
+ logical);
|
|
map_entry(l2pagetable, logical + 0x200000,
|
|
videodram_start + logical);
|
|
}
|
|
|
|
/* Flush the TLB so we pick up the new mappings */
|
|
|
|
cpu_tlb_flushD();
|
|
|
|
/* Rebuild the video memory descriptor */
|
|
|
|
videomemory.vidm_vbase = VMEM_VBASE;
|
|
videomemory.vidm_pbase = videodram_start;
|
|
videomemory.vidm_type = VIDEOMEM_TYPE_DRAM;
|
|
videomemory.vidm_size = videodram_size;
|
|
|
|
/* Reinitialise the video system */
|
|
|
|
/* video_reinit();*/
|
|
return(0);
|
|
}
|
|
|
|
|
|
/* Map VRAM into the video memory */
|
|
|
|
int
|
|
vmem_mapvram()
|
|
{
|
|
u_int l2pagetable;
|
|
u_int logical;
|
|
|
|
if (bootconfig.vram[0].address == 0 || bootconfig.vram[0].pages == 0)
|
|
return(ENOMEM);
|
|
|
|
/* flush existing video data */
|
|
|
|
cpu_cache_purgeD();
|
|
|
|
/* Get the level 2 pagetable for the video memory */
|
|
|
|
l2pagetable = (u_int)pmap_pte(kernel_pmap,
|
|
(vm_offset_t)videomemory.vidm_vbase);
|
|
|
|
/* Map the VRAM into the video memory area */
|
|
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry(l2pagetable, logical, bootconfig.vram[0].address
|
|
+ logical);
|
|
map_entry(l2pagetable, logical + 0x200000,
|
|
bootconfig.vram[0].address + logical);
|
|
}
|
|
|
|
/* Flush the TLB so we pick up the new mappings */
|
|
|
|
cpu_tlb_flushD();
|
|
|
|
/* Rebuild the video memory descriptor */
|
|
|
|
videomemory.vidm_vbase = VMEM_VBASE;
|
|
videomemory.vidm_pbase = VRAM_BASE;
|
|
videomemory.vidm_type = VIDEOMEM_TYPE_VRAM;
|
|
videomemory.vidm_size = bootconfig.vram[0].pages * NBPG;
|
|
|
|
/* Reinitialise the video system */
|
|
|
|
/* video_reinit();*/
|
|
return(0);
|
|
}
|
|
|
|
|
|
/* Set the cache behaviour for the video memory */
|
|
|
|
int
|
|
vmem_cachectl(flag)
|
|
int flag;
|
|
{
|
|
u_int l2pagetable;
|
|
u_int logical;
|
|
u_int pa;
|
|
|
|
if (bootconfig.vram[0].address == 0 || bootconfig.vram[0].pages == 0)
|
|
return(ENOMEM);
|
|
|
|
/* Get the level 2 pagetable for the video memory */
|
|
|
|
l2pagetable = (u_int)pmap_pte(kernel_pmap,
|
|
(vm_offset_t)videomemory.vidm_vbase);
|
|
|
|
/* Map the VRAM into the video memory area */
|
|
|
|
if (flag == 0) {
|
|
printf("Disabling caching and buffering of VRAM\n");
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry_nc(l2pagetable, logical, bootconfig.vram[0].address
|
|
+ logical);
|
|
map_entry_nc(l2pagetable, logical + 0x200000,
|
|
bootconfig.vram[0].address + logical);
|
|
}
|
|
} else if (flag == 1) {
|
|
printf("Disabling caching of VRAM\n");
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
pa = bootconfig.vram[0].address + logical;
|
|
WriteWord(l2pagetable + ((logical >> 10) & 0x00000ffc),
|
|
L2_PTE_NC((pa & PG_FRAME), AP_KRW));
|
|
WriteWord(l2pagetable + (((logical+0x200000) >> 10) & 0x00000ffc),
|
|
L2_PTE_NC((pa & PG_FRAME), AP_KRW));
|
|
}
|
|
} else if (flag == 2) {
|
|
printf("Disabling buffering of VRAM\n");
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
pa = bootconfig.vram[0].address + logical;
|
|
WriteWord(l2pagetable + ((logical >> 10) & 0x00000ffc),
|
|
L2_PTE_NC_NB((pa & PG_FRAME), AP_KRW)|PT_C);
|
|
WriteWord(l2pagetable + (((logical+0x200000) >> 10) & 0x00000ffc),
|
|
L2_PTE_NC_NB((pa & PG_FRAME), AP_KRW)|PT_C);
|
|
}
|
|
}
|
|
else {
|
|
printf("Enabling caching and buffering of VRAM\n");
|
|
for (logical = 0; logical < 0x200000; logical += NBPG) {
|
|
map_entry(l2pagetable, logical, bootconfig.vram[0].address
|
|
+ logical);
|
|
map_entry(l2pagetable, logical + 0x200000,
|
|
bootconfig.vram[0].address + logical);
|
|
}
|
|
}
|
|
|
|
/* clean out any existing cached video data */
|
|
|
|
cpu_cache_purgeD();
|
|
|
|
/* Flush the TLB so we pick up the new mappings */
|
|
|
|
cpu_tlb_flushD();
|
|
|
|
return(0);
|
|
}
|
|
|
|
#ifdef CPU_SA110
|
|
|
|
/*
|
|
* For optimal cache cleaning we need two 16K banks of
|
|
* virtual address space that NOTHING else will access
|
|
* and then we alternate the cache cleaning between the
|
|
* two banks.
|
|
* The cache cleaning code requires requires 2 banks aligned
|
|
* on total size boundry so the banks can be alternated by
|
|
* eorring the size bit (assumes the bank size is a power of 2)
|
|
*/
|
|
extern unsigned int sa110_cache_clean_addr;
|
|
extern unsigned int sa110_cache_clean_size;
|
|
void
|
|
rpc_sa110_cc_setup(void)
|
|
{
|
|
vm_offset_t addr;
|
|
int cleanarea;
|
|
int loop;
|
|
vm_offset_t kaddr;
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pt_entry_t *pte;
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extern vm_offset_t virtual_start;
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cleanarea = 0x4000 * 2;
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addr = (virtual_start + (cleanarea - 1)) & ~(cleanarea - 1);
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virtual_start = addr + cleanarea;
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kaddr = pmap_extract(kernel_pmap, 0xf0000000);
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for (loop = 0; loop < cleanarea; loop += NBPG) {
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pte = pmap_pte(kernel_pmap, (addr + loop));
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*pte = L2_PTE(kaddr, AP_KR);
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}
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sa110_cache_clean_addr = addr;
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sa110_cache_clean_size = cleanarea / 2;
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}
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#endif /* CPU_SA110 */
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/* End of machdep.c */
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