85854cb4ad
THE REST OF THE KERNEL ARE IN THE TREE YET. Also, some of this is _incredibly_ hack-ish, etc., but it works.
525 lines
11 KiB
C
525 lines
11 KiB
C
/* $NetBSD: tcds.c,v 1.1 1995/02/13 23:09:11 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/pte.h>
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#include <machine/rpb.h>
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#include <alpha/tc/tc.h>
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#include <alpha/tc/dmavar.h>
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#include <alpha/tc/tcds.h>
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struct tcds_softc {
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struct device sc_dv;
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struct abus sc_bus;
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caddr_t sc_base;
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};
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/* Definition of the driver for autoconfig. */
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int tcdsmatch __P((struct device *, void *, void *));
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void tcdsattach __P((struct device *, struct device *, void *));
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int tcdsprint(void *, char *);
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struct cfdriver tcdscd =
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{ NULL, "tcds", tcdsmatch, tcdsattach, DV_DULL, sizeof(struct tcds_softc) };
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void tcds_intr_establish __P((struct confargs *, int (*)(void *), void *));
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void tcds_intr_disestablish __P((struct confargs *));
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caddr_t tcds_cvtaddr __P((struct confargs *));
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int tcds_matchname __P((struct confargs *, char *));
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int tcds_intr __P((void *));
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int tcds_intrnull __P((void *));
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#define TCDS_MAX_NSLOTS 2
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#define TCDS_SLOT_SCSI0 0
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#define TCDS_SLOT_SCSI1 1
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struct tcds_slot {
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struct confargs ts_ca;
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intr_handler_t ts_handler;
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void *ts_val;
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} tcds_slots[TCDS_MAX_NSLOTS] = {
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{ { "esp", 0, 0x0, },
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tcds_intrnull, (void *)(long)TCDS_SLOT_SCSI0, },
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{ { "esp", 1, 0x0, },
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tcds_intrnull, (void *)(long)TCDS_SLOT_SCSI1, },
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};
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int
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tcdsmatch(parent, vcf, aux)
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struct device *parent;
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void *vcf, *aux;
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{
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struct cfdata *cf = vcf;
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struct confargs *ca = aux;
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/* It can only occur on the turbochannel, anyway. */
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if (ca->ca_bus->ab_type != BUS_TC)
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return (0);
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/* Make sure that we're looking for this type of device. */
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if (!BUS_MATCHNAME(ca, "PMAZ-DS "))
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return (0);
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return (1);
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}
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void
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tcdsattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct tcds_softc *sc = (struct tcds_softc *)self;
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struct confargs *ca = aux;
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struct confargs *nca;
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volatile u_int32_t *cir, *imer;
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int i;
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printf("\n");
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sc->sc_base = BUS_CVTADDR(ca);
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sc->sc_bus.ab_dv = (struct device *)sc;
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sc->sc_bus.ab_type = BUS_TCDS;
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sc->sc_bus.ab_intr_establish = tcds_intr_establish;
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sc->sc_bus.ab_intr_disestablish = tcds_intr_disestablish;
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sc->sc_bus.ab_cvtaddr = tcds_cvtaddr;
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sc->sc_bus.ab_matchname = tcds_matchname;
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BUS_INTR_ESTABLISH(ca, tcds_intr, sc);
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/*
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* XXX
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* IMER apparently has some random (or, not so random, but still
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* not useful) bits set in it when the system boots. Clear it.
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*/
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imer = TCDS_REG(sc->sc_base, TCDS_IMER);
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*imer = 0;
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MB();
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/* Try to configure each CPU-internal device. */
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for (i = 0; i < TCDS_MAX_NSLOTS; i++) {
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nca = &tcds_slots[i].ts_ca;
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nca->ca_bus = &sc->sc_bus;
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/* Tell the autoconfig machinery we've found the hardware. */
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config_found(self, nca, tcdsprint);
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}
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}
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int
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tcdsprint(aux, pnp)
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void *aux;
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char *pnp;
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{
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struct confargs *ca = aux;
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if (pnp)
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printf("%s at %s", ca->ca_name, pnp);
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printf(" slot 0x%lx", ca->ca_slot);
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return (UNCONF);
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}
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void
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tcds_intr_establish(ca, handler, val)
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struct confargs *ca;
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int (*handler) __P((void *));
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void *val;
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{
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if (tcds_slots[ca->ca_slot].ts_handler != tcds_intrnull)
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panic("tcds_intr_establish: slot %d twice", ca->ca_slot);
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tcds_slots[ca->ca_slot].ts_handler = handler;
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tcds_slots[ca->ca_slot].ts_val = val;
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switch (ca->ca_slot) {
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case TCDS_SLOT_SCSI0:
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tcds_scsi_reset(0);
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break;
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case TCDS_SLOT_SCSI1:
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tcds_scsi_reset(1);
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break;
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default:
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panic("tcds_intr_establish: unknown slot number %d",
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ca->ca_slot);
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/* NOTREACHED */
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}
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}
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void
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tcds_intr_disestablish(ca)
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struct confargs *ca;
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{
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if (tcds_slots[ca->ca_slot].ts_handler == tcds_intrnull)
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panic("tcds_intr_disestablish: slot %d missing intr",
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ca->ca_slot);
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tcds_slots[ca->ca_slot].ts_handler = tcds_intrnull;
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tcds_slots[ca->ca_slot].ts_val = (void *)(long)ca->ca_slot;
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switch (ca->ca_slot) {
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case TCDS_SLOT_SCSI0:
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tcds_dma_disable(0);
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tcds_scsi_disable(0);
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break;
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case TCDS_SLOT_SCSI1:
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tcds_dma_disable(1);
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tcds_scsi_disable(1);
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break;
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default:
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panic("tcds_intr_disestablish: unknown slot number %d",
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ca->ca_slot);
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/* NOTREACHED */
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}
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}
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caddr_t
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tcds_cvtaddr(ca)
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struct confargs *ca;
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{
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return
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(((struct tcds_softc *)ca->ca_bus->ab_dv)->sc_base + ca->ca_offset);
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}
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int
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tcds_matchname(ca, name)
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struct confargs *ca;
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char *name;
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{
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return (strcmp(name, ca->ca_name) == 0);
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}
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int
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tcds_intrnull(val)
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void *val;
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{
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panic("uncaught TCDS ASIC intr for slot %ld\n", (long)val);
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}
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void
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tcds_scsi_reset(unit)
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *cir;
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tcds_dma_disable(unit);
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tcds_scsi_disable(unit);
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/* XXX: Clear/set IOSLOT/PBS bits. */
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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switch (unit) {
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case 0:
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*cir &= ~TCDS_CIR_SCSI0_RESET;
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MB();
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DELAY(1); /* XXX */
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*cir |= TCDS_CIR_SCSI0_RESET;
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MB();
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break;
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case 1:
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*cir &= ~TCDS_CIR_SCSI1_RESET;
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MB();
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DELAY(1); /* XXX */
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*cir |= TCDS_CIR_SCSI1_RESET;
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MB();
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break;
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default:
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panic("tcds_scsi_disable: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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tcds_scsi_enable(unit);
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tcds_dma_enable(unit);
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}
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void
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tcds_scsi_enable(unit)
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *imer;
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imer = TCDS_REG(sc->sc_base, TCDS_IMER);
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/*
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* XXX
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* Should we be setting all the "interrupt bits" in the IMER?
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* Do we need to set a bit in the mask so that SCSI DMA errors
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* cause interrupts?
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*/
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switch (unit) {
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case 0:
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*imer |= TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
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MB();
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break;
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case 1:
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*imer |= TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
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MB();
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break;
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default:
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panic("tcds_scsi_enable: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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}
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void
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tcds_scsi_disable(unit)
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *imer;
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imer = TCDS_REG(sc->sc_base, TCDS_IMER);
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switch (unit) {
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case 0:
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*imer &= ~(TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB);
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MB();
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break;
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case 1:
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*imer &= ~(TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB);
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MB();
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break;
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default:
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panic("tcds_scsi_disable: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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}
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void
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tcds_dma_init(dsc, unit)
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struct dma_softc *dsc;
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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switch (unit) {
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case 0:
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dsc->sda = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_ADDR);
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dsc->dic = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_INTR);
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dsc->dud0 = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_DUD0);
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dsc->dud1 = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_DUD1);
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break;
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case 1:
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dsc->sda = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_ADDR);
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dsc->dic = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_INTR);
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dsc->dud0 = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_DUD0);
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dsc->dud1 = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_DUD1);
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break;
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default:
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panic("tcds_dma_init: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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}
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void
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tcds_dma_enable(unit)
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *cir;
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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/* XXX Clear/set IOSLOT/PBS bits. */
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switch (unit) {
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case 0:
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*cir |= TCDS_CIR_SCSI0_DMAENA;
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MB();
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break;
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case 1:
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*cir |= TCDS_CIR_SCSI1_DMAENA;
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MB();
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break;
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default:
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panic("tcds_dma_enable: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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}
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void
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tcds_dma_disable(unit)
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int unit;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *cir;
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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/* XXX Clear/set IOSLOT/PBS bits. */
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switch (unit) {
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case 0:
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*cir &= ~TCDS_CIR_SCSI0_DMAENA;
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MB();
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break;
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case 1:
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*cir &= ~TCDS_CIR_SCSI1_DMAENA;
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MB();
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break;
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default:
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panic("tcds_dma_disable: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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}
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int
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tcds_scsi_isintr(unit, clear)
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int unit, clear;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *cir, ir;
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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ir = *cir;
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MB();
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switch (unit) {
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case 0:
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if (ir & TCDS_CIR_SCSI0_INT) {
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if (clear) {
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*cir &= ~TCDS_CIR_SCSI0_INT;
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MB();
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}
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return (1);
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}
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break;
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case 1:
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if (ir & TCDS_CIR_SCSI1_INT) {
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if (clear) {
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*cir &= ~TCDS_CIR_SCSI1_INT;
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MB();
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}
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return (1);
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}
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break;
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default:
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panic("tcds_scsi_isintr: unknown unit number\n", unit);
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/* NOTREACHED */
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}
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return (0);
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}
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int
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tcds_scsi_iserr(dsc)
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struct dma_softc *dsc;
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{
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struct tcds_softc *sc = tcdscd.cd_devs[0];
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volatile u_int32_t *cir, ir;
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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ir = *cir;
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MB();
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if (ir & SCSI_CIR_ERROR) {
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printf("%s: error <CIR = %x>\n", dsc->sc_dev.dv_xname, ir);
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return (1);
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}
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return (0);
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}
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/*
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* tcds_intr --
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* TCDS ASIC interrupt handler.
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*/
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int
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tcds_intr(val)
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void *val;
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{
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struct tcds_softc *sc;
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volatile u_int32_t *cir;
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u_int32_t ir;
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sc = val;
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/*
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* XXX
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* Copy and clear (gag!) the interrupts.
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*/
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cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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ir = *cir;
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MB();
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*cir &= 0xffff;
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MB();
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MAGIC_READ;
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MB();
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#define CHECKINTR(slot, bits) \
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if (ir & bits) { \
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(void)(*tcds_slots[slot].ts_handler) \
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(tcds_slots[slot].ts_val); \
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}
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CHECKINTR(TCDS_SLOT_SCSI0, TCDS_CIR_SCSI0_INT);
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CHECKINTR(TCDS_SLOT_SCSI1, TCDS_CIR_SCSI1_INT);
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#undef CHECKINTR
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#ifdef DIAGNOSTIC
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/*
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* Interrupts not currently handled, but would like to know if they
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* occur.
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*
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* XXX
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* Don't know if we have to set the interrupt mask and enable bits
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* in the IMER to allow some of them to happen?
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*/
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#define PRINTINTR(msg, bits) \
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if (ir & bits) \
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printf(msg);
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PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
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PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
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PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
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PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
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PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
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PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
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PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
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PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
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PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
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PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
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PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
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PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
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|
PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
|
|
PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
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#undef PRINTINTR
|
|
#endif
|
|
|
|
/*
|
|
* XXX
|
|
* The MACH source had this, with the comment:
|
|
* This is wrong, but machine keeps dying.
|
|
*/
|
|
DELAY(1);
|
|
}
|