744 lines
16 KiB
C
744 lines
16 KiB
C
/* $NetBSD: wd7000.c,v 1.19 1994/11/18 22:03:49 mycroft Exp $ */
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/*
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* UNFINISHED! UNFINISHED! UNFINISHED! UNFINISHED! UNFINISHED! UNFINISHED!
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*
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* deraadt@fsa.ca 93/04/02
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*
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* I was writing this driver for a wd7000-ASC. Yeah, the "-ASC" not the
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* "-FASST2". The difference is that the "-ASC" is missing scatter gather
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* support.
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*
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* In any case, the real reason why I never finished it is because the
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* motherboard I have has broken DMA. This card wants 8MHz 1 wait state
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* operation, and my board munges about 30% of the words transferred.
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*
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* Hopefully someone can finish this for the wd7000-FASST2. It should be
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* quite easy to do. Look at the Linux wd7000 device driver to see how
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* scatter gather is done by the board, then look at one of the Adaptec
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* drivers to finish off the job..
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*/
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#include "wds.h"
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#if NWDS > 0
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/dkbad.h>
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#include <sys/disklabel.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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#include <i386/isa/isa_device.h>
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extern int delaycount; /* from clock setup code */
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#define PHYSTOKV(x) ((x) + KERNBASE)
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#define KVTOPHYS(x) vtophys(x)
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#define PAGESIZ 4096
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/* WD7000 registers */
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#define WDS_STAT 0 /* read */
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#define WDS_IRQSTAT 1 /* read */
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#define WDS_CMD 0 /* write */
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#define WDS_IRQACK 1 /* write */
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#define WDS_HCR 2 /* write */
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/* WDS_STAT (read) defs */
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#define WDS_IRQ 0x80
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#define WDS_RDY 0x40
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#define WDS_REJ 0x20
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#define WDS_INIT 0x10
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/* WDS_IRQSTAT (read) defs */
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#define WDSI_MASK 0xc0
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#define WDSI_ERR 0x00
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#define WDSI_MFREE 0x80
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#define WDSI_MSVC 0xc0
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/* WDS_CMD (write) defs */
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#define WDSC_NOOP 0x00
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#define WDSC_INIT 0x01
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#define WDSC_DISUNSOL 0x02
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#define WDSC_ENAUNSOL 0x03
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#define WDSC_IRQMFREE 0x04
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#define WDSC_SCSIRESETSOFT 0x05
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#define WDSC_SCSIRESETHARD 0x06
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#define WDSC_MSTART(m) (0x80 + (m))
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#define WDSC_MMSTART(m) (0xc0 + (m))
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/* WDS_HCR (write) defs */
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#define WDSH_IRQEN 0x08
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#define WDSH_DRQEN 0x04
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#define WDSH_SCSIRESET 0x02
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#define WDSH_ASCRESET 0x01
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struct wds_cmd {
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u_char cmd;
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u_char targ;
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struct scsi_generic scb; /*u_char scb[12];*/
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u_char stat;
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u_char venderr;
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u_char len[3];
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u_char data[3];
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u_char next[3];
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u_char write;
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u_char xx[6];
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};
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struct wds_req {
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struct wds_cmd cmd;
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struct wds_cmd sense;
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struct scsi_xfer *sxp;
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int busy, polled;
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int done, ret, ombn;
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};
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#define WDSX_SCSICMD 0x00
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#define WDSX_OPEN_RCVBUF 0x80
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#define WDSX_RCV_CMD 0x81
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#define WDSX_RCV_DATA 0x82
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#define WDSX_RCV_DATASTAT 0x83
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#define WDSX_SND_DATA 0x84
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#define WDSX_SND_DATASTAT 0x85
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#define WDSX_SND_CMDSTAT 0x86
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#define WDSX_READINIT 0x88
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#define WDSX_READSCSIID 0x89
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#define WDSX_SETUNSOLIRQMASK 0x8a
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#define WDSX_GETUNSOLIRQMASK 0x8b
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#define WDSX_GETFIRMREV 0x8c
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#define WDSX_EXECDIAG 0x8d
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#define WDSX_SETEXECPARM 0x8e
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#define WDSX_GETEXECPARM 0x8f
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struct wds_mb {
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u_char stat;
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u_char addr[3];
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};
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/* ICMB status value */
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#define ICMB_OK 0x01
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#define ICMB_OKERR 0x02
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#define ICMB_ETIME 0x04
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#define ICMB_ERESET 0x05
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#define ICMB_ETARCMD 0x06
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#define ICMB_ERESEL 0x80
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#define ICMB_ESEL 0x81
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#define ICMB_EABORT 0x82
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#define ICMB_ESRESET 0x83
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#define ICMB_EHRESET 0x84
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struct wds_setup {
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u_char cmd;
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u_char scsi_id;
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u_char buson_t;
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u_char busoff_t;
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u_char xx;
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u_char mbaddr[3];
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u_char nomb;
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u_char nimb;
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};
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#define WDS_NOMB 16
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#define WDS_NIMB 8
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#define MAXSIMUL 8
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struct wds {
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int addr;
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struct wds_req wdsr[MAXSIMUL];
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struct wds_mb ombs[WDS_NOMB], imbs[WDS_NIMB];
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} wds[NWDS];
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static int wdsunit = 0;
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int wds_debug = 0;
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void p2x(u_char *, u_long);
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u_char *x2p(u_char *);
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int wdsprobe(struct isa_device *);
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void wds_minphys(struct buf *);
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struct wds_req *wdsr_alloc(int);
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int wds_scsi_cmd(struct scsi_xfer *);
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long wds_adapter_info(int);
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int wdsintr(int);
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int wds_done(int, struct wds_cmd *, u_char);
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int wdsattach(struct isa_device *);
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int wds_init(struct isa_device *);
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int wds_cmd(int, u_char *, int);
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void wds_wait(int, int, int);
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struct scsi_switch wds_switch[NWDS];
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struct isa_driver wdsdriver = {
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wdsprobe,
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wdsattach,
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"wds",
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};
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void
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flushcache(void)
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{
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extern main();
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volatile char *p, c;
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int i;
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for(p=(char *)main, i=0; i<256*1024; i++)
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c = *p++;
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}
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void
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p2x(u_char *p, u_long x)
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{
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p[0] = (x & 0x00ff0000) >> 16;
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p[1] = (x & 0x0000ff00) >> 8;
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p[2] = (x & 0x000000ff);
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}
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u_char *
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x2p(u_char *x)
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{
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u_long q;
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q = ((x[0]<<16) & 0x00ff0000) + ((x[1]<<8) & 0x0000ff00) + (x[2] & 0x000000ff);
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return (u_char *)q;
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}
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int
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wdsprobe(struct isa_device *dev)
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{
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/*scsi_debug = PRINTROUTINES | TRACEOPENS | TRACEINTERRUPTS |
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SHOWREQUESTS | SHOWSCATGATH | SHOWINQUIRY | SHOWCOMMANDS;*/
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if (dev->id_parent)
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return 1;
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if(wdsunit > NWDS)
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return 0;
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dev->id_unit = wdsunit;
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wds[wdsunit].addr = dev->id_iobase;
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if(wds_init(dev) != 0)
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return 0;
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wdsunit++;
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return 8;
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}
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void
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wds_minphys(struct buf *bp)
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{
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int base = (int)bp->b_data & (PAGESIZ-1);
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if(base + bp->b_bcount > PAGESIZ)
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bp->b_bcount = PAGESIZ - base;
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}
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struct wds_req *
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wdsr_alloc(int unit)
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{
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struct wds_req *r;
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int x;
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int i;
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r = NULL;
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x = splbio();
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for(i=0; i<MAXSIMUL; i++)
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if(wds[unit].wdsr[i].busy == 0) {
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r = &wds[unit].wdsr[i];
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r->busy = 1;
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break;
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}
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if(r == NULL) {
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splx(x);
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return NULL;
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}
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r->ombn = -1;
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for(i=0; i<WDS_NOMB; i++)
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if(wds[unit].ombs[i].stat==0) {
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wds[unit].ombs[i].stat = 1;
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r->ombn = i;
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break;
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}
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if(r->ombn == -1 ) {
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r->busy = 0;
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splx(x);
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return NULL;
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}
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splx(x);
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return r;
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}
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int
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wds_scsi_cmd(struct scsi_xfer *sxp)
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{
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struct wds_req *r;
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int unit = sxp->adapter;
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int base;
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u_char c, *p;
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int i;
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base = wds[unit].addr;
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/*printf("scsi_cmd\n");*/
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if( sxp->flags & SCSI_RESET) {
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printf("reset!\n");
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return COMPLETE;
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}
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r = wdsr_alloc(unit);
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if(r==NULL) {
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printf("no request slot available!\n");
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sxp->error = XS_DRIVER_STUFFUP;
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return TRY_AGAIN_LATER;
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}
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r->done = 0;
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r->sxp = sxp;
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printf("wds%d: target %d/%d req %8x flags %08x len %d: ", unit,
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sxp->targ, sxp->lu, r, sxp->flags, sxp->cmdlen);
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for(i=0, p=(u_char *)sxp->cmd; i<sxp->cmdlen; i++)
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printf("%02x ", p[i]);
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printf("\n");
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printf(" data %08x datalen %08x\n", sxp->data, sxp->datalen);
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if(sxp->flags & SCSI_DATA_UIO) {
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printf("UIO!\n");
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sxp->error = XS_DRIVER_STUFFUP;
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return TRY_AGAIN_LATER;
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}
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p2x(&wds[unit].ombs[r->ombn].addr[0], KVTOPHYS(&r->cmd));
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printf("%08x/%08x mbox@%08x: %02x %02x %02x %02x\n",
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&r->cmd, KVTOPHYS(&r->cmd), &wds[unit].ombs[0],
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wds[unit].ombs[r->ombn].stat, wds[unit].ombs[r->ombn].addr[0],
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wds[unit].ombs[r->ombn].addr[1], wds[unit].ombs[r->ombn].addr[2]);
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bzero(&r->cmd, sizeof r->cmd);
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r->cmd.cmd = WDSX_SCSICMD;
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r->cmd.targ = (sxp->targ << 5) | sxp->lu;
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bcopy(sxp->cmd, &r->cmd.scb, sxp->cmdlen<12 ? sxp->cmdlen : 12);
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p2x(&r->cmd.len[0], sxp->datalen);
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p2x(&r->cmd.data[0], sxp->datalen ? KVTOPHYS(sxp->data) : 0);
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r->cmd.write = (sxp->flags&SCSI_DATA_IN)? 0x80 : 0x00;
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p2x(&r->cmd.next[0], KVTOPHYS(&r->sense));
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bzero(&r->sense, sizeof r->sense);
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r->sense.cmd = r->cmd.cmd;
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r->sense.targ = r->cmd.targ;
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r->sense.scb.opcode = REQUEST_SENSE;
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p2x(&r->sense.data[0], KVTOPHYS(&sxp->sense));
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p2x(&r->sense.len[0], sizeof sxp->sense);
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r->sense.write = 0x80;
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/*printf("wdscmd: ");
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for(i=0, p=(u_char *)&r->cmd; i<sizeof r->cmd; i++)
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printf("%02x ", p[i]);
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printf("\n");*/
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if(sxp->flags & SCSI_NOMASK) {
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outb(base+WDS_HCR, WDSH_DRQEN);
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r->polled = 1;
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} else
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r->polled = 0;
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c = WDSC_MSTART(r->ombn);
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flushcache();
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if( wds_cmd(base, &c, sizeof c) != 0) {
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printf("wds%d: unable to start outgoing mbox\n", unit);
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r->busy = 0;
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/* XXX need to free mailbox */
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return TRY_AGAIN_LATER;
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}
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delay(10000);
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/*printf("%08x/%08x mbox: %02x %02x %02x %02x\n", &r->cmd, KVTOPHYS(&r->cmd),
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wds[unit].ombs[r->ombn].stat, wds[unit].ombs[r->ombn].addr[0],
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wds[unit].ombs[r->ombn].addr[1], wds[unit].ombs[r->ombn].addr[2]);*/
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if(sxp->flags & SCSI_NOMASK) {
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repoll: printf("wds%d: polling.", unit);
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i = 0;
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while( (inb(base+WDS_STAT) & WDS_IRQ) == 0) {
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printf(".");
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delay(10000);
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if(++i == 10) {
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printf("failed %02x\n", inb(base+WDS_IRQSTAT));
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/*r->busy = 0;*/
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sxp->error = XS_TIMEOUT;
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return HAD_ERROR;
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}
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}
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flushcache();
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printf("got one!\n");
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wdsintr(unit);
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if(r->done) {
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r->sxp->flags |= ITSDONE;
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if(r->sxp->when_done)
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(*r->sxp->when_done)(r->sxp->done_arg,
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r->sxp->done_arg2);
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r->busy = 0;
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return r->ret;
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}
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goto repoll;
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}
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outb(base+WDS_HCR, WDSH_IRQEN|WDSH_DRQEN);
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printf("wds%d: successfully queued\n", unit);
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return SUCCESSFULLY_QUEUED;
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}
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long
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wds_adapter_info(int unit)
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{
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return 1;
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}
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int
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wdsintr(int unit)
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{
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struct wds_cmd *pc, *vc;
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struct wds_mb *in;
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u_char stat;
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u_char c;
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/*printf("stat=%02x\n", inb(wds[unit].addr + WDS_STAT));*/
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delay(1000);
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c = inb(wds[unit].addr + WDS_IRQSTAT);
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printf("wdsintr: %02x\n", c);
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if( (c&WDSI_MASK) == WDSI_MSVC) {
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delay(1000);
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c = c & ~WDSI_MASK;
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flushcache();
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in = &wds[unit].imbs[c];
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printf("incoming mailbox %02x@%08x: ", c, in);
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printf("%02x %02x %02x %02x\n",
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in->stat, in->addr[0], in->addr[1], in->addr[2]);
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pc = (struct wds_cmd *)x2p(&in->addr[0]);
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vc = (struct wds_cmd *)PHYSTOKV(pc);
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stat = in->stat;
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printf("p=%08x v=%08x stat %02x\n", pc, vc, stat);
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wds_done(unit, vc, stat);
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in->stat = 0;
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outb(wds[unit].addr + WDS_IRQACK, 0xff);
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}
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return 1;
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}
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int
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wds_done(int unit, struct wds_cmd *c, u_char stat)
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{
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struct wds_req *r;
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int i;
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r = (struct wds_req *)NULL;
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for(i=0; i<MAXSIMUL; i++)
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if( c == &wds[unit].wdsr[i].cmd ) {
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/*printf("found at req slot %d\n", i);*/
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r = &wds[unit].wdsr[i];
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break;
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}
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if(r == (struct wds_req *)NULL) {
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printf("failed to find request!\n");
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return 1;
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}
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printf("wds%d: cmd %8x stat %2x/%2x %2x/%2x\n", unit, c,
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r->cmd.stat, r->cmd.venderr, r->sense.stat, r->sense.venderr);
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r->done = 1;
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/* XXX need to free mailbox */
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r->ret = HAD_ERROR;
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switch(r->cmd.stat) {
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case ICMB_OK:
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/*XXX r->sxp->sense.valid = 0;
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r->sxp->error = 0;*/
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r->ret = COMPLETE;
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break;
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case ICMB_OKERR:
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printf("scsi err %02x\n", c->venderr);
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/*XXX r->sxp->sense.error_code = c->venderr;
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r->sxp->sense.valid = 1;*/
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r->ret = COMPLETE;
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break;
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case ICMB_ETIME:
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r->sxp->error = XS_TIMEOUT;
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r->ret = HAD_ERROR;
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break;
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case ICMB_ERESET:
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case ICMB_ETARCMD:
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case ICMB_ERESEL:
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case ICMB_ESEL:
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case ICMB_EABORT:
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case ICMB_ESRESET:
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case ICMB_EHRESET:
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r->sxp->error = XS_DRIVER_STUFFUP;
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r->ret = HAD_ERROR;
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break;
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}
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if(r->polled==0) {
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r->sxp->flags |= ITSDONE;
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if(r->sxp->when_done)
|
|
(*r->sxp->when_done)(r->sxp->done_arg, r->sxp->done_arg2);
|
|
r->busy = 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
wds_getvers(int unit)
|
|
{
|
|
struct wds_req *r;
|
|
int base;
|
|
u_char c, *p;
|
|
int i;
|
|
|
|
base = wds[unit].addr;
|
|
|
|
/*printf("scsi_cmd\n");*/
|
|
|
|
r = wdsr_alloc(unit);
|
|
if(r==NULL) {
|
|
printf("wds%d: no request slot available!\n", unit);
|
|
return -1;
|
|
}
|
|
r->done = 0;
|
|
r->sxp = NULL;
|
|
|
|
printf("wds%d: getvers req %8x\n", unit, r);
|
|
|
|
p2x(&wds[unit].ombs[r->ombn].addr[0], KVTOPHYS(&r->cmd));
|
|
printf("%08x/%08x mbox@%08x: %02x %02x %02x %02x\n",
|
|
&r->cmd, KVTOPHYS(&r->cmd), &wds[unit].ombs[0],
|
|
wds[unit].ombs[r->ombn].stat, wds[unit].ombs[r->ombn].addr[0],
|
|
wds[unit].ombs[r->ombn].addr[1], wds[unit].ombs[r->ombn].addr[2]);
|
|
|
|
bzero(&r->cmd, sizeof r->cmd);
|
|
r->cmd.cmd = WDSX_GETFIRMREV;
|
|
r->cmd.write = 0x80;
|
|
|
|
printf("wdscmd: ");
|
|
for(i=0, p=(u_char *)&r->cmd; i<sizeof r->cmd; i++)
|
|
printf("%02x ", p[i]);
|
|
printf("\n");
|
|
|
|
outb(base+WDS_HCR, WDSH_DRQEN);
|
|
r->polled = 1;
|
|
|
|
c = WDSC_MSTART(r->ombn);
|
|
flushcache();
|
|
if( wds_cmd(base, &c, sizeof c) != 0) {
|
|
printf("wds%d: unable to start outgoing mbox\n", unit);
|
|
r->busy = 0;
|
|
/* XXX need to free mailbox */
|
|
return -1;
|
|
}
|
|
|
|
delay(10000);
|
|
/*printf("%08x/%08x mbox: %02x %02x %02x %02x\n", &r->cmd, KVTOPHYS(&r->cmd),
|
|
wds[unit].ombs[r->ombn].stat, wds[unit].ombs[r->ombn].addr[0],
|
|
wds[unit].ombs[r->ombn].addr[1], wds[unit].ombs[r->ombn].addr[2]);*/
|
|
|
|
while(1) {
|
|
printf("wds%d: polling.", unit);
|
|
i = 0;
|
|
while( (inb(base+WDS_STAT) & WDS_IRQ) == 0) {
|
|
printf(".");
|
|
delay(10000);
|
|
if(++i == 10) {
|
|
printf("failed %02x\n", inb(base+WDS_IRQSTAT));
|
|
/*r->busy = 0;*/
|
|
return -1;
|
|
}
|
|
}
|
|
flushcache();
|
|
printf("got one!\n");
|
|
wdsintr(unit);
|
|
if(r->done) {
|
|
printf("wds%d: version %02x %02x\n", unit,
|
|
r->cmd.targ, r->cmd.scb.opcode);
|
|
r->busy = 0;
|
|
return 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
wdsattach(struct isa_device *dev)
|
|
{
|
|
int masunit;
|
|
static int firstswitch[NWDS];
|
|
static u_long versprobe /* max 32 controllers */
|
|
int r;
|
|
|
|
if (!dev->id_parent)
|
|
return 1;
|
|
masunit = dev->id_parent->id_unit;
|
|
|
|
if( !(versprobe & (1<<masunit))) {
|
|
versprobe |= (1<<masunit);
|
|
if(wds_getvers(masunit)==-1)
|
|
printf("wds%d: getvers failed\n", masunit);
|
|
}
|
|
|
|
if (!firstswitch[masunit]) {
|
|
firstswitch[masunit] = 1;
|
|
wds_switch[masunit].name = "wds";
|
|
wds_switch[masunit].scsi_cmd = wds_scsi_cmd;
|
|
wds_switch[masunit].scsi_minphys = wdsminphys;
|
|
wds_switch[masunit].open_target_lu = 0;
|
|
wds_switch[masunit].close_target_lu = 0;
|
|
wds_switch[masunit].adapter_info = wds_adapter_info;
|
|
for (r = 0; r < 8; r++) {
|
|
wds_switch[masunit].empty[r] = 0;
|
|
wds_switch[masunit].used[r] = 0;
|
|
wds_switch[masunit].printed[r] = 0;
|
|
}
|
|
}
|
|
r = scsi_attach(masunit, &wds_switch[masunit], &dev->id_physid,
|
|
&dev->id_unit, dev->id_flags);
|
|
return r;
|
|
}
|
|
|
|
int
|
|
wds_init(struct isa_device *dev)
|
|
{
|
|
struct wds_setup init;
|
|
int base;
|
|
u_char *p, c;
|
|
int unit, i;
|
|
|
|
unit = dev->id_unit;
|
|
base = wds[unit].addr;
|
|
|
|
/*
|
|
* Sending a command causes the CMDRDY bit to clear.
|
|
*/
|
|
c = inb(base+WDS_STAT);
|
|
for(i=0; i<4; i++)
|
|
if( (inb(base+WDS_STAT) & WDS_RDY) != 0) {
|
|
goto ready;
|
|
delay(10);
|
|
}
|
|
return 1;
|
|
|
|
ready:
|
|
outb(base+WDS_CMD, WDSC_NOOP);
|
|
if( inb(base+WDS_STAT) & WDS_RDY)
|
|
return 1;
|
|
|
|
/*
|
|
* the controller exists. reset and init.
|
|
*/
|
|
outb(base+WDS_HCR, WDSH_SCSIRESET|WDSH_ASCRESET);
|
|
delay(3);
|
|
outb(base+WDS_HCR, WDSH_DRQEN);
|
|
delay(20000);
|
|
|
|
#if 1
|
|
outb(0xd6, 0xc3);
|
|
outb(0xd4, 0x03);
|
|
#else
|
|
isa_dmacascade(dev->id_drq);
|
|
#endif
|
|
|
|
if( (inb(base+WDS_STAT) & (WDS_RDY)) != WDS_RDY) {
|
|
printf("wds%d: waiting for controller to become ready", unit);
|
|
for(i=0; i<6; i++) {
|
|
if( (inb(base+WDS_STAT) & (WDS_RDY)) == WDS_RDY)
|
|
break;
|
|
printf(".");
|
|
delay(10000);
|
|
}
|
|
if( (inb(base+WDS_STAT) & (WDS_RDY)) != WDS_RDY) {
|
|
printf("failed\n");
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
bzero(&init, sizeof init);
|
|
init.cmd = WDSC_INIT;
|
|
init.scsi_id = 0;
|
|
init.buson_t = 24;
|
|
init.busoff_t = 48;
|
|
p2x(&init.mbaddr[0], KVTOPHYS(&wds[unit].ombs[0]));
|
|
init.xx = 0;
|
|
init.nomb = WDS_NOMB;
|
|
init.nimb = WDS_NIMB;
|
|
|
|
/*p = (u_char *)&init;
|
|
printf("wds%d: %08x %08x init: ", unit,
|
|
&wds[unit].ombs[0], KVTOPHYS(&wds[unit].ombs[0]));
|
|
for(i=0; i<sizeof init; i++)
|
|
printf("%02x ", p[i]);
|
|
printf("\n");*/
|
|
|
|
wds_wait(base+WDS_STAT, WDS_RDY, WDS_RDY);
|
|
flushcache();
|
|
if( wds_cmd(base, (u_char *)&init, sizeof init) != 0) {
|
|
printf("wds%d: wds_cmd failed\n", unit);
|
|
return 1;
|
|
}
|
|
wds_wait(base+WDS_STAT, WDS_INIT, WDS_INIT);
|
|
|
|
wds_wait(base+WDS_STAT, WDS_RDY, WDS_RDY);
|
|
c = WDSC_DISUNSOL;
|
|
if( wds_cmd(base, &c, sizeof c) != 0) {
|
|
printf("wds%d: wds_cmd failed\n", unit);
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
wds_cmd(int base, u_char *p, int l)
|
|
{
|
|
int i;
|
|
u_char c;
|
|
|
|
i = 0;
|
|
while(i < l) {
|
|
while( ((c=inb(base+WDS_STAT)) & WDS_RDY) == 0)
|
|
;
|
|
|
|
outb(base+WDS_CMD, *p);
|
|
|
|
while( ((c=inb(base+WDS_STAT)) & WDS_RDY) == 0)
|
|
;
|
|
|
|
if(c & WDS_REJ)
|
|
return 1;
|
|
p++;
|
|
i++;
|
|
}
|
|
while( ((c=inb(base+WDS_STAT)) & WDS_RDY) == 0)
|
|
;
|
|
if(c & WDS_REJ)
|
|
return 1;
|
|
/*printf("wds_cmd: %02x\n", inb(base+WDS_STAT));*/
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
wds_wait(int reg, int mask, int val)
|
|
{
|
|
while( (inb(reg) & mask) != val)
|
|
;
|
|
}
|
|
|
|
#endif
|