155 lines
4.8 KiB
C
155 lines
4.8 KiB
C
/* $NetBSD: becc_mainbus.c,v 1.2 2003/07/15 00:24:56 lukem Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ``Big Red Head'' front-end for the ADI Engineering Big Endian Companion
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* Chip. We take care of setting up the BECC memory map, which is specific
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* to the board the BECC is wired up to.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: becc_mainbus.c,v 1.2 2003/07/15 00:24:56 lukem Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <evbarm/adi_brh/brhreg.h>
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#include <evbarm/adi_brh/brhvar.h>
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#include <arm/xscale/beccreg.h>
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#include <arm/xscale/beccvar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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int becc_mainbus_match(struct device *, struct cfdata *, void *);
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void becc_mainbus_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(becc_mainbus, sizeof(struct becc_softc),
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becc_mainbus_match, becc_mainbus_attach, NULL, NULL);
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/* There can be only one. */
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int becc_mainbus_found;
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int
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becc_mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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#if 0
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struct mainbus_attach_args *ma = aux;
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#endif
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if (becc_mainbus_found)
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return (0);
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#if 1
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/* XXX Shoot arch/arm/mainbus in the head. */
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return (1);
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#else
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if (strcmp(cf->cf_name, ma->ma_name) == 0)
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return (1);
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return (0);
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#endif
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}
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void
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becc_mainbus_attach(struct device *parent, struct device *self, void *aux)
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{
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extern paddr_t physical_start;
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struct becc_softc *sc = (void *) self;
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becc_mainbus_found = 1;
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printf(": ADI Big Endian Companion Chip, rev. %s\n",
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becc_revisions[becc_rev]);
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/*
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* Virtual addresses for the PCI I/O, 2 PCI MEM, and
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* PCI CFG windows.
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*/
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sc->sc_pci_io_base = BRH_PCI_IO_VBASE;
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sc->sc_pci_mem_base[0] = BRH_PCI_MEM1_VBASE;
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sc->sc_pci_mem_base[1] = BRH_PCI_MEM2_VBASE;
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sc->sc_pci_cfg_base = BRH_PCI_CONF_VBASE;
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/*
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* Ver <= 7: There are 2 32M inbound PCI memory windows. Direct-
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* map them to the first 64M of SDRAM. We have limited SDRAM to
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* 64M during bootstrap in this case.
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*
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* Ver >= 8: There is a 128M inbound PCI memory window which can
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* cover all of SDRAM, which we obviously prefer to use.
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*
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* We map PCI:SDRAM 1:1, placing the two smaller windows after
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* after the larger one.
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*/
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sc->sc_iwin[0].iwin_base = physical_start + 128 * 1024 * 1024;
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sc->sc_iwin[0].iwin_xlate = physical_start;
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sc->sc_iwin[1].iwin_base = sc->sc_iwin[0].iwin_base+BECC_PCI_MEM1_SIZE;
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sc->sc_iwin[1].iwin_xlate = physical_start + BECC_PCI_MEM1_SIZE;
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sc->sc_iwin[2].iwin_base = physical_start;
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sc->sc_iwin[2].iwin_xlate = physical_start;
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/*
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* Ver <= 8: There are 2 32M outbound PCI memory windows.
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* Ver >= 9: There are 3 32M outbound PCI memory windows.
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*
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* One of these may be byte swapped. We don't use the third
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* one available on >= Ver9.
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*/
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sc->sc_owin_xlate[0] = 32U * 1024 * 1024;
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sc->sc_owin_xlate[1] = 32U * 1024 * 1024;
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sc->sc_owin_xlate[2] = 32U * 1024 * 1024;
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/*
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* Map the 1M PCI I/O window to PCI I/O address 0.
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*/
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sc->sc_ioout_xlate = 0;
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/*
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* No platform-specific PCI interrupt routing; it's all done
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* in the BECC.
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*/
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becc_attach(sc);
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}
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