321 lines
9.0 KiB
C
321 lines
9.0 KiB
C
/* $NetBSD: pci_1000a.c,v 1.28 2014/03/21 16:39:29 christos Exp $ */
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/*
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
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* Carnegie-Mellon University. Platform support for Noritake, Pintake, and
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* Corelle by Ross Harvey with copyright assignment by permission of Avalon
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* Computer Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: pci_1000a.c,v 1.28 2014/03/21 16:39:29 christos Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/syslog.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/pci_1000a.h>
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#include "sio.h"
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#if NSIO > 0 || NPCEB > 0
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#include <alpha/pci/siovar.h>
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#endif
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#define PCI_NIRQ 32
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#define PCI_STRAY_MAX 5
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#define IMR2IRQ(bn) ((bn) - 1)
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#define IRQ2IMR(irq) ((irq) + 1)
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static bus_space_tag_t mystery_icu_iot;
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static bus_space_handle_t mystery_icu_ioh[2];
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int dec_1000a_intr_map(const struct pci_attach_args *,
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pci_intr_handle_t *);
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const char *dec_1000a_intr_string(void *, pci_intr_handle_t, char *, size_t);
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const struct evcnt *dec_1000a_intr_evcnt(void *, pci_intr_handle_t);
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void *dec_1000a_intr_establish(void *, pci_intr_handle_t,
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int, int (*func)(void *), void *);
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void dec_1000a_intr_disestablish(void *, void *);
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struct alpha_shared_intr *dec_1000a_pci_intr;
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static void dec_1000a_iointr(void *arg, unsigned long vec);
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static void dec_1000a_enable_intr(int irq);
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static void dec_1000a_disable_intr(int irq);
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static void pci_1000a_imi(void);
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static pci_chipset_tag_t pc_tag;
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void
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pci_1000a_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc)
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{
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char *cp;
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int i;
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mystery_icu_iot = iot;
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pc_tag = pc;
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if (bus_space_map(iot, 0x54a, 2, 0, mystery_icu_ioh + 0)
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|| bus_space_map(iot, 0x54c, 2, 0, mystery_icu_ioh + 1))
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panic("pci_1000a_pickintr");
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pc->pc_intr_v = core;
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pc->pc_intr_map = dec_1000a_intr_map;
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pc->pc_intr_string = dec_1000a_intr_string;
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pc->pc_intr_evcnt = dec_1000a_intr_evcnt;
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pc->pc_intr_establish = dec_1000a_intr_establish;
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pc->pc_intr_disestablish = dec_1000a_intr_disestablish;
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pc->pc_pciide_compat_intr_establish = NULL;
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#define PCI_1000A_IRQ_STR 8
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dec_1000a_pci_intr = alpha_shared_intr_alloc(PCI_NIRQ,
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PCI_1000A_IRQ_STR);
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for (i = 0; i < PCI_NIRQ; i++) {
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alpha_shared_intr_set_maxstrays(dec_1000a_pci_intr, i,
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PCI_STRAY_MAX);
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cp = alpha_shared_intr_string(dec_1000a_pci_intr, i);
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snprintf(cp, PCI_1000A_IRQ_STR, "irq %d", i);
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evcnt_attach_dynamic(alpha_shared_intr_evcnt(
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dec_1000a_pci_intr, i), EVCNT_TYPE_INTR, NULL,
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"dec_1000a", cp);
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}
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pci_1000a_imi();
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#if NSIO > 0 || NPCEB > 0
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sio_intr_setup(pc, iot);
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#endif
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}
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int
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dec_1000a_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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pcitag_t bustag = pa->pa_intrtag;
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int buspin = pa->pa_intrpin;
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pci_chipset_tag_t pc = pa->pa_pc;
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int imrbit, device = 0; /* XXX gcc */
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/*
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* Get bit number in mystery ICU imr
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*/
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static const signed char imrmap[][4] = {
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# define IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 }
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# define IRQNONE { 0, 0, 0, 0 }
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/* 0 */ { 1, 0, 0, 0 }, /* Noritake and Pintake */
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/* 1 */ IRQSPLIT(8),
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/* 2 */ IRQSPLIT(10),
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/* 3 */ IRQSPLIT(12),
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/* 4 */ IRQSPLIT(14),
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/* 5 */ { 1, 0, 0, 0 }, /* Corelle */
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/* 6 */ { 10, 0, 0, 0 }, /* Corelle */
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/* 7 */ IRQNONE,
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/* 8 */ { 1, 0, 0, 0 }, /* isp behind ppb */
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/* 9 */ IRQNONE,
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/* 10 */ IRQNONE,
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/* 11 */ IRQSPLIT(2),
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/* 12 */ IRQSPLIT(4),
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/* 13 */ IRQSPLIT(6),
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/* 14 */ IRQSPLIT(8) /* Corelle */
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};
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if (buspin == 0) /* No IRQ used. */
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return 1;
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if (!(1 <= buspin && buspin <= 4))
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goto bad;
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pci_decompose_tag(pc, bustag, NULL, &device, NULL);
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if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) {
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if (device == 0)
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printf("dec_1000a_intr_map: ?! UNEXPECTED DEV 0\n");
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imrbit = imrmap[device][buspin - 1];
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if (imrbit) {
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*ihp = IMR2IRQ(imrbit);
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return 0;
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}
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}
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bad: printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, buspin);
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return 1;
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}
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const char *
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dec_1000a_intr_string(void *ccv, pci_intr_handle_t ih, char *buf, size_t len)
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{
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static const char irqmsg_fmt[] = "dec_1000a irq %ld";
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if (ih >= PCI_NIRQ)
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panic("%s: bogus dec_1000a IRQ 0x%lx", __func__, ih);
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snprintf(buf, len, irqmsg_fmt, ih);
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return buf;
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}
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const struct evcnt *
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dec_1000a_intr_evcnt(void *ccv, pci_intr_handle_t ih)
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{
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if (ih >= PCI_NIRQ)
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panic("%s: bogus dec_1000a IRQ 0x%lx", __func__, ih);
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return (alpha_shared_intr_evcnt(dec_1000a_pci_intr, ih));
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}
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void *
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dec_1000a_intr_establish(
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void *ccv,
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pci_intr_handle_t ih,
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int level,
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int (*func)(void *),
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void *arg)
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{
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void *cookie;
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if (ih >= PCI_NIRQ)
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panic("dec_1000a_intr_establish: IRQ too high, 0x%lx", ih);
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cookie = alpha_shared_intr_establish(dec_1000a_pci_intr, ih, IST_LEVEL,
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level, func, arg, "dec_1000a irq");
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if (cookie != NULL &&
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alpha_shared_intr_firstactive(dec_1000a_pci_intr, ih)) {
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scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000a_iointr, NULL,
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level);
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dec_1000a_enable_intr(ih);
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}
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return (cookie);
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}
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void
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dec_1000a_intr_disestablish(void *ccv, void *cookie)
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{
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struct alpha_shared_intrhand *ih = cookie;
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unsigned int irq = ih->ih_num;
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int s;
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s = splhigh();
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alpha_shared_intr_disestablish(dec_1000a_pci_intr, cookie,
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"dec_1000a irq");
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if (alpha_shared_intr_isactive(dec_1000a_pci_intr, irq) == 0) {
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dec_1000a_disable_intr(irq);
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alpha_shared_intr_set_dfltsharetype(dec_1000a_pci_intr, irq,
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IST_NONE);
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scb_free(0x900 + SCB_IDXTOVEC(irq));
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}
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splx(s);
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}
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static void
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dec_1000a_iointr(void *framep, unsigned long vec)
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{
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int irq;
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irq = SCB_VECTOIDX(vec - 0x900);
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if (!alpha_shared_intr_dispatch(dec_1000a_pci_intr, irq)) {
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alpha_shared_intr_stray(dec_1000a_pci_intr, irq,
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"dec_1000a irq");
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if (ALPHA_SHARED_INTR_DISABLE(dec_1000a_pci_intr, irq))
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dec_1000a_disable_intr(irq);
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} else
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alpha_shared_intr_reset_strays(dec_1000a_pci_intr, irq);
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}
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/*
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* Read and write the mystery ICU IMR registers
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*/
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#define IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0)
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#define IW(h, v) bus_space_write_2(mystery_icu_iot, mystery_icu_ioh[h], 0, (v))
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/*
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* Enable and disable interrupts at the ICU level
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*/
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static void
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dec_1000a_enable_intr(int irq)
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{
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int imrval = IRQ2IMR(irq);
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int i = imrval >= 16;
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IW(i, IR(i) | 1 << (imrval & 0xf));
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}
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static void
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dec_1000a_disable_intr(int irq)
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{
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int imrval = IRQ2IMR(irq);
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int i = imrval >= 16;
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IW(i, IR(i) & ~(1 << (imrval & 0xf)));
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}
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/*
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* Initialize mystery ICU
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*/
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static void
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pci_1000a_imi(void)
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{
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IW(0, IR(0) & 1);
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IW(1, IR(0) & 3);
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}
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