67 lines
2.5 KiB
C
67 lines
2.5 KiB
C
/* $NetBSD: pciide_ixp_reg.h,v 1.5 2008/04/29 06:53:03 martin Exp $ */
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/*
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* Copyright (c) 2004 The NetBSD Foundation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* All values gathered from the linux driver. */
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#define IXP_PIO_TIMING 0x40
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#define IXP_MDMA_TIMING 0x44
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#define IXP_PIO_CTL 0x48
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#define IXP_PIO_MODE 0x4a
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#define IXP_UDMA_CTL 0x54
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#define IXP_UDMA_MODE 0x56
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/* First 4 bits of UDMA_CTL enable or disable UDMA for the drive */
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#define IXP_UDMA_ENABLE(u, c, d) do { \
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(u) |= (1 << (2 * (c) + (d))); \
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} while (0)
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#define IXP_UDMA_DISABLE(u, c, d) do { \
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(u) &= ~(1 << (2 * (c) + (d))); \
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} while (0)
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/*
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* UDMA_MODE has 4 bits per drive, though only 3 are actually used
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* Note that in this macro u is the whole
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* UDMA_CTL+UDMA_MODE register (32bits).
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* PIO_MODE works just the same.
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*/
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#define IXP_SET_MODE(u, c, d, m) do { \
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int __ixpshift = 16 + 8*(c) + 4*(d); \
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(u) &= ~(0x7 << __ixpshift); \
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(u) |= (((m) & 0x7) << __ixpshift); \
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} while (0)
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/*
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* MDMA_TIMING has one byte per drive.
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* PIO_TIMING works just the same.
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*/
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#define IXP_SET_TIMING(m, c, d, t) do { \
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int __ixpshift = 16*(c) + 8*(d); \
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(m) &= ~(0xff << __ixpshift); \
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(m) |= ((t) & 0xff) << __ixpshift; \
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} while (0)
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