166 lines
5.1 KiB
C
166 lines
5.1 KiB
C
/* $NetBSD: com_puc.c,v 1.26 2018/12/08 17:46:14 thorpej Exp $ */
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/*
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* Copyright (c) 1998 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Machine-independent ns16x50 serial port ('com') driver attachment to
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* "PCI Universal Communications" controller driver.
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*
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* Author: Christopher G. Demetriou, May 17, 1998.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: com_puc.c,v 1.26 2018/12/08 17:46:14 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/tty.h>
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#include <sys/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pucvar.h>
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#include <dev/pci/cybervar.h>
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struct com_puc_softc {
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struct com_softc sc_com; /* real "com" softc */
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/* puc-specific goo. */
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void *sc_ih; /* interrupt handler */
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};
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/* Interface field in PCI Class register */
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static const char *serialtype[] = {
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"Generic XT",
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"16450",
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"16550",
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"16650",
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"16750",
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"16850",
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"16950",
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};
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static int
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com_puc_probe(device_t parent, cfdata_t match, void *aux)
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{
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struct puc_attach_args *aa = aux;
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/*
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* Locators already matched, just check the type.
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*/
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if (aa->type != PUC_PORT_TYPE_COM)
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return (0);
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return (1);
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}
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static void
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com_puc_attach(device_t parent, device_t self, void *aux)
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{
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struct com_puc_softc *psc = device_private(self);
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struct com_softc *sc = &psc->sc_com;
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struct puc_attach_args *aa = aux;
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const char *intrstr = NULL;
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char intrbuf[PCI_INTRSTR_LEN];
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unsigned int iface;
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sc->sc_dev = self;
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iface = PCI_INTERFACE(pci_conf_read(aa->pc, aa->tag, PCI_CLASS_REG));
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aprint_naive(": Serial port");
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if (iface < __arraycount(serialtype))
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aprint_normal(" (%s-compatible)", serialtype[iface]);
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aprint_normal(": ");
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com_init_regs(&sc->sc_regs, aa->t, aa->h, aa->a);
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sc->sc_frequency = aa->flags & PUC_COM_CLOCKMASK;
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if (!aa->poll) {
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intrstr = pci_intr_string(aa->pc, aa->intrhandle, intrbuf,
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sizeof(intrbuf));
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psc->sc_ih = pci_intr_establish_xname(aa->pc, aa->intrhandle,
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IPL_SERIAL, comintr, sc, device_xname(self));
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if (psc->sc_ih == NULL) {
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aprint_error("couldn't establish interrupt");
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if (intrstr != NULL)
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aprint_error(" at %s", intrstr);
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aprint_error("\n");
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return;
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}
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} else {
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sc->sc_hwflags |= COM_HW_POLL;
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}
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#if defined(amd64) || defined(i386)
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/*
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* Since puc(4) serial ports are typically not identified in the
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* BIOS COM[1234] table, the I/O address must be manually set using
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* installboot(8) in order to enable a serial console.
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* Print the address here so the user doesn't have to dig through
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* PCI configuration space to find it.
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*/
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if (aa->h < 0x10000)
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aprint_normal("ioaddr 0x%04lx, ", aa->h);
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#endif
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if (!aa->poll)
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aprint_normal("interrupting at %s\n", intrstr);
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else
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aprint_normal("polling\n");
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/* Enable Cyberserial 8X clock. */
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if (aa->flags & (PUC_COM_SIIG10x|PUC_COM_SIIG20x)) {
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int usrregno;
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if (aa->flags & PUC_PORT_USR3) usrregno = 3;
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else if (aa->flags & PUC_PORT_USR2) usrregno = 2;
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else if (aa->flags & PUC_PORT_USR1) usrregno = 1;
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else /* (aa->flags & PUC_PORT_USR0) */ usrregno = 0;
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if (aa->flags & PUC_COM_SIIG10x)
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write_siig10x_usrreg(aa->pc, aa->tag, usrregno, 1);
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else
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write_siig20x_usrreg(aa->pc, aa->tag, usrregno, 1);
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} else {
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if (!pmf_device_register(self, NULL, com_resume))
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aprint_error_dev(self,
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"couldn't establish power handler\n");
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}
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aprint_normal("%s", device_xname(self));
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com_attach_subr(sc);
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}
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CFATTACH_DECL_NEW(com_puc, sizeof(struct com_puc_softc),
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com_puc_probe, com_puc_attach, NULL, NULL);
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