200 lines
5.6 KiB
C
200 lines
5.6 KiB
C
/* $NetBSD: adw_pci.c,v 1.29 2018/12/09 11:14:01 jdolecek Exp $ */
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/*
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Author: Baldassare Dante Profeta <dante@mclink.it>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device probe and attach routines for the following
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* Advanced Systems Inc. SCSI controllers:
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*
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* ABP-940UW - Bus-Master PCI Ultra-Wide (253 CDB)
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* ABP-940UW (68) - Bus-Master PCI Ultra-Wide (253 CDB)
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* ABP-940UWD - Bus-Master PCI Ultra-Wide (253 CDB)
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* ABP-970UW - Bus-Master PCI Ultra-Wide (253 CDB)
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* ASB-3940UW - Bus-Master PCI Ultra-Wide (253 CDB)
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* ASB-3940U2W-00 - Bus-Master PCI Ultra2-Wide (253 CDB)
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* ASB-3940U3W-00 - Bus-Master PCI Ultra3-Wide (253 CDB)
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: adw_pci.c,v 1.29 2018/12/09 11:14:01 jdolecek Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/device.h>
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#include <sys/bus.h>
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#include <sys/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/adwlib.h>
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#include <dev/ic/adwmcode.h>
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#include <dev/ic/adw.h>
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/******************************************************************************/
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#define PCI_BASEADR_IO 0x10
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/******************************************************************************/
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/*
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* Check the slots looking for a board we recognise
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* If we find one, note its address (slot) and call
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* the actual probe routine to check it out.
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*/
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static int
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adw_pci_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ADVSYS_WIDE:
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case PCI_PRODUCT_ADVSYS_U2W:
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case PCI_PRODUCT_ADVSYS_U3W:
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return (1);
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}
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return 0;
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}
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static void
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adw_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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ADW_SOFTC *sc = device_private(self);
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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pci_intr_handle_t ih;
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pci_chipset_tag_t pc = pa->pa_pc;
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u_int32_t command;
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const char *intrstr;
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char intrbuf[PCI_INTRSTR_LEN];
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sc->sc_dev = self;
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aprint_naive(": SCSI controller\n");
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ADVSYS_WIDE:
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sc->chip_type = ADW_CHIP_ASC3550;
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aprint_normal(
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": AdvanSys ASB-3940UW-00 SCSI adapter\n");
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break;
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case PCI_PRODUCT_ADVSYS_U2W:
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sc->chip_type = ADW_CHIP_ASC38C0800;
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aprint_normal(
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": AdvanSys ASB-3940U2W-00 SCSI adapter\n");
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break;
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case PCI_PRODUCT_ADVSYS_U3W:
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sc->chip_type = ADW_CHIP_ASC38C1600;
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aprint_normal(
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": AdvanSys ASB-3940U3W-00 SCSI adapter\n");
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break;
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default:
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aprint_error(": unknown model!\n");
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return;
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}
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/*
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* Make sure IO/MEM/MASTER are enabled
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*/
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command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
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PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
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if ( (command & PCI_COMMAND_PARITY_ENABLE) == 0) {
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sc->cfg.control_flag |= CONTROL_FLAG_IGNORE_PERR;
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}
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/*
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* Map Device Registers for I/O
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*/
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if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL)) {
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aprint_error_dev(self, "unable to map device registers\n");
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return;
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}
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sc->sc_iot = iot;
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sc->sc_ioh = ioh;
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sc->sc_dmat = pa->pa_dmat;
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/*
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* Initialize the board
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*/
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if (adw_init(sc)) {
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aprint_error_dev(self, "adw_init failed");
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return;
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}
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/*
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* Map Interrupt line
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*/
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if (pci_intr_map(pa, &ih)) {
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aprint_error_dev(self, "couldn't map interrupt\n");
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return;
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}
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intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
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/*
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* Establish Interrupt handler
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*/
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sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, adw_intr, sc,
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device_xname(self));
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self, "couldn't establish interrupt");
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if (intrstr != NULL)
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aprint_error(" at %s", intrstr);
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aprint_error("\n");
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return;
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}
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aprint_normal_dev(self, "interrupting at %s\n", intrstr);
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/*
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* Attach all the sub-devices we can find
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*/
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adw_attach(sc);
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}
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CFATTACH_DECL_NEW(adw_pci, sizeof(ADW_SOFTC),
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adw_pci_match, adw_pci_attach, NULL, NULL);
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